1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
4 #include <lwk/spinlock.h>
5 #include <arch/types.h>
6 #include <arch/mpspec.h>
9 * Intel IO-APIC support for SMP and UP systems.
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
14 static inline int use_pci_vector(void) {return 1;}
15 static inline void disable_edge_ioapic_vector(unsigned int vector) { }
16 static inline void mask_and_ack_level_ioapic_vector(unsigned int vector) { }
17 static inline void end_edge_ioapic_vector (unsigned int vector) { }
18 #define startup_level_ioapic startup_level_ioapic_vector
19 #define shutdown_level_ioapic mask_IO_APIC_vector
20 #define enable_level_ioapic unmask_IO_APIC_vector
21 #define disable_level_ioapic mask_IO_APIC_vector
22 #define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_vector
23 #define end_level_ioapic end_level_ioapic_vector
24 #define set_ioapic_affinity set_ioapic_affinity_vector
26 #define startup_edge_ioapic startup_edge_ioapic_vector
27 #define shutdown_edge_ioapic disable_edge_ioapic_vector
28 #define enable_edge_ioapic unmask_IO_APIC_vector
29 #define disable_edge_ioapic disable_edge_ioapic_vector
30 #define ack_edge_ioapic ack_edge_ioapic_vector
31 #define end_edge_ioapic end_edge_ioapic_vector
33 #define APIC_MISMATCH_DEBUG
35 #define IO_APIC_BASE(idx) \
36 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
37 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
40 * The structure of the IO-APIC:
42 union IO_APIC_reg_00 {
45 u32 __reserved_2 : 14,
50 } __attribute__ ((packed)) bits;
53 union IO_APIC_reg_01 {
61 } __attribute__ ((packed)) bits;
64 union IO_APIC_reg_02 {
67 u32 __reserved_2 : 24,
70 } __attribute__ ((packed)) bits;
73 union IO_APIC_reg_03 {
78 } __attribute__ ((packed)) bits;
82 * # of IO-APICs and # of IRQ routing registers
84 extern int nr_ioapics;
85 extern int nr_ioapic_registers[MAX_IO_APICS];
87 enum ioapic_trigger_modes {
88 ioapic_edge_sensitive = 0,
89 ioapic_level_sensitive = 1
92 enum ioapic_pin_polarities {
93 ioapic_active_high = 0,
97 enum ioapic_destination_modes {
98 ioapic_physical_dest = 0,
99 ioapic_logical_dest = 1
102 enum ioapic_delivery_modes {
104 ioapic_lowest_priority = 1,
111 struct IO_APIC_route_entry {
113 delivery_mode : 3, /* 000: FIXED
117 dest_mode : 1, /* 0: physical, 1: logical */
121 trigger : 1, /* 0: edge, 1: level */
122 mask : 1, /* 0: enabled, 1: disabled */
125 __u32 __reserved_3 : 24,
127 } __attribute__ ((packed));
130 * MP-BIOS irq configuration table structures:
133 /* I/O APIC entries */
134 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
136 /* # of MP IRQ source entries */
137 extern int mp_irq_entries;
139 /* MP IRQ source entries */
140 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
142 /* non-0 if default (table-less) MP configuration */
143 extern int mpc_default_type;
145 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
147 *IO_APIC_BASE(apic) = reg;
148 return *(IO_APIC_BASE(apic)+4);
151 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
153 *IO_APIC_BASE(apic) = reg;
154 *(IO_APIC_BASE(apic)+4) = value;
158 * Re-write a value: to be used for read-modify-write
159 * cycles where the read already set up the index register.
161 static inline void io_apic_modify(unsigned int apic, unsigned int value)
163 *(IO_APIC_BASE(apic)+4) = value;
167 * Synchronize the IO-APIC and the CPU by doing
168 * a dummy read from the IO-APIC
170 static inline void io_apic_sync(unsigned int apic)
172 (void) *(IO_APIC_BASE(apic)+4);
175 /* 1 if "noapic" boot option passed */
176 extern int skip_ioapic_setup;
179 * If we use the IO-APIC for IRQ routing, disable automatic
180 * assignment of PCI IRQ's.
182 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
185 extern int io_apic_get_version (int ioapic);
186 extern int io_apic_get_redir_entries (int ioapic);
187 extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
188 extern int timer_uses_ioapic_pin_0;
191 extern int sis_apic_bug; /* dummy */
193 extern int assign_irq_vector(int irq);
195 void enable_NMI_through_LVT0 (void * dummy);
197 extern spinlock_t i8259A_lock;
199 extern unsigned int ioapic_num;
200 extern unsigned int ioapic_id[MAX_IO_APICS];
201 extern unsigned long ioapic_phys_addr[MAX_IO_APICS];
203 extern void __init ioapic_map(void);
204 extern void __init ioapic_init(void);
205 extern void ioapic_dump(void);