2 * include/asm-x86_64/i387.h
4 * Copyright (C) 1994 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * General FPU state handling cleanups
8 * Gareth Hughes <gareth@valinux.com>, May 2000
9 * x86-64 work by Andi Kleen 2002
12 #ifndef _X86_64_I387_H
13 #define _X86_64_I387_H
16 #include <lwk/errno.h>
17 #include <arch/processor.h>
18 #include <arch/sigcontext.h>
19 #include <arch/user.h>
20 #include <arch/uaccess.h>
22 extern void fpu_init(void);
23 extern unsigned int mxcsr_feature_mask;
24 extern void mxcsr_feature_mask_init(void);
26 /* Ignore delayed exceptions from user space */
27 static inline void tolerant_fwait(void)
29 asm volatile("1: fwait\n"
31 " .section __ex_table,\"a\"\n"
37 #define clear_fpu(tsk) do { \
38 if (tsk->arch.status & TS_USEDFPU) { \
40 tsk->arch.status &= ~TS_USEDFPU; \
46 * ptrace request handers...
48 extern int get_fpregs(struct user_i387_struct __user *buf,
49 struct task_struct *tsk);
50 extern int set_fpregs(struct task_struct *tsk,
51 struct user_i387_struct __user *buf);
54 * i387 state interaction
56 #define get_fpu_mxcsr(t) ((t)->arch.i387.fxsave.mxcsr)
57 #define get_fpu_cwd(t) ((t)->arch.i387.fxsave.cwd)
58 #define get_fpu_fxsr_twd(t) ((t)->arch.i387.fxsave.twd)
59 #define get_fpu_swd(t) ((t)->arch.i387.fxsave.swd)
60 #define set_fpu_cwd(t,val) ((t)->arch.i387.fxsave.cwd = (val))
61 #define set_fpu_swd(t,val) ((t)->arch.i387.fxsave.swd = (val))
62 #define set_fpu_fxsr_twd(t,val) ((t)->arch.i387.fxsave.twd = (val))
64 #define X87_FSW_ES (1 << 7) /* Exception Summary */
66 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
67 is pending. Clear the x87 state here by setting it to fixed
68 values. The kernel data segment can be sometimes 0 and sometimes
69 new user value. Both should be ok.
70 Use the PDA as safe address because it should be already in L1. */
71 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
73 if (unlikely(fx->swd & X87_FSW_ES))
74 asm volatile("fnclex");
77 * Unconditional fix for AMD CPUs that don't save/restore FDP/FIP/FOP.
78 * TODO: some CPUs may not need this, possibly use Linux
79 * alternative_input() mechanism.
81 asm volatile ("emms"); /* clear stack tags */
82 asm volatile ("fildl %gs:0"); /* load to clear state */
85 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
89 asm volatile("1: rex64/fxsave (%[fx])\n\t"
91 ".section .fixup,\"ax\"\n"
92 "3: movl $-1,%[err]\n"
95 ".section __ex_table,\"a\"\n"
99 : [err] "=r" (err), "=m" (*fx)
100 #if 0 /* See comment in __fxsave_clear() below. */
101 : [fx] "r" (fx), "0" (0));
103 : [fx] "cdaSDb" (fx), "0" (0));
105 if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct)))
107 /* No need to clear here because the caller clears USED_MATH */
111 static inline void __fxsave_clear(struct task_struct *tsk)
113 /* Using "rex64; fxsave %0" is broken because, if the memory operand
114 uses any extended registers for addressing, a second REX prefix
115 will be generated (to the assembler, rex64 followed by semicolon
116 is a separate instruction), and hence the 64-bitness is lost. */
118 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
119 starting with gas 2.16. */
120 __asm__ __volatile__("fxsaveq %0"
121 : "=m" (tsk->arch.thread.i387.fxsave));
123 /* Using, as a workaround, the properly prefixed form below isn't
124 accepted by any binutils version so far released, complaining that
125 the same type of prefix is used twice if an extended register is
126 needed for addressing (fix submitted to mainline 2005-11-21). */
127 __asm__ __volatile__("rex64/fxsave %0"
128 : "=m" (tsk->arch.thread.i387.fxsave));
130 /* This, however, we can work around by forcing the compiler to select
131 an addressing mode that doesn't require extended registers. */
132 __asm__ __volatile__("rex64/fxsave %P2(%1)"
133 : "=m" (tsk->arch.thread.i387.fxsave)
135 "i" (offsetof(__typeof__(*tsk),
136 arch.thread.i387.fxsave)));
138 clear_fpu_state(&tsk->arch.thread.i387.fxsave);
141 static inline void kernel_fpu_begin(void)
143 if (current->arch.flags & TF_USED_FPU) {
144 __fxsave_clear(current);
150 static inline void kernel_fpu_end(void)
156 fpu_save_state(struct task_struct *task)
158 __asm__ __volatile__("fxsaveq %0"
159 : "=m" (task->arch.thread.i387.fxsave));
160 clear_fpu_state(&task->arch.thread.i387.fxsave);
164 fpu_restore_state(struct task_struct *task)
166 __asm__ __volatile__("fxrstorq %0"
167 ::"m" (task->arch.thread.i387.fxsave));
170 #endif /* _X86_64_I387_H */