2 #include <lwk/init_task.h>
3 #include <lwk/percpu.h>
4 #include <lwk/aspace.h>
5 #include <arch/processor.h>
7 struct aspace bootstrap_aspace = {
8 BOOTSTRAP_ASPACE(bootstrap_aspace)
10 .pgd = (xpte_t *) init_level4_pgt
14 union task_union bootstrap_task_union
15 __attribute__((__section__(".data.bootstrap_task"))) =
17 /* Initialize task_union.task_info */
19 /* arch independent portion */
20 BOOTSTRAP_TASK(bootstrap_task_union.task_info)
22 /* x86_64 specific portion */
24 .addr_limit = PAGE_OFFSET
30 * Each CPU gets its own Task State Segment (TSS) structure. Tasks are
31 * completely 'soft' in the LWK, no more per-task TSS's and hardware task
32 * switching... we switch tasks completely in software. The TSS size is kept
33 * cacheline-aligned so they are allowed to end up in the
34 * .data.cacheline_aligned section. Since TSS's are completely CPU-local, we
35 * want them on exact cacheline boundaries, to eliminate cacheline ping-pong.
37 DEFINE_PER_CPU(struct tss_struct, tss)
38 ____cacheline_internodealigned_in_smp = BOOTSTRAP_TSS;