From: Peter Dinda <pdinda@northwestern.edu>
Date: Sun, 6 Apr 2014 21:48:21 +0000 (-0500)
Subject: Assorted minor fixes to the transactional memory code
X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=commitdiff_plain;h=ed72a7fb6a7ccbf370dbfa7900d2548ab34f3d63

Assorted minor fixes to the transactional memory code
---

diff --git a/palacios/include/extensions/tm_util.h b/palacios/include/extensions/tm_util.h
index 3af8cfe..c73a985 100644
--- a/palacios/include/extensions/tm_util.h
+++ b/palacios/include/extensions/tm_util.h
@@ -7,8 +7,8 @@
  * and the University of New Mexico.  You can find out more at 
  * http://www.v3vee.org
  *
- * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
- * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
+ * Copyright (c) 2012, NWU EECS 441 Transactional Memory Team  
+ * Copyright (c) 2012, The V3VEE Project <http://www.v3vee.org> 
  * All rights reserved.
  *
  * Author:  Maciek Swiech <dotpyfe@u.northwestern.edu>
@@ -32,11 +32,15 @@
         PrintError(_core->vm_info, _core, "TM %10s | " msg , #label, ##__VA_ARGS__); \
     } while (0);
 
+#ifdef V3_CONFIG_DEBUG_TM_FUNC
 #define TM_DBG(core, label, msg, ...) \
     do {                              \
         typeof (core) _core = (core);  \
         PrintDebug(_core->vm_info, _core, "TM %10s | " msg , #label, ##__VA_ARGS__); \
     } while (0);
+#else
+#define TM_DBG(cor, label, msg, ...) 
+#endif
 
 struct mem_op {
     addr_t   guest_addr;
diff --git a/palacios/src/extensions/Kconfig b/palacios/src/extensions/Kconfig
index 897d368..15fc290 100644
--- a/palacios/src/extensions/Kconfig
+++ b/palacios/src/extensions/Kconfig
@@ -54,17 +54,20 @@ config DEBUG_EXT_CPU_MAPPER_EDF
 	depends on DEBUG_ON && EXT_CPU_MAPPER_EDF
 
 config TM_FUNC
-        bool "Enable Intel RTM Emulation Support"
+        bool "Enable Intel Transactional Memory Emulation"
         default n
+	depends on SVM && QUIX86 && EXPERIMENTAL
         help
           Enable Palacios to emulate Intel's hardware
           transactional memory extensions. This is the
           Restricted Transactional Memory (RTM) featureset,
-          part of Intel's TSX extensions.
+          part of Intel's TSX extensions.  
+
+          Ironically, this feature is only implemented for AMD (SVM)
 
 config DEBUG_TM_FUNC
-    bool "Enable RTM debugging output"
-    depends on TM_FUNC
+    bool "Enable transactional memory emulation debugging output"
+    depends on DEBUG_ON && TM_FUNC
     default n
     help
         Enable Transactional Memory debugging output
diff --git a/palacios/src/extensions/tm_util.c b/palacios/src/extensions/tm_util.c
index 2401441..4b4f4d4 100644
--- a/palacios/src/extensions/tm_util.c
+++ b/palacios/src/extensions/tm_util.c
@@ -7,8 +7,8 @@
  * and the University of New Mexico.  You can find out more at 
  * http://www.v3vee.org
  *
- * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
- * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
+ * Copyright (c) 2012, NWU EECS 441 Transactional Memory Team  
+ * Copyright (c) 2012, The V3VEE Project <http://www.v3vee.org> 
  * All rights reserved.
  *
  * Author:  Maciek Swiech <dotpyfe@u.northwestern.edu>