VMCS_TSC_OFFSET_HIGH = 0x00002011,
VMCS_VAPIC_ADDR = 0x00002012,
VMCS_VAPIC_ADDR_HIGH = 0x00002013,
+ VMCS_APIC_ACCESS_ADDR = 0x00002014,
+ VMCS_APIC_ACCESS_ADDR_HIGH = 0x00002015,
/* 64 bit guest state fields */
VMCS_LINK_PTR = 0x00002800,
VMCS_LINK_PTR_HIGH = 0x00002801,
VMCS_GUEST_DBG_CTL_HIGH = 0x00002803,
VMCS_GUEST_PERF_GLOBAL_CTRL = 0x00002808,
VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH = 0x00002809,
+
+ VMCS_HOST_PERF_GLOBAL_CTRL = 0x00002c04,
+ VMCS_HOST_PERF_GLOBAL_CTRL_HIGH = 0x00002c05,
/* 32 bit control fields */
VMCS_PIN_CTRLS = 0x00004000,
VMCS_PROC_CTRLS = 0x00004002,
VMCS_ENTRY_EXCP_ERR = 0x00004018,
VMCS_ENTRY_INSTR_LEN = 0x0000401A,
VMCS_TPR_THRESHOLD = 0x0000401C,
+ VMCS_SEC_PROC_CTRLS = 0x0000401e,
/* 32 bit Read Only data fields */
VMCS_INSTR_ERR = 0x00004400,
VMCS_EXIT_REASON = 0x00004402,
int v3_vmcs_get_field_len(vmcs_field_t field);
const char* v3_vmcs_field_to_str(vmcs_field_t field);
-void v3_print_vmcs_guest_state();
-void v3_print_vmcs_host_state();
+void v3_print_vmcs();
+
/* VMCS Exit QUALIFICATIONs */
/******************************************/
/* VMX Intercept Exit Codes */
/******************************************/
-#define VMEXIT_INFO_EXCEPTION_OR_NMI 0
-#define VMEXIT_EXTERNAL_INTR 1
-#define VMEXIT_TRIPLE_FAULT 2
-#define VMEXIT_INIT_SIGNAL 3
-#define VMEXIT_STARTUP_IPI 4
-#define VMEXIT_IO_SMI 5
-#define VMEXIT_OTHER_SMI 6
-#define VMEXIT_INTR_WINDOW 7
-#define VMEXIT_NMI_WINDOW 8
-#define VMEXIT_TASK_SWITCH 9
-#define VMEXIT_CPUID 10
-#define VMEXIT_HLT 12
-#define VMEXIT_INVD 13
-#define VMEXIT_INVLPG 14
-#define VMEXIT_RDPMC 15
-#define VMEXIT_RDTSC 16
-#define VMEXIT_RSM 17
-#define VMEXIT_VMCALL 18
-#define VMEXIT_VMCLEAR 19
-#define VMEXIT_VMLAUNCH 20
-#define VMEXIT_VMPTRLD 21
-#define VMEXIT_VMPTRST 22
-#define VMEXIT_VMREAD 23
-#define VMEXIT_VMRESUME 24
-#define VMEXIT_VMWRITE 25
-#define VMEXIT_VMXOFF 26
-#define VMEXIT_VMXON 27
-#define VMEXIT_CR_REG_ACCESSES 28
-#define VMEXIT_MOV_DR 29
-#define VMEXIT_IO_INSTR 30
-#define VMEXIT_RDMSR 31
-#define VMEXIT_WRMSR 32
-#define VMEXIT_ENTRY_FAIL_INVALID_GUEST_STATE 33
-#define VMEXIT_ENTRY_FAIL_MSR_LOAD 34
-#define VMEXIT_MWAIT 36
-#define VMEXIT_MONITOR 39
-#define VMEXIT_PAUSE 40
-#define VMEXIT_ENTRY_FAILURE_MACHINE_CHECK 41
-#define VMEXIT_TPR_BELOW_THRESHOLD 43
+typedef enum {
+ VMEXIT_INFO_EXCEPTION_OR_NMI = 0,
+ VMEXIT_EXTERNAL_INTR = 1,
+ VMEXIT_TRIPLE_FAULT = 2,
+ VMEXIT_INIT_SIGNAL = 3,
+ VMEXIT_STARTUP_IPI = 4,
+ VMEXIT_IO_SMI = 5,
+ VMEXIT_OTHER_SMI = 6,
+ VMEXIT_INTR_WINDOW = 7,
+ VMEXIT_NMI_WINDOW = 8,
+ VMEXIT_TASK_SWITCH = 9,
+ VMEXIT_CPUID = 10,
+ VMEXIT_HLT = 12,
+ VMEXIT_INVD = 13,
+ VMEXIT_INVLPG = 14,
+ VMEXIT_RDPMC = 15,
+ VMEXIT_RDTSC = 16,
+ VMEXIT_RSM = 17,
+ VMEXIT_VMCALL = 18,
+ VMEXIT_VMCLEAR = 19,
+ VMEXIT_VMLAUNCH = 20,
+ VMEXIT_VMPTRLD = 21,
+ VMEXIT_VMPTRST = 22,
+ VMEXIT_VMREAD = 23,
+ VMEXIT_VMRESUME = 24,
+ VMEXIT_VMWRITE = 25,
+ VMEXIT_VMXOFF = 26,
+ VMEXIT_VMXON = 27,
+ VMEXIT_CR_REG_ACCESSES = 28,
+ VMEXIT_MOV_DR = 29,
+ VMEXIT_IO_INSTR = 30,
+ VMEXIT_RDMSR = 31,
+ VMEXIT_WRMSR = 32,
+ VMEXIT_ENTRY_FAIL_INVALID_GUEST_STATE = 33,
+ VMEXIT_ENTRY_FAIL_MSR_LOAD = 34,
+ VMEXIT_MWAIT = 36,
+ VMEXIT_MONITOR = 39,
+ VMEXIT_PAUSE = 40,
+ VMEXIT_ENTRY_FAILURE_MACHINE_CHECK = 41,
+ VMEXIT_TPR_BELOW_THRESHOLD = 43,
+ VMEXIT_APIC = 44,
+ VMEXIT_GDTR_IDTR = 46,
+ VMEXIT_LDTR_TR = 47,
+ VMEXIT_EPT_VIOLATION = 48,
+ VMEXIT_EPT_CONFIG = 49,
+ VMEXIT_INVEPT = 50,
+ VMEXIT_RDTSCP = 51,
+ VMEXIT_EXPIRED_PREEMPT_TIMER = 52,
+ VMEXIT_INVVPID = 53,
+ VMEXIT_WBINVD = 54,
+ VMEXIT_XSETBV = 55
+} vmx_exit_t;
-int v3_handle_vmx_exit(struct guest_info * info);
+int v3_handle_vmx_exit(struct v3_gprs * gprs);
#endif
return VMX_SUCCESS;
}
-static inline int vmcs_read(vmcs_field_t vmcs_field, void * dst, int len) {
+static inline int vmcs_read(vmcs_field_t vmcs_field, void * dst) {
uint64_t val = 0;
uint8_t ret_valid = 0;
uint8_t ret_invalid = 0;
CHECK_VMXFAIL(ret_valid, ret_invalid);
- switch(len)
+ switch(v3_vmcs_get_field_len(vmcs_field))
{
case 2:
*((uint16_t*)dst) = (uint16_t)val;
int len = v3_vmcs_get_field_len(vmcs_index);
addr_t val;
- if (vmcs_read(vmcs_index, &val, len) != VMX_SUCCESS) {
- PrintError("VMCS_READ error for index %x\n", vmcs_index);
+ if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
+ PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
return;
};
if (len == 2) {
- PrintDebug("%s: %x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
+ PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
} else if (len == 4) {
- PrintDebug("%s: %x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
+ PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
} else if (len == 8) {
- PrintDebug("%s: %p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
+ PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
}
}
-void v3_print_vmcs_guest_state()
+static void print_guest_state()
{
- PrintDebug("\n===== VMCS Guest State =====\n");
+ PrintDebug("VMCS_GUEST_STATE\n");
print_vmcs_field(VMCS_GUEST_RIP);
print_vmcs_field(VMCS_GUEST_RSP);
+ print_vmcs_field(VMCS_GUEST_RFLAGS);
print_vmcs_field(VMCS_GUEST_CR0);
print_vmcs_field(VMCS_GUEST_CR3);
print_vmcs_field(VMCS_GUEST_CR4);
print_vmcs_field(VMCS_GUEST_DR7);
- PrintDebug("\n=== CS Segment===\n");
+
+ PrintDebug("\n");
+
+ PrintDebug(" ==> CS\n");
print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
print_vmcs_field(VMCS_GUEST_CS_BASE);
print_vmcs_field(VMCS_GUEST_CS_LIMIT);
print_vmcs_field(VMCS_GUEST_CS_ACCESS);
- PrintDebug("\n=== SS Segment ===\n");
+ PrintDebug(" ==> SS\n");
print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
print_vmcs_field(VMCS_GUEST_SS_BASE);
print_vmcs_field(VMCS_GUEST_SS_LIMIT);
print_vmcs_field(VMCS_GUEST_SS_ACCESS);
- PrintDebug("\n=== DS Segment ===\n");
+ PrintDebug(" ==> DS\n");
print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
print_vmcs_field(VMCS_GUEST_DS_BASE);
print_vmcs_field(VMCS_GUEST_DS_LIMIT);
print_vmcs_field(VMCS_GUEST_DS_ACCESS);
- PrintDebug("\n=== ES Segment ===\n");
+ PrintDebug(" ==> ES\n");
print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
print_vmcs_field(VMCS_GUEST_ES_BASE);
print_vmcs_field(VMCS_GUEST_ES_LIMIT);
print_vmcs_field(VMCS_GUEST_ES_ACCESS);
- PrintDebug("\n=== FS Segment ===\n");
+ PrintDebug(" ==> FS\n");
print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
print_vmcs_field(VMCS_GUEST_FS_BASE);
print_vmcs_field(VMCS_GUEST_FS_LIMIT);
print_vmcs_field(VMCS_GUEST_FS_ACCESS);
- PrintDebug("\n=== GS Segment ===\n");
+ PrintDebug(" ==> GS\n");
print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
print_vmcs_field(VMCS_GUEST_GS_BASE);
print_vmcs_field(VMCS_GUEST_GS_LIMIT);
print_vmcs_field(VMCS_GUEST_GS_ACCESS);
- PrintDebug("\n=== LDTR Segment ===\n");
+ PrintDebug(" ==> LDTR\n");
print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
print_vmcs_field(VMCS_GUEST_LDTR_BASE);
print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
- PrintDebug("\n=== TR Segment ===\n");
+ PrintDebug(" ==> TR\n");
print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
print_vmcs_field(VMCS_GUEST_TR_BASE);
print_vmcs_field(VMCS_GUEST_TR_LIMIT);
print_vmcs_field(VMCS_GUEST_TR_ACCESS);
- PrintDebug("\n=== GDTR ===\n");
+ PrintDebug(" ==> GDTR\n");
print_vmcs_field(VMCS_GUEST_GDTR_BASE);
print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
- PrintDebug("\n=== IDTR ===\n");
+ PrintDebug(" ==> IDTR\n");
print_vmcs_field(VMCS_GUEST_IDTR_BASE);
print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
PrintDebug("\n");
- print_vmcs_field(VMCS_GUEST_RFLAGS);
- print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
- print_vmcs_field(VMCS_GUEST_INT_STATE);
- print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
print_vmcs_field(VMCS_GUEST_DBG_CTL);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
+#endif
print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
+
print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
- print_vmcs_field(VMCS_LINK_PTR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_GUEST_SMBASE);
+
+
+ PrintDebug("GUEST_NON_REGISTER_STATE\n");
+
+ print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
+ print_vmcs_field(VMCS_GUEST_INT_STATE);
+ print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
- PrintDebug("\n");
}
-void v3_print_vmcs_host_state()
+static void print_host_state()
{
- PrintDebug("=== Control Fields===\n");
- print_vmcs_field(VMCS_PIN_CTRLS);
- print_vmcs_field(VMCS_PROC_CTRLS);
- print_vmcs_field(VMCS_EXIT_CTRLS);
- print_vmcs_field(VMCS_ENTRY_CTRLS);
- print_vmcs_field(VMCS_EXCP_BITMAP);
+ PrintDebug("VMCS_HOST_STATE\n");
- PrintDebug("\n");
+ print_vmcs_field(VMCS_HOST_RIP);
+ print_vmcs_field(VMCS_HOST_RSP);
print_vmcs_field(VMCS_HOST_CR0);
print_vmcs_field(VMCS_HOST_CR3);
print_vmcs_field(VMCS_HOST_CR4);
- print_vmcs_field(VMCS_HOST_RSP);
- print_vmcs_field(VMCS_HOST_RIP);
- print_vmcs_field(VMCS_HOST_SYSENTER_CS);
- print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
- print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
- PrintDebug("\n=== Segment Registers===\n");
- PrintDebug("Selector:\n");
+ PrintDebug("\n");
print_vmcs_field(VMCS_HOST_CS_SELECTOR);
print_vmcs_field(VMCS_HOST_SS_SELECTOR);
print_vmcs_field(VMCS_HOST_DS_SELECTOR);
print_vmcs_field(VMCS_HOST_GS_SELECTOR);
print_vmcs_field(VMCS_HOST_TR_SELECTOR);
- PrintDebug("\nBase:\n");
+ PrintDebug("\n");
print_vmcs_field(VMCS_HOST_FS_BASE);
print_vmcs_field(VMCS_HOST_GS_BASE);
print_vmcs_field(VMCS_HOST_TR_BASE);
print_vmcs_field(VMCS_HOST_IDTR_BASE);
PrintDebug("\n");
+ print_vmcs_field(VMCS_HOST_SYSENTER_CS);
+ print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
+ print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
+
+ print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
+#endif
}
+
+static void print_exec_ctrls() {
+ PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
+ print_vmcs_field(VMCS_PIN_CTRLS);
+ print_vmcs_field(VMCS_PROC_CTRLS);
+ print_vmcs_field(VMCS_SEC_PROC_CTRLS);
+
+ print_vmcs_field(VMCS_EXCP_BITMAP);
+ print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
+ print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
+
+ print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
+#endif
+ print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_TSC_OFFSET);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
+#endif
+
+ PrintDebug("\n");
+
+ print_vmcs_field(VMCS_CR0_MASK);
+ print_vmcs_field(VMCS_CR0_READ_SHDW);
+ print_vmcs_field(VMCS_CR4_MASK);
+ print_vmcs_field(VMCS_CR4_READ_SHDW);
+
+ print_vmcs_field(VMCS_CR3_TGT_CNT);
+ print_vmcs_field(VMCS_CR3_TGT_VAL_0);
+ print_vmcs_field(VMCS_CR3_TGT_VAL_1);
+ print_vmcs_field(VMCS_CR3_TGT_VAL_2);
+ print_vmcs_field(VMCS_CR3_TGT_VAL_3);
+
+ PrintDebug("\n");
+
+ print_vmcs_field(VMCS_APIC_ACCESS_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_VAPIC_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_TPR_THRESHOLD);
+
+ print_vmcs_field(VMCS_MSR_BITMAP);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_EXEC_PTR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_EXEC_PTR_HIGH);
+#endif
+}
+
+
+static void print_exit_ctrls() {
+ PrintDebug("VMCS_EXIT_CTRLS\n");
+
+ print_vmcs_field(VMCS_EXIT_CTRLS);
+
+
+ print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
+ print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
+ print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
+#endif
+
+}
+
+
+static void print_entry_ctrls() {
+ PrintDebug("VMCS_ENTRY_CTRLS\n");
+
+ print_vmcs_field(VMCS_ENTRY_CTRLS);
+
+ print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
+ print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
+#endif
+
+ print_vmcs_field(VMCS_ENTRY_INT_INFO);
+ print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
+ print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
+
+
+}
+
+
+static void print_exit_info() {
+ PrintDebug("VMCS_EXIT_INFO\n");
+
+ print_vmcs_field(VMCS_EXIT_REASON);
+ print_vmcs_field(VMCS_EXIT_QUAL);
+
+ print_vmcs_field(VMCS_EXIT_INT_INFO);
+ print_vmcs_field(VMCS_EXIT_INT_ERR);
+
+ print_vmcs_field(VMCS_IDT_VECTOR_INFO);
+ print_vmcs_field(VMCS_IDT_VECTOR_ERR);
+
+ print_vmcs_field(VMCS_EXIT_INSTR_LEN);
+
+ print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
+ print_vmcs_field(VMCS_VMX_INSTR_INFO);
+
+ print_vmcs_field(VMCS_IO_RCX);
+ print_vmcs_field(VMCS_IO_RSI);
+ print_vmcs_field(VMCS_IO_RDI);
+ print_vmcs_field(VMCS_IO_RIP);
+
+
+ print_vmcs_field(VMCS_INSTR_ERR);
+}
+
+void v3_print_vmcs() {
+
+ print_vmcs_field(VMCS_LINK_PTR);
+#ifdef __V3_32BIT__
+ print_vmcs_field(VMCS_LINK_PTR_HIGH);
+#endif
+
+ print_guest_state();
+ print_host_state();
+
+ print_exec_ctrls();
+ print_exit_ctrls();
+ print_entry_ctrls();
+ print_exit_info();
+
+
+
+
+}
+
+
/*
* Returns the field length in bytes
*/
/* 32 bit Control Fields */
case VMCS_PIN_CTRLS:
case VMCS_PROC_CTRLS:
+ case VMCS_SEC_PROC_CTRLS:
case VMCS_EXCP_BITMAP:
case VMCS_PG_FAULT_ERR_MASK:
case VMCS_PG_FAULT_ERR_MATCH:
case VMCS_EXEC_PTR_HIGH:
case VMCS_TSC_OFFSET_HIGH:
case VMCS_VAPIC_ADDR_HIGH:
+ case VMCS_APIC_ACCESS_ADDR_HIGH:
case VMCS_LINK_PTR_HIGH:
case VMCS_GUEST_DBG_CTL_HIGH:
case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
+ case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
return 4;
/* Natural Width Control Fields */
case VMCS_EXEC_PTR:
case VMCS_TSC_OFFSET:
case VMCS_VAPIC_ADDR:
+ case VMCS_APIC_ACCESS_ADDR:
case VMCS_LINK_PTR:
case VMCS_GUEST_DBG_CTL:
case VMCS_GUEST_PERF_GLOBAL_CTRL:
+ case VMCS_HOST_PERF_GLOBAL_CTRL:
case VMCS_CR0_MASK:
case VMCS_CR4_MASK:
case VMCS_CR0_READ_SHDW:
static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
+static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
+static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
+static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
+static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
+static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
return VMCS_VAPIC_ADDR_STR;
case VMCS_VAPIC_ADDR_HIGH:
return VMCS_VAPIC_ADDR_HIGH_STR;
+ case VMCS_APIC_ACCESS_ADDR:
+ return VMCS_APIC_ACCESS_ADDR_STR;
+ case VMCS_APIC_ACCESS_ADDR_HIGH:
+ return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
case VMCS_LINK_PTR:
return VMCS_LINK_PTR_STR;
case VMCS_LINK_PTR_HIGH:
return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
+ case VMCS_HOST_PERF_GLOBAL_CTRL:
+ return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
+ case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
+ return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
case VMCS_PIN_CTRLS:
return VMCS_PIN_CTRLS_STR;
case VMCS_PROC_CTRLS:
return VMCS_ENTRY_INSTR_LEN_STR;
case VMCS_TPR_THRESHOLD:
return VMCS_TPR_THRESHOLD_STR;
+ case VMCS_SEC_PROC_CTRLS:
+ return VMCS_SEC_PROC_CTRLS_STR;
case VMCS_INSTR_ERR:
return VMCS_INSTR_ERR_STR;
case VMCS_EXIT_REASON:
+++ /dev/null
-; -*- fundamental -*-
-;;
-;; This file is part of the Palacios Virtual Machine Monitor developed
-;; by the V3VEE Project with funding from the United States National
-;; Science Foundation and the Department of Energy.
-;;
-;; The V3VEE Project is a joint project between Northwestern University
-;; and the University of New Mexico. You can find out more at
-;; http://www.v3vee.org
-;;
-;; Copyright (c) 2008, Peter Dinda <pdinda@northwestern.edu>
-;; Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
-;; Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
-;; All rights reserved.
-;;
-;; Author: Peter Dinda <pdinda@northwestern.edu>
-;; Jack Lange <jarusl@cs.northwestern.edu>
-;;
-;; This is free software. You are permitted to use,
-;; redistribute, and modify it as specified in the file "V3VEE_LICENSE".
-;;
-%ifndef VMCS_FIELDS_ASM
-%define VMCS_FIELDS_ASM
-
-VMCS_GUEST_ES_SELECTOR equ 0x00000800
-VMCS_GUEST_CS_SELECTOR equ 0x00000802
-VMCS_GUEST_SS_SELECTOR equ 0x00000804
-VMCS_GUEST_DS_SELECTOR equ 0x00000806
-VMCS_GUEST_FS_SELECTOR equ 0x00000808
-VMCS_GUEST_GS_SELECTOR equ 0x0000080A
-VMCS_GUEST_LDTR_SELECTOR equ 0x0000080C
-VMCS_GUEST_TR_SELECTOR equ 0x0000080E
-VMCS_HOST_ES_SELECTOR equ 0x00000C00
-VMCS_HOST_CS_SELECTOR equ 0x00000C02
-VMCS_HOST_SS_SELECTOR equ 0x00000C04
-VMCS_HOST_DS_SELECTOR equ 0x00000C06
-VMCS_HOST_FS_SELECTOR equ 0x00000C08
-VMCS_HOST_GS_SELECTOR equ 0x00000C0A
-VMCS_HOST_TR_SELECTOR equ 0x00000C0C
-IO_BITMAP_A_ADDR equ 0x00002000
-IO_BITMAP_A_ADDR_HIGH equ 0x00002001
-IO_BITMAP_B_ADDR equ 0x00002002
-IO_BITMAP_B_ADDR_HIGH equ 0x00002003
-MSR_BITMAPS equ 0x00002004
-MSR_BITMAPS_HIGH equ 0x00002005
-VM_EXIT_MSR_STORE_ADDR equ 0x00002006
-VM_EXIT_MSR_STORE_ADDR_HIGH equ 0x00002007
-VM_EXIT_MSR_LOAD_ADDR equ 0x00002008
-VM_EXIT_MSR_LOAD_ADDR_HIGH equ 0x00002009
-VM_ENTRY_MSR_LOAD_ADDR equ 0x0000200A
-VM_ENTRY_MSR_LOAD_ADDR_HIGH equ 0x0000200B
-VMCS_EXEC_PTR equ 0x0000200C
-VMCS_EXEC_PTR_HIGH equ 0x0000200D
-TSC_OFFSET equ 0x00002010
-TSC_OFFSET_HIGH equ 0x00002011
-VIRT_APIC_PAGE_ADDR equ 0x00002012
-VIRT_APIC_PAGE_ADDR_HIGH equ 0x00002013
-VMCS_LINK_PTR equ 0x00002800
-VMCS_LINK_PTR_HIGH equ 0x00002801
-GUEST_IA32_DEBUGCTL equ 0x00002802
-GUEST_IA32_DEBUGCTL_HIGH equ 0x00002803
-PIN_VM_EXEC_CTRLS equ 0x00004000
-PROC_VM_EXEC_CTRLS equ 0x00004002
-EXCEPTION_BITMAP equ 0x00004004
-PAGE_FAULT_ERROR_MASK equ 0x00004006
-PAGE_FAULT_ERROR_MATCH equ 0x00004008
-CR3_TARGET_COUNT equ 0x0000400A
-VM_EXIT_CTRLS equ 0x0000400C
-VM_EXIT_MSR_STORE_COUNT equ 0x0000400E
-VM_EXIT_MSR_LOAD_COUNT equ 0x00004010
-VM_ENTRY_CTRLS equ 0x00004012
-VM_ENTRY_MSR_LOAD_COUNT equ 0x00004014
-VM_ENTRY_INT_INFO_FIELD equ 0x00004016
-VM_ENTRY_EXCEPTION_ERROR equ 0x00004018
-VM_ENTRY_INSTR_LENGTH equ 0x0000401A
-TPR_THRESHOLD equ 0x0000401C
-VM_INSTR_ERROR equ 0x00004400
-EXIT_REASON equ 0x00004402
-VM_EXIT_INT_INFO equ 0x00004404
-VM_EXIT_INT_ERROR equ 0x00004406
-IDT_VECTOR_INFO equ 0x00004408
-IDT_VECTOR_ERROR equ 0x0000440A
-VM_EXIT_INSTR_LENGTH equ 0x0000440C
-VMX_INSTR_INFO equ 0x0000440E
-GUEST_ES_LIMIT equ 0x00004800
-GUEST_CS_LIMIT equ 0x00004802
-GUEST_SS_LIMIT equ 0x00004804
-GUEST_DS_LIMIT equ 0x00004806
-GUEST_FS_LIMIT equ 0x00004808
-GUEST_GS_LIMIT equ 0x0000480A
-GUEST_LDTR_LIMIT equ 0x0000480C
-GUEST_TR_LIMIT equ 0x0000480E
-GUEST_GDTR_LIMIT equ 0x00004810
-GUEST_IDTR_LIMIT equ 0x00004812
-GUEST_ES_ACCESS equ 0x00004814
-GUEST_CS_ACCESS equ 0x00004816
-GUEST_SS_ACCESS equ 0x00004818
-GUEST_DS_ACCESS equ 0x0000481A
-GUEST_FS_ACCESS equ 0x0000481C
-GUEST_GS_ACCESS equ 0x0000481E
-GUEST_LDTR_ACCESS equ 0x00004820
-GUEST_TR_ACCESS equ 0x00004822
-GUEST_INT_STATE equ 0x00004824
-GUEST_ACTIVITY_STATE equ 0x00004826
-GUEST_SMBASE equ 0x00004828
-GUEST_IA32_SYSENTER_CS equ 0x0000482A
-HOST_IA32_SYSENTER_CS equ 0x00004C00
-CR0_GUEST_HOST_MASK equ 0x00006000
-CR4_GUEST_HOST_MASK equ 0x00006002
-CR0_READ_SHADOW equ 0x00006004
-CR4_READ_SHADOW equ 0x00006006
-CR3_TARGET_VALUE_0 equ 0x00006008
-CR3_TARGET_VALUE_1 equ 0x0000600A
-CR3_TARGET_VALUE_2 equ 0x0000600C
-CR3_TARGET_VALUE_3 equ 0x0000600E
-EXIT_QUALIFICATION equ 0x00006400
-IO_RCX equ 0x00006402
-IO_RSI equ 0x00006404
-IO_RDI equ 0x00006406
-IO_RIP equ 0x00006408
-GUEST_LINEAR_ADDR equ 0x0000640A
-GUEST_CR0 equ 0x00006800
-GUEST_CR3 equ 0x00006802
-GUEST_CR4 equ 0x00006804
-GUEST_ES_BASE equ 0x00006806
-GUEST_CS_BASE equ 0x00006808
-GUEST_SS_BASE equ 0x0000680A
-GUEST_DS_BASE equ 0x0000680C
-GUEST_FS_BASE equ 0x0000680E
-GUEST_GS_BASE equ 0x00006810
-GUEST_LDTR_BASE equ 0x00006812
-GUEST_TR_BASE equ 0x00006814
-GUEST_GDTR_BASE equ 0x00006816
-GUEST_IDTR_BASE equ 0x00006818
-GUEST_DR7 equ 0x0000681A
-GUEST_RSP equ 0x0000681C
-GUEST_RIP equ 0x0000681E
-GUEST_RFLAGS equ 0x00006820
-GUEST_PENDING_DEBUG_EXCS equ 0x00006822
-GUEST_IA32_SYSENTER_ESP equ 0x00006824
-GUEST_IA32_SYSENTER_EIP equ 0x00006826
-HOST_CR0 equ 0x00006C00
-HOST_CR3 equ 0x00006C02
-HOST_CR4 equ 0x00006C04
-HOST_FS_BASE equ 0x00006C06
-HOST_GS_BASE equ 0x00006C08
-HOST_TR_BASE equ 0x00006C0A
-HOST_GDTR_BASE equ 0x00006C0C
-HOST_IDTR_BASE equ 0x00006C0E
-HOST_IA32_SYSENTER_ESP equ 0x00006C10
-HOST_IA32_SYSENTER_EIP equ 0x00006C12
-HOST_RSP equ 0x00006C14
-HOST_RIP equ 0x00006C16
-
-%endif
-
+++ /dev/null
-/*
- * This file is part of the Palacios Virtual Machine Monitor developed
- * by the V3VEE Project with funding from the United States National
- * Science Foundation and the Department of Energy.
- *
- * The V3VEE Project is a joint project between Northwestern University
- * and the University of New Mexico. You can find out more at
- * http://www.v3vee.org
- *
- * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
- * All rights reserved.
- *
- * Author: Automatically Generated File
- *
- * This is free software. You are permitted to use,
- * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
- */
-
-#include <palacios/vmcs_gen.h>
-
-
-
-void PrintTrace_VMCS_GUEST_ES_SELECTOR() { PrintTrace("VMCS_GUEST_ES_SELECTOR = %x\n", Get_VMCS_GUEST_ES_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_CS_SELECTOR() { PrintTrace("VMCS_GUEST_CS_SELECTOR = %x\n", Get_VMCS_GUEST_CS_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_SS_SELECTOR() { PrintTrace("VMCS_GUEST_SS_SELECTOR = %x\n", Get_VMCS_GUEST_SS_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_DS_SELECTOR() { PrintTrace("VMCS_GUEST_DS_SELECTOR = %x\n", Get_VMCS_GUEST_DS_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_FS_SELECTOR() { PrintTrace("VMCS_GUEST_FS_SELECTOR = %x\n", Get_VMCS_GUEST_FS_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_GS_SELECTOR() { PrintTrace("VMCS_GUEST_GS_SELECTOR = %x\n", Get_VMCS_GUEST_GS_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_LDTR_SELECTOR() { PrintTrace("VMCS_GUEST_LDTR_SELECTOR = %x\n", Get_VMCS_GUEST_LDTR_SELECTOR()); }
-void PrintTrace_VMCS_GUEST_TR_SELECTOR() { PrintTrace("VMCS_GUEST_TR_SELECTOR = %x\n", Get_VMCS_GUEST_TR_SELECTOR()); }
-void PrintTrace_VMCS_HOST_ES_SELECTOR() { PrintTrace("VMCS_HOST_ES_SELECTOR = %x\n", Get_VMCS_HOST_ES_SELECTOR()); }
-void PrintTrace_VMCS_HOST_CS_SELECTOR() { PrintTrace("VMCS_HOST_CS_SELECTOR = %x\n", Get_VMCS_HOST_CS_SELECTOR()); }
-void PrintTrace_VMCS_HOST_SS_SELECTOR() { PrintTrace("VMCS_HOST_SS_SELECTOR = %x\n", Get_VMCS_HOST_SS_SELECTOR()); }
-void PrintTrace_VMCS_HOST_DS_SELECTOR() { PrintTrace("VMCS_HOST_DS_SELECTOR = %x\n", Get_VMCS_HOST_DS_SELECTOR()); }
-void PrintTrace_VMCS_HOST_FS_SELECTOR() { PrintTrace("VMCS_HOST_FS_SELECTOR = %x\n", Get_VMCS_HOST_FS_SELECTOR()); }
-void PrintTrace_VMCS_HOST_GS_SELECTOR() { PrintTrace("VMCS_HOST_GS_SELECTOR = %x\n", Get_VMCS_HOST_GS_SELECTOR()); }
-void PrintTrace_VMCS_HOST_TR_SELECTOR() { PrintTrace("VMCS_HOST_TR_SELECTOR = %x\n", Get_VMCS_HOST_TR_SELECTOR()); }
-void PrintTrace_IO_BITMAP_A_ADDR() { PrintTrace("IO_BITMAP_A_ADDR = %x\n", Get_IO_BITMAP_A_ADDR()); }
-void PrintTrace_IO_BITMAP_A_ADDR_HIGH() { PrintTrace("IO_BITMAP_A_ADDR_HIGH = %x\n", Get_IO_BITMAP_A_ADDR_HIGH()); }
-void PrintTrace_IO_BITMAP_B_ADDR() { PrintTrace("IO_BITMAP_B_ADDR = %x\n", Get_IO_BITMAP_B_ADDR()); }
-void PrintTrace_IO_BITMAP_B_ADDR_HIGH() { PrintTrace("IO_BITMAP_B_ADDR_HIGH = %x\n", Get_IO_BITMAP_B_ADDR_HIGH()); }
-void PrintTrace_MSR_BITMAPS() { PrintTrace("MSR_BITMAPS = %x\n", Get_MSR_BITMAPS()); }
-void PrintTrace_MSR_BITMAPS_HIGH() { PrintTrace("MSR_BITMAPS_HIGH = %x\n", Get_MSR_BITMAPS_HIGH()); }
-void PrintTrace_VM_EXIT_MSR_STORE_ADDR() { PrintTrace("VM_EXIT_MSR_STORE_ADDR = %x\n", Get_VM_EXIT_MSR_STORE_ADDR()); }
-void PrintTrace_VM_EXIT_MSR_STORE_ADDR_HIGH() { PrintTrace("VM_EXIT_MSR_STORE_ADDR_HIGH = %x\n", Get_VM_EXIT_MSR_STORE_ADDR_HIGH()); }
-void PrintTrace_VM_EXIT_MSR_LOAD_ADDR() { PrintTrace("VM_EXIT_MSR_LOAD_ADDR = %x\n", Get_VM_EXIT_MSR_LOAD_ADDR()); }
-void PrintTrace_VM_EXIT_MSR_LOAD_ADDR_HIGH() { PrintTrace("VM_EXIT_MSR_LOAD_ADDR_HIGH = %x\n", Get_VM_EXIT_MSR_LOAD_ADDR_HIGH()); }
-void PrintTrace_VM_ENTRY_MSR_LOAD_ADDR() { PrintTrace("VM_ENTRY_MSR_LOAD_ADDR = %x\n", Get_VM_ENTRY_MSR_LOAD_ADDR()); }
-void PrintTrace_VM_ENTRY_MSR_LOAD_ADDR_HIGH() { PrintTrace("VM_ENTRY_MSR_LOAD_ADDR_HIGH = %x\n", Get_VM_ENTRY_MSR_LOAD_ADDR_HIGH()); }
-void PrintTrace_VMCS_EXEC_PTR() { PrintTrace("VMCS_EXEC_PTR = %x\n", Get_VMCS_EXEC_PTR()); }
-void PrintTrace_VMCS_EXEC_PTR_HIGH() { PrintTrace("VMCS_EXEC_PTR_HIGH = %x\n", Get_VMCS_EXEC_PTR_HIGH()); }
-void PrintTrace_TSC_OFFSET() { PrintTrace("TSC_OFFSET = %x\n", Get_TSC_OFFSET()); }
-void PrintTrace_TSC_OFFSET_HIGH() { PrintTrace("TSC_OFFSET_HIGH = %x\n", Get_TSC_OFFSET_HIGH()); }
-void PrintTrace_VIRT_APIC_PAGE_ADDR() { PrintTrace("VIRT_APIC_PAGE_ADDR = %x\n", Get_VIRT_APIC_PAGE_ADDR()); }
-void PrintTrace_VIRT_APIC_PAGE_ADDR_HIGH() { PrintTrace("VIRT_APIC_PAGE_ADDR_HIGH = %x\n", Get_VIRT_APIC_PAGE_ADDR_HIGH()); }
-void PrintTrace_VMCS_LINK_PTR() { PrintTrace("VMCS_LINK_PTR = %x\n", Get_VMCS_LINK_PTR()); }
-void PrintTrace_VMCS_LINK_PTR_HIGH() { PrintTrace("VMCS_LINK_PTR_HIGH = %x\n", Get_VMCS_LINK_PTR_HIGH()); }
-void PrintTrace_GUEST_IA32_DEBUGCTL() { PrintTrace("GUEST_IA32_DEBUGCTL = %x\n", Get_GUEST_IA32_DEBUGCTL()); }
-void PrintTrace_GUEST_IA32_DEBUGCTL_HIGH() { PrintTrace("GUEST_IA32_DEBUGCTL_HIGH = %x\n", Get_GUEST_IA32_DEBUGCTL_HIGH()); }
-void PrintTrace_PIN_VM_EXEC_CTRLS() { PrintTrace("PIN_VM_EXEC_CTRLS = %x\n", Get_PIN_VM_EXEC_CTRLS()); }
-void PrintTrace_PROC_VM_EXEC_CTRLS() { PrintTrace("PROC_VM_EXEC_CTRLS = %x\n", Get_PROC_VM_EXEC_CTRLS()); }
-void PrintTrace_EXCEPTION_BITMAP() { PrintTrace("EXCEPTION_BITMAP = %x\n", Get_EXCEPTION_BITMAP()); }
-void PrintTrace_PAGE_FAULT_ERROR_MASK() { PrintTrace("PAGE_FAULT_ERROR_MASK = %x\n", Get_PAGE_FAULT_ERROR_MASK()); }
-void PrintTrace_PAGE_FAULT_ERROR_MATCH() { PrintTrace("PAGE_FAULT_ERROR_MATCH = %x\n", Get_PAGE_FAULT_ERROR_MATCH()); }
-void PrintTrace_CR3_TARGET_COUNT() { PrintTrace("CR3_TARGET_COUNT = %x\n", Get_CR3_TARGET_COUNT()); }
-void PrintTrace_VM_EXIT_CTRLS() { PrintTrace("VM_EXIT_CTRLS = %x\n", Get_VM_EXIT_CTRLS()); }
-void PrintTrace_VM_EXIT_MSR_STORE_COUNT() { PrintTrace("VM_EXIT_MSR_STORE_COUNT = %x\n", Get_VM_EXIT_MSR_STORE_COUNT()); }
-void PrintTrace_VM_EXIT_MSR_LOAD_COUNT() { PrintTrace("VM_EXIT_MSR_LOAD_COUNT = %x\n", Get_VM_EXIT_MSR_LOAD_COUNT()); }
-void PrintTrace_VM_ENTRY_CTRLS() { PrintTrace("VM_ENTRY_CTRLS = %x\n", Get_VM_ENTRY_CTRLS()); }
-void PrintTrace_VM_ENTRY_MSR_LOAD_COUNT() { PrintTrace("VM_ENTRY_MSR_LOAD_COUNT = %x\n", Get_VM_ENTRY_MSR_LOAD_COUNT()); }
-void PrintTrace_VM_ENTRY_INT_INFO_FIELD() { PrintTrace("VM_ENTRY_INT_INFO_FIELD = %x\n", Get_VM_ENTRY_INT_INFO_FIELD()); }
-void PrintTrace_VM_ENTRY_EXCEPTION_ERROR() { PrintTrace("VM_ENTRY_EXCEPTION_ERROR = %x\n", Get_VM_ENTRY_EXCEPTION_ERROR()); }
-void PrintTrace_VM_ENTRY_INSTR_LENGTH() { PrintTrace("VM_ENTRY_INSTR_LENGTH = %x\n", Get_VM_ENTRY_INSTR_LENGTH()); }
-void PrintTrace_TPR_THRESHOLD() { PrintTrace("TPR_THRESHOLD = %x\n", Get_TPR_THRESHOLD()); }
-void PrintTrace_VM_INSTR_ERROR() { PrintTrace("VM_INSTR_ERROR = %x\n", Get_VM_INSTR_ERROR()); }
-void PrintTrace_EXIT_REASON() { PrintTrace("EXIT_REASON = %x\n", Get_EXIT_REASON()); }
-void PrintTrace_VM_EXIT_INT_INFO() { PrintTrace("VM_EXIT_INT_INFO = %x\n", Get_VM_EXIT_INT_INFO()); }
-void PrintTrace_VM_EXIT_INT_ERROR() { PrintTrace("VM_EXIT_INT_ERROR = %x\n", Get_VM_EXIT_INT_ERROR()); }
-void PrintTrace_IDT_VECTOR_INFO() { PrintTrace("IDT_VECTOR_INFO = %x\n", Get_IDT_VECTOR_INFO()); }
-void PrintTrace_IDT_VECTOR_ERROR() { PrintTrace("IDT_VECTOR_ERROR = %x\n", Get_IDT_VECTOR_ERROR()); }
-void PrintTrace_VM_EXIT_INSTR_LENGTH() { PrintTrace("VM_EXIT_INSTR_LENGTH = %x\n", Get_VM_EXIT_INSTR_LENGTH()); }
-void PrintTrace_VMX_INSTR_INFO() { PrintTrace("VMX_INSTR_INFO = %x\n", Get_VMX_INSTR_INFO()); }
-void PrintTrace_GUEST_ES_LIMIT() { PrintTrace("GUEST_ES_LIMIT = %x\n", Get_GUEST_ES_LIMIT()); }
-void PrintTrace_GUEST_CS_LIMIT() { PrintTrace("GUEST_CS_LIMIT = %x\n", Get_GUEST_CS_LIMIT()); }
-void PrintTrace_GUEST_SS_LIMIT() { PrintTrace("GUEST_SS_LIMIT = %x\n", Get_GUEST_SS_LIMIT()); }
-void PrintTrace_GUEST_DS_LIMIT() { PrintTrace("GUEST_DS_LIMIT = %x\n", Get_GUEST_DS_LIMIT()); }
-void PrintTrace_GUEST_FS_LIMIT() { PrintTrace("GUEST_FS_LIMIT = %x\n", Get_GUEST_FS_LIMIT()); }
-void PrintTrace_GUEST_GS_LIMIT() { PrintTrace("GUEST_GS_LIMIT = %x\n", Get_GUEST_GS_LIMIT()); }
-void PrintTrace_GUEST_LDTR_LIMIT() { PrintTrace("GUEST_LDTR_LIMIT = %x\n", Get_GUEST_LDTR_LIMIT()); }
-void PrintTrace_GUEST_TR_LIMIT() { PrintTrace("GUEST_TR_LIMIT = %x\n", Get_GUEST_TR_LIMIT()); }
-void PrintTrace_GUEST_GDTR_LIMIT() { PrintTrace("GUEST_GDTR_LIMIT = %x\n", Get_GUEST_GDTR_LIMIT()); }
-void PrintTrace_GUEST_IDTR_LIMIT() { PrintTrace("GUEST_IDTR_LIMIT = %x\n", Get_GUEST_IDTR_LIMIT()); }
-void PrintTrace_GUEST_ES_ACCESS() { PrintTrace("GUEST_ES_ACCESS = %x\n", Get_GUEST_ES_ACCESS()); }
-void PrintTrace_GUEST_CS_ACCESS() { PrintTrace("GUEST_CS_ACCESS = %x\n", Get_GUEST_CS_ACCESS()); }
-void PrintTrace_GUEST_SS_ACCESS() { PrintTrace("GUEST_SS_ACCESS = %x\n", Get_GUEST_SS_ACCESS()); }
-void PrintTrace_GUEST_DS_ACCESS() { PrintTrace("GUEST_DS_ACCESS = %x\n", Get_GUEST_DS_ACCESS()); }
-void PrintTrace_GUEST_FS_ACCESS() { PrintTrace("GUEST_FS_ACCESS = %x\n", Get_GUEST_FS_ACCESS()); }
-void PrintTrace_GUEST_GS_ACCESS() { PrintTrace("GUEST_GS_ACCESS = %x\n", Get_GUEST_GS_ACCESS()); }
-void PrintTrace_GUEST_LDTR_ACCESS() { PrintTrace("GUEST_LDTR_ACCESS = %x\n", Get_GUEST_LDTR_ACCESS()); }
-void PrintTrace_GUEST_TR_ACCESS() { PrintTrace("GUEST_TR_ACCESS = %x\n", Get_GUEST_TR_ACCESS()); }
-void PrintTrace_GUEST_INT_STATE() { PrintTrace("GUEST_INT_STATE = %x\n", Get_GUEST_INT_STATE()); }
-void PrintTrace_GUEST_ACTIVITY_STATE() { PrintTrace("GUEST_ACTIVITY_STATE = %x\n", Get_GUEST_ACTIVITY_STATE()); }
-void PrintTrace_GUEST_SMBASE() { PrintTrace("GUEST_SMBASE = %x\n", Get_GUEST_SMBASE()); }
-void PrintTrace_GUEST_IA32_SYSENTER_CS() { PrintTrace("GUEST_IA32_SYSENTER_CS = %x\n", Get_GUEST_IA32_SYSENTER_CS()); }
-void PrintTrace_HOST_IA32_SYSENTER_CS() { PrintTrace("HOST_IA32_SYSENTER_CS = %x\n", Get_HOST_IA32_SYSENTER_CS()); }
-void PrintTrace_CR0_GUEST_HOST_MASK() { PrintTrace("CR0_GUEST_HOST_MASK = %x\n", Get_CR0_GUEST_HOST_MASK()); }
-void PrintTrace_CR4_GUEST_HOST_MASK() { PrintTrace("CR4_GUEST_HOST_MASK = %x\n", Get_CR4_GUEST_HOST_MASK()); }
-void PrintTrace_CR0_READ_SHADOW() { PrintTrace("CR0_READ_SHADOW = %x\n", Get_CR0_READ_SHADOW()); }
-void PrintTrace_CR4_READ_SHADOW() { PrintTrace("CR4_READ_SHADOW = %x\n", Get_CR4_READ_SHADOW()); }
-void PrintTrace_CR3_TARGET_VALUE_0() { PrintTrace("CR3_TARGET_VALUE_0 = %x\n", Get_CR3_TARGET_VALUE_0()); }
-void PrintTrace_CR3_TARGET_VALUE_1() { PrintTrace("CR3_TARGET_VALUE_1 = %x\n", Get_CR3_TARGET_VALUE_1()); }
-void PrintTrace_CR3_TARGET_VALUE_2() { PrintTrace("CR3_TARGET_VALUE_2 = %x\n", Get_CR3_TARGET_VALUE_2()); }
-void PrintTrace_CR3_TARGET_VALUE_3() { PrintTrace("CR3_TARGET_VALUE_3 = %x\n", Get_CR3_TARGET_VALUE_3()); }
-void PrintTrace_EXIT_QUALIFICATION() { PrintTrace("EXIT_QUALIFICATION = %x\n", Get_EXIT_QUALIFICATION()); }
-void PrintTrace_IO_RCX() { PrintTrace("IO_RCX = %x\n", Get_IO_RCX()); }
-void PrintTrace_IO_RSI() { PrintTrace("IO_RSI = %x\n", Get_IO_RSI()); }
-void PrintTrace_IO_RDI() { PrintTrace("IO_RDI = %x\n", Get_IO_RDI()); }
-void PrintTrace_IO_RIP() { PrintTrace("IO_RIP = %x\n", Get_IO_RIP()); }
-void PrintTrace_GUEST_LINEAR_ADDR() { PrintTrace("GUEST_LINEAR_ADDR = %x\n", Get_GUEST_LINEAR_ADDR()); }
-void PrintTrace_GUEST_CR0() { PrintTrace("GUEST_CR0 = %x\n", Get_GUEST_CR0()); }
-void PrintTrace_GUEST_CR3() { PrintTrace("GUEST_CR3 = %x\n", Get_GUEST_CR3()); }
-void PrintTrace_GUEST_CR4() { PrintTrace("GUEST_CR4 = %x\n", Get_GUEST_CR4()); }
-void PrintTrace_GUEST_ES_BASE() { PrintTrace("GUEST_ES_BASE = %x\n", Get_GUEST_ES_BASE()); }
-void PrintTrace_GUEST_CS_BASE() { PrintTrace("GUEST_CS_BASE = %x\n", Get_GUEST_CS_BASE()); }
-void PrintTrace_GUEST_SS_BASE() { PrintTrace("GUEST_SS_BASE = %x\n", Get_GUEST_SS_BASE()); }
-void PrintTrace_GUEST_DS_BASE() { PrintTrace("GUEST_DS_BASE = %x\n", Get_GUEST_DS_BASE()); }
-void PrintTrace_GUEST_FS_BASE() { PrintTrace("GUEST_FS_BASE = %x\n", Get_GUEST_FS_BASE()); }
-void PrintTrace_GUEST_GS_BASE() { PrintTrace("GUEST_GS_BASE = %x\n", Get_GUEST_GS_BASE()); }
-void PrintTrace_GUEST_LDTR_BASE() { PrintTrace("GUEST_LDTR_BASE = %x\n", Get_GUEST_LDTR_BASE()); }
-void PrintTrace_GUEST_TR_BASE() { PrintTrace("GUEST_TR_BASE = %x\n", Get_GUEST_TR_BASE()); }
-void PrintTrace_GUEST_GDTR_BASE() { PrintTrace("GUEST_GDTR_BASE = %x\n", Get_GUEST_GDTR_BASE()); }
-void PrintTrace_GUEST_IDTR_BASE() { PrintTrace("GUEST_IDTR_BASE = %x\n", Get_GUEST_IDTR_BASE()); }
-void PrintTrace_GUEST_DR7() { PrintTrace("GUEST_DR7 = %x\n", Get_GUEST_DR7()); }
-void PrintTrace_GUEST_RSP() { PrintTrace("GUEST_RSP = %x\n", Get_GUEST_RSP()); }
-void PrintTrace_GUEST_RIP() { PrintTrace("GUEST_RIP = %x\n", Get_GUEST_RIP()); }
-void PrintTrace_GUEST_RFLAGS() { PrintTrace("GUEST_RFLAGS = %x\n", Get_GUEST_RFLAGS()); }
-void PrintTrace_GUEST_PENDING_DEBUG_EXCS() { PrintTrace("GUEST_PENDING_DEBUG_EXCS = %x\n", Get_GUEST_PENDING_DEBUG_EXCS()); }
-void PrintTrace_GUEST_IA32_SYSENTER_ESP() { PrintTrace("GUEST_IA32_SYSENTER_ESP = %x\n", Get_GUEST_IA32_SYSENTER_ESP()); }
-void PrintTrace_GUEST_IA32_SYSENTER_EIP() { PrintTrace("GUEST_IA32_SYSENTER_EIP = %x\n", Get_GUEST_IA32_SYSENTER_EIP()); }
-void PrintTrace_HOST_CR0() { PrintTrace("HOST_CR0 = %x\n", Get_HOST_CR0()); }
-void PrintTrace_HOST_CR3() { PrintTrace("HOST_CR3 = %x\n", Get_HOST_CR3()); }
-void PrintTrace_HOST_CR4() { PrintTrace("HOST_CR4 = %x\n", Get_HOST_CR4()); }
-void PrintTrace_HOST_FS_BASE() { PrintTrace("HOST_FS_BASE = %x\n", Get_HOST_FS_BASE()); }
-void PrintTrace_HOST_GS_BASE() { PrintTrace("HOST_GS_BASE = %x\n", Get_HOST_GS_BASE()); }
-void PrintTrace_HOST_TR_BASE() { PrintTrace("HOST_TR_BASE = %x\n", Get_HOST_TR_BASE()); }
-void PrintTrace_HOST_GDTR_BASE() { PrintTrace("HOST_GDTR_BASE = %x\n", Get_HOST_GDTR_BASE()); }
-void PrintTrace_HOST_IDTR_BASE() { PrintTrace("HOST_IDTR_BASE = %x\n", Get_HOST_IDTR_BASE()); }
-void PrintTrace_HOST_IA32_SYSENTER_ESP() { PrintTrace("HOST_IA32_SYSENTER_ESP = %x\n", Get_HOST_IA32_SYSENTER_ESP()); }
-void PrintTrace_HOST_IA32_SYSENTER_EIP() { PrintTrace("HOST_IA32_SYSENTER_EIP = %x\n", Get_HOST_IA32_SYSENTER_EIP()); }
-void PrintTrace_HOST_RSP() { PrintTrace("HOST_RSP = %x\n", Get_HOST_RSP()); }
-void PrintTrace_HOST_RIP() { PrintTrace("HOST_RIP = %x\n", Get_HOST_RIP()); }
-
-
-
-static void print_guest_segments() {
- struct vmcs_segment tmp_seg;
- int i = 0;
-
- char names[] = {"CS", "SS", "DS", "ES", "FS", "GS", "LDTR", "TR"};
-
- uint32_t sels[] = { VMCS_GUEST_CS_SELECTOR,
- VMCS_GUEST_SS_SELECTOR,
- VMCS_GUEST_DS_SELECTOR,
- VMCS_GUEST_ES_SELECTOR,
- VMCS_GUEST_FS_SELECTOR,
- VMCS_GUEST_GS_SELECTOR,
- VMCS_GUEST_LDTR_SELECTOR,
- VMCS_GUEST_TR_SELECTOR };
-
- uint32_t bases[] = { VMCS_GUEST_CS_BASE,
- VMCS_GUEST_SS_BASE,
- VMCS_GUEST_DS_BASE,
- VMCS_GUEST_ES_BASE,
- VMCS_GUEST_FS_BASE,
- VMCS_GUEST_GS_BASE,
- VMCS_GUEST_LDTR_BASE,
- VMCS_GUEST_TR_BASE };
-
- uint32_t limits[] = { VMCS_GUEST_CS_LIMIT,
- VMCS_GUEST_SS_LIMIT,
- VMCS_GUEST_DS_LIMIT,
- VMCS_GUEST_ES_LIMIT,
- VMCS_GUEST_FS_LIMIT,
- VMCS_GUEST_GS_LIMIT,
- VMCS_GUEST_LDTR_LIMIT,
- VMCS_GUEST_TR_LIMIT };
-
- uint32_t accesses[] = { VMCS_GUEST_CS_ACCESS,
- VMCS_GUEST_SS_ACCESS,
- VMCS_GUEST_DS_ACCESS,
- VMCS_GUEST_ES_ACCESS,
- VMCS_GUEST_FS_ACCESS,
- VMCS_GUEST_GS_ACCESS,
- VMCS_GUEST_LDTR_ACCESS,
- VMCS_GUEST_TR_ACCESS };
-
-
- for (i = 0; i < 8; i++) {
- vmcs_read(sels[i], &(tmp_seg.selector), 2);
- vmcs_read(bases[i], &(tmp_seg.base), 4);
- vmcs_read(limits[i], &(tmp_seg.limit), 4);
- vmcs_read(accesses[i], &(tmp_seg.access.value), 4);
-
- }
-
-
- VMCS_GUEST_GDTR_BASE;
- VMCS_GUEST_GDTR_LIMIT;
-
- VMCS_GUEST_IDTR_BASE;
- VMCS_GUEST_IDTR_LIMIT;
-
-
-}
-
-
-static void print_guest_reg_state() {
- PrintDebug(" Guest Register State\n");
- PrintDebug("\tGuest Ctrl Regs\n");
-
- PrintDebug_GUEST_CR0();
- PrintDebug_GUEST_CR3();
- PrintDebug_GUEST_CR4();
-
- PrintDebug_GUEST_DR7();
-
- PrintDebug_GUEST_RSP();
- PrintDebug_GUEST_RIP();
- PrintDebug_GUEST_RFLAGS();
- PrintDebug_GUEST_IA32_DEBUGCTL();
- PrintDebug_GUEST_IA32_DEBUGCTL_HIGH();
- PrintDebug_GUEST_IA32_SYSENTER_CS();
- PrintDebug_GUEST_IA32_SYSENTER_ESP();
- PrintDebug_GUEST_IA32_SYSENTER_EIP();
- PrintDebug_GUEST_SMBASE();
-
-
-
-}
-
-
-void PrintVMCS() {
-
- PrintDebug("==>Guest State Area\n");
-
- PrintDebug("==>==> Guest Non-Register State\n");
- PrintDebug_GUEST_ACTIVITY_STATE();
- PrintDebug_GUEST_INT_STATE();
- PrintDebug_GUEST_PENDING_DEBUG_EXCS();
- PrintDebug_VMCS_LINK_PTR();
- PrintDebug_VMCS_LINK_PTR_HIGH();
-
- PrintDebug("\n==> Host State Area\n");
- PrintDebug_HOST_CR0();
- PrintDebug_HOST_CR3();
- PrintDebug_HOST_CR4();
- PrintDebug_HOST_RSP();
- PrintDebug_HOST_RIP();
- PrintDebug_VMCS_HOST_CS_SELECTOR();
- PrintDebug_VMCS_HOST_SS_SELECTOR();
- PrintDebug_VMCS_HOST_DS_SELECTOR();
- PrintDebug_VMCS_HOST_ES_SELECTOR();
- PrintDebug_VMCS_HOST_FS_SELECTOR();
- PrintDebug_VMCS_HOST_GS_SELECTOR();
- PrintDebug_VMCS_HOST_TR_SELECTOR();
- PrintDebug_HOST_FS_BASE();
- PrintDebug_HOST_GS_BASE();
- PrintDebug_HOST_TR_BASE();
- PrintDebug_HOST_GDTR_BASE();
- PrintDebug_HOST_IDTR_BASE();
- PrintDebug_HOST_IA32_SYSENTER_CS();
- PrintDebug_HOST_IA32_SYSENTER_ESP();
- PrintDebug_HOST_IA32_SYSENTER_EIP();
-
-
- PrintDebug("\n==> VM-Execution Controls:\n");
- PrintDebug_PIN_VM_EXEC_CTRLS();
- PrintDebug_PROC_VM_EXEC_CTRLS();
- PrintDebug_EXCEPTION_BITMAP();
- PrintDebug_PAGE_FAULT_ERROR_MASK();
- PrintDebug_PAGE_FAULT_ERROR_MATCH();
- PrintDebug_IO_BITMAP_A_ADDR();
- PrintDebug_IO_BITMAP_A_ADDR_HIGH();
- PrintDebug_IO_BITMAP_B_ADDR();
- PrintDebug_IO_BITMAP_B_ADDR_HIGH();
- PrintDebug_TSC_OFFSET();
- PrintDebug_TSC_OFFSET_HIGH();
- PrintDebug_CR0_GUEST_HOST_MASK();
- PrintDebug_CR0_READ_SHADOW();
- PrintDebug_CR4_GUEST_HOST_MASK();
- PrintDebug_CR4_READ_SHADOW();
- PrintDebug_CR3_TARGET_COUNT();
- PrintDebug_CR3_TARGET_VALUE_0();
- PrintDebug_CR3_TARGET_VALUE_1();
- PrintDebug_CR3_TARGET_VALUE_2();
- PrintDebug_CR3_TARGET_VALUE_3();
- PrintDebug_VIRT_APIC_PAGE_ADDR();
- PrintDebug_VIRT_APIC_PAGE_ADDR_HIGH();
- PrintDebug_TPR_THRESHOLD();
- PrintDebug_MSR_BITMAPS();
- PrintDebug_MSR_BITMAPS_HIGH();
- PrintDebug_VMCS_EXEC_PTR();
- PrintDebug_VMCS_EXEC_PTR_HIGH();
-
- PrintDebug("\n==> VM Exit Controls\n");
- PrintDebug_VM_EXIT_CTRLS();
- PrintDebug_VM_EXIT_MSR_STORE_COUNT();
- PrintDebug_VM_EXIT_MSR_STORE_ADDR();
- PrintDebug_VM_EXIT_MSR_STORE_ADDR_HIGH();
- PrintDebug_VM_EXIT_MSR_LOAD_COUNT();
- PrintDebug_VM_EXIT_MSR_LOAD_ADDR();
- PrintDebug_VM_EXIT_MSR_LOAD_ADDR_HIGH();
-
- PrintDebug("\n==> VM Entry Controls\n");
- PrintDebug_VM_ENTRY_CTRLS();
- PrintDebug_VM_ENTRY_MSR_LOAD_COUNT();
- PrintDebug_VM_ENTRY_MSR_LOAD_ADDR();
- PrintDebug_VM_ENTRY_MSR_LOAD_ADDR_HIGH();
- PrintDebug_VM_ENTRY_INT_INFO_FIELD();
- PrintDebug_VM_ENTRY_EXCEPTION_ERROR();
- PrintDebug_VM_ENTRY_INSTR_LENGTH();
-
- PrintDebug("\n==> VM Exit Info\n");
- PrintDebug_EXIT_REASON();
- PrintDebug_EXIT_QUALIFICATION();
- PrintDebug_VM_EXIT_INT_INFO();
- PrintDebug_VM_EXIT_INT_ERROR();
- PrintDebug_IDT_VECTOR_INFO();
- PrintDebug_IDT_VECTOR_ERROR();
- PrintDebug_VM_EXIT_INSTR_LENGTH();
- PrintDebug_GUEST_LINEAR_ADDR();
- PrintDebug_VMX_INSTR_INFO();
- PrintDebug_IO_RCX();
- PrintDebug_IO_RSI();
- PrintDebug_IO_RDI();
- PrintDebug_IO_RIP();
- PrintDebug_VM_INSTR_ERROR();
- PrintDebug("\n");
-}
return 0;
}
+static void inline translate_segment_access(struct v3_segment * v3_seg,
+ struct vmcs_segment_access * access)
+{
+ access->type = v3_seg->type;
+ access->desc_type = v3_seg->system;
+ access->dpl = v3_seg->dpl;
+ access->present = v3_seg->present;
+ access->avail = v3_seg->avail;
+ access->long_mode = v3_seg->long_mode;
+ access->db = v3_seg->db;
+ access->granularity = v3_seg->granularity;
+}
+
+
static int update_vmcs_host_state(struct guest_info * info) {
int vmx_ret = 0;
addr_t tmp;
}
+static int inline update_vmcs_guest_state(struct guest_info * info)
+{
+ struct v3_msr tmp_msr;
+ int vmx_ret = 0;
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RIP, info->rip);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
+
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
+#define DEBUGCTL_MSR 0x1d9
+
+ v3_get_msr(DEBUGCTL_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DBG_CTL, tmp_msr.value);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DR7, 0x400);
+
+ vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, 0xffffffffffffffff);
+
+ /*** Write VMCS Segments ***/
+ struct vmcs_segment_access access;
+
+ memset(&access, 0, sizeof(access));
+
+ /* CS Segment */
+ translate_segment_access(&(info->segments.cs), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CS_BASE, info->segments.cs.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CS_SELECTOR, info->segments.cs.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CS_LIMIT, info->segments.cs.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CS_ACCESS, access.value);
+
+ /* SS Segment */
+ translate_segment_access(&(info->segments.ss), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_BASE, info->segments.ss.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_SELECTOR, info->segments.ss.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_LIMIT, info->segments.ss.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_ACCESS, access.value);
+
+ /* DS Segment */
+ translate_segment_access(&(info->segments.ds), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DS_BASE, info->segments.ds.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DS_SELECTOR, info->segments.ds.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DS_LIMIT, info->segments.ds.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DS_ACCESS, access.value);
+
+
+ /* ES Segment */
+ translate_segment_access(&(info->segments.es), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_BASE, info->segments.es.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_SELECTOR, info->segments.es.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_LIMIT, info->segments.es.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_ACCESS, access.value);
+
+ /* FS Segment */
+ translate_segment_access(&(info->segments.fs), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_BASE, info->segments.fs.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_SELECTOR, info->segments.fs.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_LIMIT, info->segments.fs.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_ACCESS, access.value);
+
+ /* GS Segment */
+ translate_segment_access(&(info->segments.gs), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_BASE, info->segments.gs.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_SELECTOR, info->segments.gs.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_LIMIT, info->segments.gs.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_ACCESS, access.value);
+
+ /* LDTR segment */
+ translate_segment_access(&(info->segments.ldtr), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_BASE, info->segments.ldtr.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_SELECTOR, info->segments.ldtr.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_LIMIT, info->segments.ldtr.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_ACCESS, access.value);
+
+ /* TR Segment */
+ translate_segment_access(&(info->segments.tr), &access);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_TR_BASE, info->segments.tr.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_TR_SELECTOR, info->segments.tr.selector);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_TR_LIMIT, info->segments.tr.limit);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_TR_ACCESS, access.value);
+
+ /* GDTR Segment */
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GDTR_BASE, info->segments.gdtr.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_GDTR_LIMIT, info->segments.gdtr.limit);
+
+ /* IDTR Segment*/
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_IDTR_BASE, info->segments.idtr.base);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_IDTR_LIMIT, info->segments.idtr.limit);
+
+ return vmx_ret;
+
+}
#endif
-static void inline translate_segment_access(struct v3_segment * v3_seg,
- struct vmcs_segment_access * access)
-{
- access->type = v3_seg->type;
- access->desc_type = v3_seg->system;
- access->dpl = v3_seg->dpl;
- access->present = v3_seg->present;
- access->avail = v3_seg->avail;
- access->long_mode = v3_seg->long_mode;
- access->db = v3_seg->db;
- access->granularity = v3_seg->granularity;
-}
-
-static int inline vmcs_write_guest_segments(struct guest_info* info)
+static addr_t allocate_vmcs()
{
- int ret = 0;
- struct vmcs_segment_access access;
-
- memset(&access, 0, sizeof(access));
-
- /* CS Segment */
- translate_segment_access(&(info->segments.cs), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_CS_BASE, info->segments.cs.base);
- ret |= check_vmcs_write(VMCS_GUEST_CS_SELECTOR, info->segments.cs.selector);
- ret |= check_vmcs_write(VMCS_GUEST_CS_LIMIT, info->segments.cs.limit);
- ret |= check_vmcs_write(VMCS_GUEST_CS_ACCESS, access.value);
-
- /* SS Segment */
- translate_segment_access(&(info->segments.ss), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_SS_BASE, info->segments.ss.base);
- ret |= check_vmcs_write(VMCS_GUEST_SS_SELECTOR, info->segments.ss.selector);
- ret |= check_vmcs_write(VMCS_GUEST_SS_LIMIT, info->segments.ss.limit);
- ret |= check_vmcs_write(VMCS_GUEST_SS_ACCESS, access.value);
-
- /* DS Segment */
- translate_segment_access(&(info->segments.ds), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_DS_BASE, info->segments.ds.base);
- ret |= check_vmcs_write(VMCS_GUEST_DS_SELECTOR, info->segments.ds.selector);
- ret |= check_vmcs_write(VMCS_GUEST_DS_LIMIT, info->segments.ds.limit);
- ret |= check_vmcs_write(VMCS_GUEST_DS_ACCESS, access.value);
-
-
- /* ES Segment */
- translate_segment_access(&(info->segments.es), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_ES_BASE, info->segments.es.base);
- ret |= check_vmcs_write(VMCS_GUEST_ES_SELECTOR, info->segments.es.selector);
- ret |= check_vmcs_write(VMCS_GUEST_ES_LIMIT, info->segments.es.limit);
- ret |= check_vmcs_write(VMCS_GUEST_ES_ACCESS, access.value);
-
- /* FS Segment */
- translate_segment_access(&(info->segments.fs), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_FS_BASE, info->segments.fs.base);
- ret |= check_vmcs_write(VMCS_GUEST_FS_SELECTOR, info->segments.fs.selector);
- ret |= check_vmcs_write(VMCS_GUEST_FS_LIMIT, info->segments.fs.limit);
- ret |= check_vmcs_write(VMCS_GUEST_FS_ACCESS, access.value);
-
- /* GS Segment */
- translate_segment_access(&(info->segments.gs), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_GS_BASE, info->segments.gs.base);
- ret |= check_vmcs_write(VMCS_GUEST_GS_SELECTOR, info->segments.gs.selector);
- ret |= check_vmcs_write(VMCS_GUEST_GS_LIMIT, info->segments.gs.limit);
- ret |= check_vmcs_write(VMCS_GUEST_GS_ACCESS, access.value);
-
- /* LDTR segment */
- translate_segment_access(&(info->segments.ldtr), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_LDTR_BASE, info->segments.ldtr.base);
- ret |= check_vmcs_write(VMCS_GUEST_LDTR_SELECTOR, info->segments.ldtr.selector);
- ret |= check_vmcs_write(VMCS_GUEST_LDTR_LIMIT, info->segments.ldtr.limit);
- ret |= check_vmcs_write(VMCS_GUEST_LDTR_ACCESS, access.value);
-
- /* TR Segment */
- translate_segment_access(&(info->segments.tr), &access);
-
- ret |= check_vmcs_write(VMCS_GUEST_TR_BASE, info->segments.tr.base);
- ret |= check_vmcs_write(VMCS_GUEST_TR_SELECTOR, info->segments.ldtr.selector);
- ret |= check_vmcs_write(VMCS_GUEST_TR_LIMIT, info->segments.tr.limit);
- ret |= check_vmcs_write(VMCS_GUEST_TR_ACCESS, access.value);
+ reg_ex_t msr;
+ PrintDebug("Allocating page\n");
+ struct vmcs_data * vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1));
- /* GDTR Segment */
- ret |= check_vmcs_write(VMCS_GUEST_GDTR_BASE, info->segments.gdtr.base);
- ret |= check_vmcs_write(VMCS_GUEST_GDTR_LIMIT, info->segments.gdtr.limit);
+ memset(vmcs_page, 0, 4096);
- /* IDTR Segment*/
- ret |= check_vmcs_write(VMCS_GUEST_IDTR_BASE, info->segments.idtr.base);
- ret |= check_vmcs_write(VMCS_GUEST_IDTR_LIMIT, info->segments.idtr.limit);
+ v3_get_msr(VMX_BASIC_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+
+ vmcs_page->revision = ((struct vmx_basic_msr*)&msr)->revision;
+ PrintDebug("VMX Revision: 0x%x\n",vmcs_page->revision);
- return ret;
+ return (addr_t)V3_PAddr((void *)vmcs_page);
}
+#if 0
static void setup_v8086_mode_for_boot(struct guest_info * vm_info)
{
((struct vmx_data *)vm_info->vmm_data)->state = VMXASSIST_V8086_BIOS;
- ((struct rflags *)&(vm_info->ctrl_regs.rflags))->vm = 1;
- ((struct rflags *)&(vm_info->ctrl_regs.rflags))->iopl = 3;
-
+ struct rflags * flags = (struct rflags *)&(vm_info->ctrl_regs.rflags);
+ flags->rsvd1 = 1;
+ flags->vm = 1;
+ flags->iopl = 3;
+
+#define GUEST_CR0_MASK 0x80000021
+#define GUEST_CR4_MASK 0x00002000
+ vm_info->ctrl_regs.cr0 = GUEST_CR0_MASK;
+ vm_info->ctrl_regs.cr4 = GUEST_CR4_MASK;
vm_info->rip = 0xd0000;
vm_info->vm_regs.rsp = 0x80000;
for(i = 1; i < 6 ; i++) {
seg_ptr[i].selector = 0x0000;
seg_ptr[i].base = 0x00000;
- seg_ptr[i].type = 3;
- seg_ptr[i].system = 1;
- seg_ptr[i].dpl = 3;
- seg_ptr[i].present = 1;
- seg_ptr[i].granularity = 0;
- }
+ seg_ptr[i].limit = 0xffff;
+ }
for(i = 6; i < 10; i++) {
seg_ptr[i].base = 0x0;
vm_info->segments.tr.present = 1;
vm_info->segments.tr.granularity = 0;
}
+#endif
-
-static addr_t allocate_vmcs()
+#if 0
+static int init_vmcs_bios(struct guest_info * vm_info)
{
- reg_ex_t msr;
- PrintDebug("Allocating page\n");
- struct vmcs_data * vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1));
+#if 0
+ setup_v8086_mode_for_boot(vm_info);
- memset(vmcs_page, 0, 4096);
- v3_get_msr(VMX_BASIC_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+ // Setup guest state
+ // TODO: This is not 32-bit safe!
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RIP, vm_info->rip);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RSP, vm_info->vm_regs.rsp);
- vmcs_page->revision = ((struct vmx_basic_msr*)&msr)->revision;
- PrintDebug("VMX Revision: 0x%x\n",vmcs_page->revision);
- return (addr_t)V3_PAddr((void *)vmcs_page);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CR0, vm_info->ctrl_regs.cr0);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CR4, vm_info->ctrl_regs.cr4);
+
+ vmx_ret |= vmcs_write_guest_segments(vm_info);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_RFLAGS, vm_info->ctrl_regs.rflags);
+#define DEBUGCTL_MSR 0x1d9
+
+ v3_get_msr(DEBUGCTL_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DBG_CTL, tmp_msr.value);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DR7, 0x400);
+
+ vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, 0xffffffffffffffff);
+
+ if (vmx_ret != 0) {
+ PrintError("Could not initialize VMCS segments\n");
+ return -1;
+ }
+
+#endif
+ return 0;
}
+#endif
+static int init_vmx_guest(struct guest_info * info, struct v3_vm_config * config_ptr) {
+ v3_pre_config_guest(info, config_ptr);
-static int init_vmcs_bios(struct guest_info * vm_info)
-{
+ struct vmx_data * vmx_data = NULL;
- setup_v8086_mode_for_boot(vm_info);
+ vmx_data = (struct vmx_data *)V3_Malloc(sizeof(struct vmx_data));
+
+ PrintDebug("vmx_data pointer: %p\n", (void *)vmx_data);
+
+ PrintDebug("Allocating VMCS\n");
+ vmx_data->vmcs_ptr_phys = allocate_vmcs();
+ PrintDebug("VMCS pointer: %p\n", (void *)(vmx_data->vmcs_ptr_phys));
+
+ info->vmm_data = vmx_data;
+
+ PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data);
+
// TODO: Fix vmcs fields so they're 32-bit
- struct vmx_data * vmx_data = (struct vmx_data *)vm_info->vmm_data;
int vmx_ret = 0;
PrintDebug("Clearing VMCS: %p\n",(void*)vmx_data->vmcs_ptr_phys);
return -1;
}
+
+
+ /********** Setup and write VMX Control Fields ***********/
struct v3_msr tmp_msr;
- /* Write VMX Control Fields */
v3_get_msr(VMX_PINBASED_CTLS_MSR,&(tmp_msr.hi),&(tmp_msr.lo));
/* Add NMI exiting */
tmp_msr.lo |= NMI_EXIT;
tmp_msr.lo |= HOST_ADDR_SPACE_SIZE;
check_vmcs_write(VMCS_EXIT_CTRLS, tmp_msr.lo);
-
v3_get_msr(VMX_ENTRY_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
check_vmcs_write(VMCS_ENTRY_CTRLS, tmp_msr.lo);
-
check_vmcs_write(VMCS_EXCP_BITMAP, 0xffffffff);
+
+
+
+ /******* Setup Host State **********/
+
/* Cache GDTR, IDTR, and TR in host struct */
+ addr_t gdtr_base;
struct {
uint16_t selector;
addr_t base;
} __attribute__((packed)) tmp_seg;
- addr_t gdtr_base;
__asm__ __volatile__(
"sgdt (%0);"
vmx_data->host_state.tr.base = tmp_seg.base;
- if(update_vmcs_host_state(vm_info)) {
+ if(update_vmcs_host_state(info)) {
PrintError("Could not write host state\n");
return -1;
}
- // Setup guest state
- // TODO: This is not 32-bit safe!
- vmx_ret |= check_vmcs_write(VMCS_GUEST_RIP, vm_info->rip);
- vmx_ret |= check_vmcs_write(VMCS_GUEST_RSP, vm_info->vm_regs.rsp);
- vmx_ret |= check_vmcs_write(VMCS_GUEST_CR0, 0x80000021);
- vmx_ret |= vmcs_write_guest_segments(vm_info);
- vmx_ret |= check_vmcs_write(VMCS_GUEST_RFLAGS, vm_info->ctrl_regs.rflags);
- vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, 0xffffffffffffffff);
+ /******* Setup VMXAssist guest state ***********/
+ info->rip = 0xd0000;
+ info->vm_regs.rsp = 0x80000;
- if (vmx_ret != 0) {
- PrintError("Could not initialize VMCS segments\n");
- return -1;
- }
+ struct rflags * flags = (struct rflags *)&(info->ctrl_regs.rflags);
+ flags->rsvd1 = 1;
-#define VMXASSIST_START 0x000d0000
- extern uint8_t vmxassist_start[];
- extern uint8_t vmxassist_end[];
+#define GUEST_CR0 0x80000031
+#define GUEST_CR4 0x00002000
+ info->ctrl_regs.cr0 = GUEST_CR0;
+ info->ctrl_regs.cr4 = GUEST_CR4;
+
+ addr_t guest_cr3 = (addr_t)V3_AllocPages(1);
- addr_t vmxassist_dst = 0;
- if(guest_pa_to_host_va(vm_info, VMXASSIST_START, &vmxassist_dst) == -1) {
- PrintError("Could not find VMXASSIST destination\n");
- return -1;
- }
- memcpy((void*)vmxassist_dst, vmxassist_start, vmxassist_end-vmxassist_start);
+ memset(V3_VAddr((void*)guest_cr3), 0, 4096);
+ vmcs_write(VMCS_GUEST_CR3, guest_cr3);
- v3_print_vmcs_host_state();
- v3_print_vmcs_guest_state();
- return 0;
-}
+ v3_get_msr(VMX_CR0_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ PrintDebug("CR0 MSR: %p\n", (void*)tmp_msr.value);
-static int init_vmx_guest(struct guest_info * info, struct v3_vm_config * config_ptr) {
- v3_pre_config_guest(info, config_ptr);
+ v3_get_msr(VMX_CR4_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ PrintDebug("CR4 MSR: %p\n", (void*)tmp_msr.value);
- struct vmx_data * data = NULL;
+ struct v3_segment * seg_reg = (struct v3_segment *)&(info->segments);
- data = (struct vmx_data *)V3_Malloc(sizeof(struct vmx_data));
+ int i;
+ for(i=0; i < 10; i++)
+ {
+ seg_reg[i].selector = 3<<3;
+ seg_reg[i].limit = 0xffff;
+ seg_reg[i].base = 0x0;
+ }
+ info->segments.cs.selector = 2<<3;
+
+ /* Set only the segment registers */
+ for(i=0; i < 6; i++) {
+ seg_reg[i].limit = 0xfffff;
+ seg_reg[i].granularity = 1;
+ seg_reg[i].type = 3;
+ seg_reg[i].system = 1;
+ seg_reg[i].dpl = 0;
+ seg_reg[i].present = 1;
+ seg_reg[i].db = 1;
+ }
+ info->segments.cs.type = 0xb;
- PrintDebug("vmx_data pointer: %p\n", (void *)data);
+ info->segments.ldtr.selector = 0x20;
+ info->segments.ldtr.type = 2;
+ info->segments.ldtr.system = 0;
+ info->segments.ldtr.present = 1;
+ info->segments.ldtr.granularity = 0;
+
- PrintDebug("Allocating VMCS\n");
- data->vmcs_ptr_phys = allocate_vmcs();
- PrintDebug("VMCS pointer: %p\n", (void *)(data->vmcs_ptr_phys));
- info->vmm_data = data;
+uint64_t gdt[] __attribute__ ((aligned(32))) = {
+ 0x0000000000000000ULL, /* 0x00: reserved */
+ 0x0000830000000000ULL, /* 0x08: 32-bit TSS */
+ // 0x0000890000000000ULL, /* 0x08: 32-bit TSS */
+ 0x00CF9b000000FFFFULL, /* 0x10: CS 32-bit */
+ 0x00CF93000000FFFFULL, /* 0x18: DS 32-bit */
+ 0x000082000000FFFFULL, /* 0x20: LDTR 32-bit */
+};
+
+#define VMXASSIST_GDT 0x10000
+ addr_t vmxassist_gdt = 0;
+ if(guest_pa_to_host_va(info, VMXASSIST_GDT, &vmxassist_gdt) == -1) {
+ PrintError("Could not find VMXASSIST GDT destination\n");
+ return -1;
+ }
+ memcpy((void*)vmxassist_gdt, gdt, sizeof(uint64_t) * 5);
+
+ info->segments.gdtr.base = VMXASSIST_GDT;
+
+#define VMXASSIST_TSS 0x40000
+ addr_t vmxassist_tss = VMXASSIST_TSS;
+ gdt[0x08 / sizeof(gdt[0])] |=
+ ((vmxassist_tss & 0xFF000000) << (56-24)) |
+ ((vmxassist_tss & 0x00FF0000) << (32-16)) |
+ ((vmxassist_tss & 0x0000FFFF) << (16)) |
+ (8392 - 1);
+
+ info->segments.tr.selector = 0x08;
+ info->segments.tr.base = vmxassist_tss;
+
+ // info->segments.tr.type = 0x9;
+ info->segments.tr.type = 0x3;
+ info->segments.tr.system = 0;
+ info->segments.tr.present = 1;
+ info->segments.tr.granularity = 0;
+
+
+#define VMXASSIST_START 0x000d0000
+ extern uint8_t vmxassist_start[];
+ extern uint8_t vmxassist_end[];
- PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data);
+ addr_t vmxassist_dst = 0;
+ if(guest_pa_to_host_va(info, VMXASSIST_START, &vmxassist_dst) == -1) {
+ PrintError("Could not find VMXASSIST destination\n");
+ return -1;
+ }
+ memcpy((void*)vmxassist_dst, vmxassist_start, vmxassist_end-vmxassist_start);
- if (init_vmcs_bios(info) != 0) {
- PrintError("Could not initialize VMCS BIOS\n");
+ if(update_vmcs_guest_state(info) != VMX_SUCCESS) {
+ PrintDebug("Writing guest state failed!\n");
return -1;
}
+ v3_print_vmcs();
+
+
//v3_post_config_guest(info, config_ptr);
return 0;
ret = v3_vmx_vmlaunch(&(info->vm_regs));
if (ret != VMX_SUCCESS) {
- vmcs_read(VMCS_INSTR_ERR, &error, 4);
+ vmcs_read(VMCS_INSTR_ERR, &error);
PrintError("VMLAUNCH failed: %d\n", error);
- v3_print_vmcs_guest_state();
- v3_print_vmcs_host_state();
+ v3_print_vmcs();
+
}
PrintDebug("Returned from VMLAUNCH ret=%d(0x%x)\n", ret, ret);
}
-
-
-
-
int v3_is_vmx_capable() {
v3_msr_t feature_msr;
addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
#include <palacios/vmx_handler.h>
#include <palacios/vmm_types.h>
#include <palacios/vmm.h>
+#include <palacios/vmcs.h>
+#include <palacios/vmx_lowlevel.h>
-int v3_handle_vmx_exit(struct guest_info * info)
+static int inline check_vmcs_write(vmcs_field_t field, addr_t val)
{
- PrintDebug("VMX Exit taken!\n");
+ int ret = 0;
+ ret = vmcs_write(field,val);
+
+ if (ret != VMX_SUCCESS) {
+ PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
+ return 1;
+ }
+
+ return 0;
+}
+
+static int inline check_vmcs_read(vmcs_field_t field, void * val)
+{
+ int ret = 0;
+ ret = vmcs_read(field,val);
+
+ if(ret != VMX_SUCCESS) {
+ PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
+ return 1;
+ }
+
return 0;
}
+
+int v3_handle_vmx_exit(struct v3_gprs * gprs)
+{
+ uint32_t exit_reason;
+ ulong_t exit_qual;
+
+ check_vmcs_read(VMCS_EXIT_REASON, &exit_reason);
+ check_vmcs_read(VMCS_EXIT_QUAL, &exit_qual);
+ PrintDebug("VMX Exit taken, id-qual: %x-%ld\n", exit_reason, exit_qual);
+ return -1;
+}
vmresume
- addq $8, %rsp
jz .Lfail_valid
jc .Lfail_invalid
+ addq $8, %rsp
jmp .Lreturn
.align 8
.Lfail_valid:
addq $8, %rsp
POPA
+ popf
movq $VMX_FAIL_VALID, %rax
jmp .Lreturn
.Lfail_invalid:
addq $8, %rsp
POPA
+ popf
movq $VMX_FAIL_INVALID, %rax
jmp .Lreturn
.Lvmm_failure:
addq $8, %rsp
- POPA
movq $VMM_FAILURE, %rax
jmp .Lreturn
.Lreturn:
sti
- popf
ret
#else
.globl v3_vmx_exit_handler
v3_vmx_exit_handler:
save_registers(4(%esp))
- addl $8, %rsp
+ addl $8, %esp
POPA
popf
- pushl %rdi
+ pushl %edi
call v3_handle_vmx_exit
andl %eax, %eax
