X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_ctrl_regs.c;h=d3e9360e6d68294297ddd34edc1f3b5e0827aeed;hp=69d51ffab62e464b8695138e8693415ac1859ee4;hb=0e097100a26bc43eb8964734fa43130fc4c71429;hpb=d4073a9dbe24ae160b8d6bd8fd5fd4ad8aa995a3 diff --git a/palacios/src/palacios/vmm_ctrl_regs.c b/palacios/src/palacios/vmm_ctrl_regs.c index 69d51ff..d3e9360 100644 --- a/palacios/src/palacios/vmm_ctrl_regs.c +++ b/palacios/src/palacios/vmm_ctrl_regs.c @@ -1,854 +1,575 @@ +/* + * This file is part of the Palacios Virtual Machine Monitor developed + * by the V3VEE Project with funding from the United States National + * Science Foundation and the Department of Energy. + * + * The V3VEE Project is a joint project between Northwestern University + * and the University of New Mexico. You can find out more at + * http://www.v3vee.org + * + * Copyright (c) 2008, Jack Lange + * Copyright (c) 2008, The V3VEE Project + * All rights reserved. + * + * Author: Jack Lange + * + * This is free software. You are permitted to use, + * redistribute, and modify it as specified in the file "V3VEE_LICENSE". + */ + #include #include #include #include #include #include +#include - - -extern void SerialMemDump(unsigned char *start, int n); - - -#if VMM_DEBUG -void PrintCtrlRegs(struct guest_info *info) -{ - struct cr0_32 cr0 = *((struct cr0_32 *) &(info->ctrl_regs.cr0)); - struct cr2_32 cr2 = *((struct cr2_32 *) &(info->ctrl_regs.cr2)); - struct cr3_32 cr3 = *((struct cr3_32 *) &(info->ctrl_regs.cr3)); - struct cr4_32 cr4 = *((struct cr4_32 *) &(info->ctrl_regs.cr4)); - struct rflags rflags = *((struct rflags *) &(info->ctrl_regs.rflags)); - - PrintDebug("CR0: pe 0x%x\n",cr0.pe); - PrintDebug("CR0: mp 0x%x\n",cr0.mp); - PrintDebug("CR0: em 0x%x\n",cr0.em); - PrintDebug("CR0: ts 0x%x\n",cr0.ts); - PrintDebug("CR0: et 0x%x\n",cr0.et); - PrintDebug("CR0: ne 0x%x\n",cr0.ne); - PrintDebug("CR0: rsvd1 0x%x\n",cr0.rsvd1); - PrintDebug("CR0: wp 0x%x\n",cr0.wp); - PrintDebug("CR0: rsvd2 0x%x\n",cr0.rsvd2); - PrintDebug("CR0: am 0x%x\n",cr0.am); - PrintDebug("CR0: rsvd3 0x%x\n",cr0.rsvd3); - PrintDebug("CR0: nw 0x%x\n",cr0.nw); - PrintDebug("CR0: cd 0x%x\n",cr0.cd); - PrintDebug("CR0: pg 0x%x\n",cr0.pg); - - PrintDebug("CR2: pfadd 0x%x\n",cr2.pf_vaddr); - - PrintDebug("CR3: rsvd1 0x%x\n",cr3.rsvd1); - PrintDebug("CR3: pwt 0x%x\n",cr3.pwt); - PrintDebug("CR3: pcd 0x%x\n",cr3.pcd); - PrintDebug("CR3: rsvd2 0x%x\n",cr3.rsvd2); - PrintDebug("CR3: pdt 0x%x\n",cr3.pdt_base_addr); - - PrintDebug("CR4: vme 0x%x\n",cr4.vme); - PrintDebug("CR4: pvi 0x%x\n",cr4.pvi); - PrintDebug("CR4: tsd 0x%x\n",cr4.tsd); - PrintDebug("CR4: de 0x%x\n",cr4.de); - PrintDebug("CR4: pse 0x%x\n",cr4.pse); - PrintDebug("CR4: pae 0x%x\n",cr4.pae); - PrintDebug("CR4: mce 0x%x\n",cr4.mce); - PrintDebug("CR4: pge 0x%x\n",cr4.pge); - PrintDebug("CR4: pce 0x%x\n",cr4.pce); - PrintDebug("CR4: osfx 0x%x\n",cr4.osf_xsr); - PrintDebug("CR4: osx 0x%x\n",cr4.osx); - PrintDebug("CR4: rsvd1 0x%x\n",cr4.rsvd1); - - PrintDebug("RFLAGS: cf 0x%x\n",rflags.cf); - PrintDebug("RFLAGS: rsvd1 0x%x\n",rflags.rsvd1); - PrintDebug("RFLAGS: pf 0x%x\n",rflags.pf); - PrintDebug("RFLAGS: rsvd2 0x%x\n",rflags.rsvd2); - PrintDebug("RFLAGS: af 0x%x\n",rflags.af); - PrintDebug("RFLAGS: rsvd3 0x%x\n",rflags.rsvd3); - PrintDebug("RFLAGS: zf 0x%x\n",rflags.zf); - PrintDebug("RFLAGS: sf 0x%x\n",rflags.sf); - PrintDebug("RFLAGS: tf 0x%x\n",rflags.tf); - PrintDebug("RFLAGS: intr 0x%x\n",rflags.intr); - PrintDebug("RFLAGS: df 0x%x\n",rflags.df); - PrintDebug("RFLAGS: of 0x%x\n",rflags.of); - PrintDebug("RFLAGS: iopl 0x%x\n",rflags.iopl); - PrintDebug("RFLAGS: nt 0x%x\n",rflags.nt); - PrintDebug("RFLAGS: rsvd4 0x%x\n",rflags.rsvd4); - PrintDebug("RFLAGS: rf 0x%x\n",rflags.rf); - PrintDebug("RFLAGS: vm 0x%x\n",rflags.vm); - PrintDebug("RFLAGS: ac 0x%x\n",rflags.ac); - PrintDebug("RFLAGS: vif 0x%x\n",rflags.vif); - PrintDebug("RFLAGS: id 0x%x\n",rflags.id); - PrintDebug("RFLAGS: rsvd5 0x%x\n",rflags.rsvd5); - PrintDebug("RFLAGS: rsvd6 0x%x\n",rflags.rsvd6); - -} -#else -void PrintCtrlRegs(struct guest_info *info) -{} +#ifndef CONFIG_DEBUG_CTRL_REGS +#undef PrintDebug +#define PrintDebug(fmt, args...) #endif -/* Segmentation is a problem here... - * - * When we get a memory operand, presumably we use the default segment (which is?) - * unless an alternate segment was specfied in the prefix... - */ +static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr); +static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr); +static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr); -int handle_cr0_write(struct guest_info * info) { - char instr[15]; - - - switch (info->cpu_mode) { - case REAL: - { - int index = 0; - int ret; - - PrintDebug("Real Mode write to CR0 at linear guest pa 0x%x\n",get_addr_linear(info,info->rip,&(info->segments.cs))); - - // The real rip address is actually a combination of the rip + CS base - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - if (ret != 15) { - // I think we should inject a GPF into the guest - PrintDebug("Could not read instruction (ret=%d)\n", ret); + +// First Attempt = 494 lines +// current = 106 lines +int v3_handle_cr0_write(struct guest_info * info) { + uchar_t instr[15]; + int ret; + struct x86_instr dec_instr; + + if (info->mem_mode == PHYSICAL_MEM) { + ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + } else { + ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + } + + if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { + PrintError("Could not decode instruction\n"); return -1; - } - - while (is_prefix_byte(instr[index])) { - index++; - } - - if ((instr[index] == cr_access_byte) && - (instr[index + 1] == lmsw_byte) && - (MODRM_REG(instr[index + 2]) == lmsw_reg_byte)) { - - addr_t first_operand; - addr_t second_operand; - struct cr0_real *real_cr0; - struct cr0_real *new_cr0; - operand_type_t addr_type; - char new_cr0_val = 0; - // LMSW - // decode mod/RM - index += 2; - - real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0); - - addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG16); - - - if (addr_type == REG_OPERAND) { - new_cr0 = (struct cr0_real *)first_operand; - } else if (addr_type == MEM_OPERAND) { - addr_t host_addr; - - if (guest_pa_to_host_va(info, first_operand + (info->segments.ds.base << 4), &host_addr) == -1) { - // gpf the guest - return -1; - } + } - new_cr0 = (struct cr0_real *)host_addr; - } else { - PrintDebug("Memory operand in real mode write to CR0 is UNIMPLEMENTED\n"); - // error... don't know what to do - return -1; + + if (dec_instr.op_type == V3_OP_LMSW) { + if (handle_lmsw(info, &dec_instr) == -1) { + return -1; } - - if ((new_cr0->pe == 1) && (real_cr0->pe == 0)) { - info->cpu_mode = PROTECTED; - } else if ((new_cr0->pe == 0) && (real_cr0->pe == 1)) { - info->cpu_mode = REAL; + } else if (dec_instr.op_type == V3_OP_MOV2CR) { + if (handle_mov_to_cr0(info, &dec_instr) == -1) { + return -1; } - - new_cr0_val = *(char*)(new_cr0) & 0x0f; + } else if (dec_instr.op_type == V3_OP_CLTS) { + if (handle_clts(info, &dec_instr) == -1) { + return -1; + } + } else { + PrintError("Unhandled opcode in handle_cr0_write\n"); + return -1; + } + + info->rip += dec_instr.instr_length; + + return 0; +} - if (info->shdw_pg_mode == SHADOW_PAGING) { - struct cr0_real * shadow_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0); - - PrintDebug("Old CR0=%x, Old Shadow CR0=%x\n", *real_cr0, *shadow_cr0); - /* struct cr0_real is only 4 bits wide, - * so we can overwrite the real_cr0 without worrying about the shadow fields - */ - *(char*)real_cr0 &= 0xf0; - *(char*)real_cr0 |= new_cr0_val; - - *(char*)shadow_cr0 &= 0xf0; - *(char*)shadow_cr0 |= new_cr0_val; - PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0); +// The CR0 register only has flags in the low 32 bits +// The hardware does a format check to make sure the high bits are zero +// Because of this we can ignore the high 32 bits here +static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) { + // 32 bit registers + struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0); + struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand); + struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); + uint_t paging_transition = 0; + + PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode)); + + PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size); + + PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0); + PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0); + + + // We detect if this is a paging transition + if (guest_cr0->pg != new_cr0->pg) { + paging_transition = 1; + } + + // Guest always sees the value they wrote + *guest_cr0 = *new_cr0; + + // This value must always be set to 1 + guest_cr0->et = 1; + + // Set the shadow register to catch non-virtualized flags + *shadow_cr0 = *guest_cr0; + + // Paging is always enabled + shadow_cr0->pg = 1; + + // Was there a paging transition + // Meaning we need to change the page tables + if (paging_transition) { + if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) { + + struct efer_64 * guest_efer = (struct efer_64 *)&(info->shdw_pg_state.guest_efer); + struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer); + + // Check long mode LME to set LME + if (guest_efer->lme == 1) { + PrintDebug("Enabing Long Mode\n"); + guest_efer->lma = 1; + + shadow_efer->lma = 1; + shadow_efer->lme = 1; + + PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer)); + } + + PrintDebug("Activating Shadow Page Tables\n"); + + if (v3_activate_shadow_pt(info) == -1) { + PrintError("Failed to activate shadow page tables\n"); + return -1; + } } else { - PrintDebug("Old CR0=%x\n", *real_cr0); - // for now we just pass through.... - *(char*)real_cr0 &= 0xf0; - *(char*)real_cr0 |= new_cr0_val; - - PrintDebug("New CR0=%x\n", *real_cr0); - } - - - info->rip += index; - - } else if ((instr[index] == cr_access_byte) && - (instr[index + 1] == clts_byte)) { - // CLTS - PrintDebug("CLTS unhandled in CR0 write\n"); - return -1; - } else if ((instr[index] == cr_access_byte) && - (instr[index + 1] = mov_to_cr_byte)) { - addr_t first_operand; - addr_t second_operand; - struct cr0_32 *real_cr0; - struct cr0_32 *new_cr0; - operand_type_t addr_type; - - - index += 2; - - real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0); - - addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - - if (addr_type != REG_OPERAND) { - PrintDebug("Moving to CR0 from non-register operand in CR0 write\n"); - /* Mov to CR0 Can only be a 32 bit register */ - // FIX ME - return -1; + shadow_cr0->wp = 1; + + if (v3_activate_passthrough_pt(info) == -1) { + PrintError("Failed to activate passthrough page tables\n"); + return -1; + } } + } + + + PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0); + PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0); + + return 0; +} - new_cr0 = (struct cr0_32 *)first_operand; - if (new_cr0->pe == 1) { - PrintDebug("Entering Protected Mode\n"); - info->cpu_mode = PROTECTED; - } - if (new_cr0->pe == 0) { - PrintDebug("Entering Real Mode\n"); - info->cpu_mode = REAL; - } - - if (new_cr0->pg == 1) { - PrintDebug("Paging is already turned on in switch to protected mode in CR0 write\n"); +static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) { + // CLTS + struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0); + + real_cr0->ts = 0; + + if (info->shdw_pg_mode == SHADOW_PAGING) { + struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); + guest_cr0->ts = 0; + } + return 0; +} - // GPF the guest?? - return -1; - } - if (info->shdw_pg_mode == SHADOW_PAGING) { - struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); +static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) { + struct cr0_real * real_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0); + // XED is a mess, and basically reverses the operand order for an LMSW + struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->dst_operand.operand); + uchar_t new_cr0_val; + + PrintDebug("LMSW\n"); + + new_cr0_val = (*(char*)(new_cr0)) & 0x0f; + + PrintDebug("OperandVal = %x\n", new_cr0_val); + + // We can just copy the new value through + // we don't need to virtualize the lower 4 bits + PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0); + *(uchar_t*)real_cr0 &= 0xf0; + *(uchar_t*)real_cr0 |= new_cr0_val; + PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0); + + + // If Shadow paging is enabled we push the changes to the virtualized copy of cr0 + if (info->shdw_pg_mode == SHADOW_PAGING) { + struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0); - PrintDebug("Old CR0=%x, Old Shadow CR0=%x\n", *real_cr0, *shadow_cr0); - *real_cr0 = *new_cr0; - real_cr0->pg = 1; - real_cr0->et = 1; + PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0); + *(uchar_t*)guest_cr0 &= 0xf0; + *(uchar_t*)guest_cr0 |= new_cr0_val; + PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0); + } + return 0; +} - *shadow_cr0 = *new_cr0; - shadow_cr0->et = 1; - PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0); - } else { - PrintDebug("Old CR0=%x\n", *real_cr0); - *real_cr0 = *new_cr0; - PrintDebug("New CR0=%x\n", *real_cr0); - } - info->rip += index; - } else { - PrintDebug("Unsupported Instruction\n"); - // unsupported instruction, UD the guest - return -1; - } - - } - break; - - case PROTECTED: - { - - int index = 0; - int ret; - - PrintDebug("Protected %s Mode write to CR0 at guest %s linear rip 0x%x\n", - info->mem_mode == VIRTUAL_MEM ? "Paged" : "", - info->mem_mode == VIRTUAL_MEM ? "virtual" : "", - get_addr_linear(info, info->rip, &(info->segments.cs))); - - // OK, now we will read the instruction - // The only difference between PROTECTED and PROTECTED_PG is whether we read - // from guest_pa or guest_va - if (info->mem_mode == PHYSICAL_MEM) { - // The real rip address is actually a combination of the rip + CS base + +// First attempt = 253 lines +// current = 51 lines +int v3_handle_cr0_read(struct guest_info * info) { + uchar_t instr[15]; + int ret; + struct x86_instr dec_instr; + + if (info->mem_mode == PHYSICAL_MEM) { ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } else { + } else { ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } - - - if (ret != 15) { - // I think we should inject a GPF into the guest - PrintDebug("Could not read instruction (ret=%d)\n", ret); + } + + + if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { + PrintError("Could not decode instruction\n"); return -1; - } - - while (is_prefix_byte(instr[index])) { - index++; - } - - struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); - - struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0); - - if ((instr[index] == cr_access_byte) && - (instr[index + 1] == mov_to_cr_byte)) { - - // MOV to CR0 + } - addr_t first_operand; - addr_t second_operand; - struct cr0_32 *new_cr0; - operand_type_t addr_type; - - index += 2; - - PrintDebug("MovToCR0 instr:\n"); - PrintTraceMemDump(instr, 15); - PrintDebug("EAX=%x\n", *(uint_t*)&(info->vm_regs.rax)); - - addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - - if (addr_type != REG_OPERAND) { - PrintDebug("Non-register operand in write to CR0\n"); - return -1; - } - - new_cr0 = (struct cr0_32 *)first_operand; - - PrintDebug("first operand=%x\n", *(uint_t *)first_operand); - - if (info->shdw_pg_mode == SHADOW_PAGING) { - struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); - - if (new_cr0->pg == 1){ - // This should be new_cr0->pg && !(old_cr->pg), right? - // and then a case for turning paging off? - - struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3); - - info->mem_mode = VIRTUAL_MEM; - - *shadow_cr0 = *new_cr0; - *real_cr0 = *new_cr0; - shadow_cr0->et = 1; - real_cr0->et = 1; - - // - // Activate Shadow Paging - // - PrintDebug("Turning on paging in the guest\n"); - - info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3; - - - } else if (new_cr0->pe == 0) { - info->cpu_mode = REAL; - info->mem_mode = PHYSICAL_MEM; - PrintDebug("Entering Real Mode\n"); - - PrintV3CtrlRegs(&(info->ctrl_regs)); - // reinstate the identity mapped paged tables - // But keep the shadow tables around to handle TLB issues.... UGH... - //info->shdw_pg_state.shadow_cr3 &= 0x00000fff; - //info->shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(info) & ~0xfff); - - //info->ctrl_regs.cr3 = info->shdw_pg_state.shadow_cr3; - info->ctrl_regs.cr3 = ((addr_t)create_passthrough_pde32_pts(info) & ~0xfff); - - - *shadow_cr0 = *new_cr0; - *real_cr0 = *new_cr0; - real_cr0->pg = 1; - shadow_cr0->et = 1; - real_cr0->et = 1; - - } - + if (dec_instr.op_type == V3_OP_MOVCR2) { + PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode)); + if ((v3_get_vm_cpu_mode(info) == LONG) || + (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) { + struct cr0_64 * dst_reg = (struct cr0_64 *)(dec_instr.dst_operand.operand); + + if (info->shdw_pg_mode == SHADOW_PAGING) { + struct cr0_64 * guest_cr0 = (struct cr0_64 *)&(info->shdw_pg_state.guest_cr0); + *dst_reg = *guest_cr0; + } else { + struct cr0_64 * shadow_cr0 = (struct cr0_64 *)&(info->ctrl_regs.cr0); + *dst_reg = *shadow_cr0; + } + + PrintDebug("returned CR0: %p\n", (void *)*(addr_t *)dst_reg); } else { - *real_cr0 = *new_cr0; + struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand); + + if (info->shdw_pg_mode == SHADOW_PAGING) { + struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); + *dst_reg = *guest_cr0; + } else { + struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0); + *dst_reg = *shadow_cr0; + } + + PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg); } - info->rip += index; - - } else if ((instr[index] == 0x0f) && - (instr[index + 1] == 0x06)) { - // CLTS instruction - PrintDebug("CLTS instruction - clearing TS flag of real and shadow CR0\n"); - shadow_cr0->ts = 0; - real_cr0->ts = 0; + } else if (dec_instr.op_type == V3_OP_SMSW) { + struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0); + struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand); + char cr0_val = *(char*)shadow_cr0 & 0x0f; - index+=2; + PrintDebug("SMSW\n"); - info->rip+=index; - - } else { - PrintDebug("Unkown instruction: \n"); - SerialMemDump(instr,15); + // The lower 4 bits of the guest/shadow CR0 are mapped through + // We can treat nested and shadow paging the same here + *(char *)dst_reg &= 0xf0; + *(char *)dst_reg |= cr0_val; + + } else { + PrintError("Unhandled opcode in handle_cr0_read\n"); return -1; - } } - break; - case PROTECTED_PAE: - PrintDebug("Protected PAE Mode write to CR0 is UNIMPLEMENTED\n"); - return -1; - - case LONG: - PrintDebug("Protected Long Mode write to CR0 is UNIMPLEMENTED\n"); - return -1; - - default: - { - PrintDebug("Unknown Mode write to CR0 (info->cpu_mode=0x%x\n)",info->cpu_mode); - return -1; - } - break; + info->rip += dec_instr.instr_length; - } - - return 0; + return 0; } -int handle_cr0_read(struct guest_info * info) { - char instr[15]; - - switch (info->cpu_mode) { - - case REAL: - { - int index = 0; - int ret; - PrintDebug("Real Mode read from CR0 at linear guest pa 0x%x\n",get_addr_linear(info,info->rip,&(info->segments.cs))); - - // The real rip address is actually a combination of the rip + CS base - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - if (ret != 15) { - // I think we should inject a GPF into the guest - PrintDebug("Could not read Real Mode instruction (ret=%d)\n", ret); +// First Attempt = 256 lines +// current = 65 lines +int v3_handle_cr3_write(struct guest_info * info) { + int ret; + uchar_t instr[15]; + struct x86_instr dec_instr; + + if (info->mem_mode == PHYSICAL_MEM) { + ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + } else { + ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + } + + if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { + PrintError("Could not decode instruction\n"); return -1; - } - - - while (is_prefix_byte(instr[index])) { - index++; - } - - if ((instr[index] == cr_access_byte) && - (instr[index + 1] == smsw_byte) && - (MODRM_REG(instr[index + 2]) == smsw_reg_byte)) { - - // SMSW (store machine status word) - - addr_t first_operand; - addr_t second_operand; - struct cr0_real *cr0; - operand_type_t addr_type; - char cr0_val = 0; - - index += 2; - - cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0); - - - addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG16); - - if (addr_type == MEM_OPERAND) { - addr_t host_addr; - - if (guest_pa_to_host_va(info, first_operand + (info->segments.ds.base << 4), &host_addr) == -1) { - // gpf the guest - PrintDebug("Could not convert guest physical address to host virtual address\n"); - return -1; - } + } + + if (dec_instr.op_type == V3_OP_MOV2CR) { + PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode)); - first_operand = host_addr; - } else { - // Register operand - // Should be ok?? - } - - cr0_val = *(char*)cr0 & 0x0f; - - *(char *)first_operand &= 0xf0; - *(char *)first_operand |= cr0_val; - - PrintDebug("index = %d, rip = %x\n", index, (ulong_t)(info->rip)); - info->rip += index; - PrintDebug("new_rip = %x\n", (ulong_t)(info->rip)); - // success - - } else if ((instr[index] == cr_access_byte) && - (instr[index+1] == mov_from_cr_byte)) { - /* Mov from CR0 - * This can only take a 32 bit register argument in anything less than 64 bit mode. - */ - addr_t first_operand; - addr_t second_operand; - operand_type_t addr_type; - - struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0); - - index += 2; - - addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - - struct cr0_32 * virt_cr0 = (struct cr0_32 *)first_operand; - - if (addr_type != REG_OPERAND) { - // invalid opcode to guest - PrintDebug("Invalid operand type in mov from CR0\n"); - return -1; - } - if (info->shdw_pg_mode == SHADOW_PAGING) { - *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); - } else { - *virt_cr0 = *real_cr0; + PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n", + (void *)(addr_t)(info->ctrl_regs.cr3), + (void*)(addr_t)(info->shdw_pg_state.guest_cr3)); + + + // We update the guest CR3 + if (info->cpu_mode == LONG) { + struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand); + struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3); + *guest_cr3 = *new_cr3; + } else { + struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand); + struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); + *guest_cr3 = *new_cr3; + } + + + // If Paging is enabled in the guest then we need to change the shadow page tables + if (info->mem_mode == VIRTUAL_MEM) { + if (v3_activate_shadow_pt(info) == -1) { + PrintError("Failed to activate 32 bit shadow page table\n"); + return -1; + } + } + + PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n", + (void *)(addr_t)(info->ctrl_regs.cr3), + (void*)(addr_t)(info->shdw_pg_state.guest_cr3)); + + } else if (info->shdw_pg_mode == NESTED_PAGING) { + + // This is just a passthrough operation which we probably don't need here + if (info->cpu_mode == LONG) { + struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand); + struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3); + *guest_cr3 = *new_cr3; + } else { + struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand); + struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3); + *guest_cr3 = *new_cr3; + } + } - - info->rip += index; - - } else { - PrintDebug("Unknown read instr from CR0\n"); + } else { + PrintError("Unhandled opcode in handle_cr3_write\n"); return -1; - } + } + + info->rip += dec_instr.instr_length; + + return 0; +} - } - break; - case PROTECTED: - { +// first attempt = 156 lines +// current = 36 lines +int v3_handle_cr3_read(struct guest_info * info) { + uchar_t instr[15]; + int ret; + struct x86_instr dec_instr; - int index = 0; - int ret; - - PrintDebug("Protected %s Mode read from CR0 at guest %s linear rip 0x%x\n", - info->mem_mode == VIRTUAL_MEM ? "Paged" : "", - info->mem_mode == VIRTUAL_MEM ? "virtual" : "", - get_addr_linear(info, info->rip, &(info->segments.cs))); - - // We need to read the instruction, which is at CS:IP, but that - // linear address is guest physical without PG and guest virtual with PG - if (info->cpu_mode == PHYSICAL_MEM) { - // The real rip address is actually a combination of the rip + CS base + if (info->mem_mode == PHYSICAL_MEM) { ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } else { - // The real rip address is actually a combination of the rip + CS base + } else { ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } - - if (ret != 15) { - // I think we should inject a GPF into the guest - PrintDebug("Could not read Protected %s mode instruction (ret=%d)\n", - info->cpu_mode == VIRTUAL_MEM ? "Paged" : "", ret); + } + + if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { + PrintError("Could not decode instruction\n"); return -1; - } - - while (is_prefix_byte(instr[index])) { - index++; - } - - - if ((instr[index] == cr_access_byte) && - (instr[index+1] == mov_from_cr_byte)) { + } + + if (dec_instr.op_type == V3_OP_MOVCR2) { + PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode)); - // MOV from CR0 to register - - addr_t first_operand; - addr_t second_operand; - operand_type_t addr_type; - struct cr0_32 * virt_cr0; - struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0); - - index += 2; - - addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - - if (addr_type != REG_OPERAND) { - PrintDebug("Invalid operand type in mov from CR0\n"); - return -1; - } - - virt_cr0 = (struct cr0_32 *)first_operand; - if (info->shdw_pg_mode == SHADOW_PAGING) { - *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); - - if (info->mem_mode == PHYSICAL_MEM) { - virt_cr0->pg = 0; // clear the pg bit because guest doesn't think it's on - } - - PrintDebug("real CR0: %x\n", *(uint_t*)real_cr0); - PrintDebug("returned CR0: %x\n", *(uint_t*)virt_cr0); - - - } else { - *virt_cr0 = *real_cr0; + + if ((v3_get_vm_cpu_mode(info) == LONG) || + (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) { + struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand); + struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3); + *dst_reg = *guest_cr3; + } else { + struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand); + struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); + *dst_reg = *guest_cr3; + } + + } else if (info->shdw_pg_mode == NESTED_PAGING) { + + // This is just a passthrough operation which we probably don't need here + if ((v3_get_vm_cpu_mode(info) == LONG) || + (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) { + struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand); + struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3); + *dst_reg = *guest_cr3; + } else { + struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand); + struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3); + *dst_reg = *guest_cr3; + } } - - info->rip += index; - - } else { - PrintDebug("Unknown read instruction from CR0\n"); + + } else { + PrintError("Unhandled opcode in handle_cr3_read\n"); return -1; - } } - break; - - case PROTECTED_PAE: - PrintDebug("Protected PAE Mode read to CR0 is UNIMPLEMENTED\n"); - return -1; - - case LONG: - PrintDebug("Protected Long Mode read to CR0 is UNIMPLEMENTED\n"); - return -1; - - - default: - { - PrintDebug("Unknown Mode read from CR0 (info->cpu_mode=0x%x)\n",info->cpu_mode); - return -1; - } - break; - } - - - return 0; + + info->rip += dec_instr.instr_length; + + return 0; } +// We don't need to virtualize CR4, all we need is to detect the activation of PAE +int v3_handle_cr4_read(struct guest_info * info) { + // PrintError("CR4 Read not handled\n"); + // Do nothing... + return 0; +} - -int handle_cr3_write(struct guest_info * info) { - if (info->cpu_mode == PROTECTED) { - int index = 0; +int v3_handle_cr4_write(struct guest_info * info) { + uchar_t instr[15]; int ret; - char instr[15]; - - PrintDebug("Protected %s mode write to CR3 at %s 0x%x\n", - info->cpu_mode==PROTECTED ? "" : "Paged", - info->cpu_mode==PROTECTED ? "guest physical" : "guest virtual", - get_addr_linear(info,info->rip,&(info->segments.cs))); - - // We need to read the instruction, which is at CS:IP, but that - // linear address is guest physical without PG and guest virtual with PG + int flush_tlb=0; + struct x86_instr dec_instr; + v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info); + if (info->mem_mode == PHYSICAL_MEM) { - // The real rip address is actually a combination of the rip + CS base - PrintDebug("Writing Guest CR3 Write (Physical Address)\n"); - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - PrintDebug("Writing Guest CR3 Write (Virtual Address)\n"); - // The real rip address is actually a combination of the rip + CS base - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } - - if (ret != 15) { - PrintDebug("Could not read instruction (ret=%d)\n", ret); - return -1; + ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } - while (is_prefix_byte(instr[index])) { - index++; + if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { + PrintError("Could not decode instruction\n"); + return -1; } - - if ((instr[index] == cr_access_byte) && - (instr[index + 1] == mov_to_cr_byte)) { - - addr_t first_operand; - addr_t second_operand; - struct cr3_32 * new_cr3; - // struct cr3_32 * real_cr3; - operand_type_t addr_type; - - index += 2; - - addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - - if (addr_type != REG_OPERAND) { - /* Mov to CR3 can only be a 32 bit register */ + + if (dec_instr.op_type != V3_OP_MOV2CR) { + PrintError("Invalid opcode in write to CR4\n"); return -1; - } - - new_cr3 = (struct cr3_32 *)first_operand; - - if (info->shdw_pg_mode == SHADOW_PAGING) { - addr_t shadow_pt; - struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3); - struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); - - - if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) { - PrintDebug("Shadow Page Table\n"); - PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3)); - } - - /* Delete the current Page Tables */ - delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3)); - - PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n", - *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3); - - - *guest_cr3 = *new_cr3; - - - - // Something like this - shadow_pt = create_new_shadow_pt32(info); - //shadow_pt = setup_shadow_pt32(info, CR3_TO_PDE32(*(addr_t *)new_cr3)); - - /* Copy Various flags */ - *shadow_cr3 = *new_cr3; - - { - addr_t tmp_addr; - guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr); - PrintDebug("Guest PD\n"); - PrintPD32((pde32_t *)tmp_addr); + } + + // Check to see if we need to flush the tlb + + if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) { + struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand); + struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4); + + // if pse, pge, or pae have changed while PG (in any mode) is on + // the side effect is a TLB flush, which means we need to + // toss the current shadow page tables too + // + // + // TODO - PAE FLAG needs to be special cased + if ((cr4->pse != new_cr4->pse) || + (cr4->pge != new_cr4->pge) || + (cr4->pae != new_cr4->pae)) { + PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n"); + flush_tlb=1; + + } + } + + if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) { + struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand); + struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4); + + PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size); + PrintDebug("Old CR4=%x\n", *(uint_t *)cr4); + + if ((info->shdw_pg_mode == SHADOW_PAGING)) { + if (v3_get_vm_mem_mode(info) == PHYSICAL_MEM) { + + if ((cr4->pae == 0) && (new_cr4->pae == 1)) { + PrintDebug("Creating PAE passthrough tables\n"); + + // create 32 bit PAE direct map page table + if (v3_reset_passthrough_pts(info) == -1) { + PrintError("Could not create 32 bit PAE passthrough pages tables\n"); + return -1; + } + + // reset cr3 to new page tables + info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt); + + } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) { + // Create passthrough standard 32bit pagetables + PrintError("Switching From PAE to Protected mode not supported\n"); + return -1; + } + } } - + *cr4 = *new_cr4; + PrintDebug("New CR4=%x\n", *(uint_t *)cr4); - shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt); - - PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n", - *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3); - - - - if (info->mem_mode == VIRTUAL_MEM) { - // If we aren't in paged mode then we have to preserve the identity mapped CR3 - info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3; + } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) { + struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand); + struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4); + + PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4); + PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4); + + if (new_cr4->pae == 0) { + // cannot turn off PAE in long mode GPF the guest + PrintError("Cannot disable PAE in long mode, should send GPF\n"); + return -1; } - } - - info->rip += index; - + + *cr4 = *new_cr4; + } else { - PrintDebug("Unknown Instruction\n"); - SerialMemDump(instr,15); - return -1; + PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode)); + return -1; } - } else { - PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode); - return -1; - } - - return 0; -} - - - - -int handle_cr3_read(struct guest_info * info) { - - if (info->cpu_mode == REAL) { - // what does this mean??? - - /* - - addr_t host_addr; - addr_t linear_addr = 0; - - - - linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs)); - - PrintDebug("RIP Linear: %x\n", linear_addr); - PrintV3Segments(&(info->segments)); - - if (info->mem_mode == PHYSICAL_MEM) { - guest_pa_to_host_pa(info, linear_addr, &host_addr); - } else if (info->mem_mode == VIRTUAL_MEM) { - guest_va_to_host_pa(info, linear_addr, &host_addr); - } - - - pt32_lookup((pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3), , addr_t * paddr); - */ - - - return -1; - } else if (info->cpu_mode == PROTECTED) { - - int index = 0; - int ret; - char instr[15]; - - - // We need to read the instruction, which is at CS:IP, but that - // linear address is guest physical without PG and guest virtual with PG - if (info->cpu_mode == PHYSICAL_MEM) { - // The real rip address is actually a combination of the rip + CS base - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } else { - // The real rip address is actually a combination of the rip + CS base - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); - } - - if (ret != 15) { - PrintDebug("Could not read instruction (ret=%d)\n", ret); - return -1; + if (flush_tlb) { + PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n"); + if (v3_activate_shadow_pt(info) == -1) { + PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n"); + return -1; + } } - while (is_prefix_byte(instr[index])) { - index++; - } - - if ((instr[index] == cr_access_byte) && - (instr[index + 1] == mov_from_cr_byte)) { - addr_t first_operand; - addr_t second_operand; - struct cr3_32 * virt_cr3; - struct cr3_32 * real_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3); - operand_type_t addr_type; - - index += 2; + + info->rip += dec_instr.instr_length; + return 0; +} - addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32); - if (addr_type != REG_OPERAND) { - /* Mov to CR3 can only be a 32 bit register */ - return -1; - } +int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) { + struct guest_info * info = (struct guest_info *)(priv_data); + PrintDebug("EFER Read HI=%x LO=%x\n", info->shdw_pg_state.guest_efer.hi, info->shdw_pg_state.guest_efer.lo); + + dst->value = info->shdw_pg_state.guest_efer.value; + + return 0; +} - virt_cr3 = (struct cr3_32 *)first_operand; - if (info->shdw_pg_mode == SHADOW_PAGING) { - *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); - } else { - *virt_cr3 = *real_cr3; - } - - info->rip += index; - } else { - PrintDebug("Unknown Instruction\n"); - SerialMemDump(instr,15); - return -1; - } - } else { - PrintDebug("Invalid operating Mode (0x%x), control registers follow\n", info->cpu_mode); - PrintCtrlRegs(info); - return -1; - } - return 0; +// TODO: this is a disaster we need to clean this up... +int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) { + struct guest_info * info = (struct guest_info *)(priv_data); + //struct efer_64 * new_efer = (struct efer_64 *)&(src.value); + struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer); + struct v3_msr * guest_efer = &(info->shdw_pg_state.guest_efer); + + PrintDebug("EFER Write\n"); + PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo); + //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer)); + + // We virtualize the guests efer to hide the SVME and LMA bits + guest_efer->value = src.value; + + + // Enable/Disable Syscall + shadow_efer->sce = src.value & 0x1; + + return 0; }