X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmcs.c;h=a77de77a7a1755983d0d7258a07c9cbbabb74519;hp=cf130fc68359cc60d5509e2796f0a870dfe2bbd5;hb=6541ca672276d841db22cc18a003303cf517ea89;hpb=1f5b9287e61b8a4164f81e52dccf3ddd59a891f8 diff --git a/palacios/src/palacios/vmcs.c b/palacios/src/palacios/vmcs.c index cf130fc..a77de77 100644 --- a/palacios/src/palacios/vmcs.c +++ b/palacios/src/palacios/vmcs.c @@ -20,149 +20,745 @@ #include #include #include +#include +#include +#include +#include + + + + + +static int inline check_vmcs_write(vmcs_field_t field, addr_t val) { + int ret = 0; + ret = vmcs_write(field, val); + + if (ret != VMX_SUCCESS) { + PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret); + return 1; + } + + return 0; +} + +static int inline check_vmcs_read(vmcs_field_t field, void * val) { + int ret = 0; + ret = vmcs_read(field, val); + + if (ret != VMX_SUCCESS) { + PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret); + } + + return ret; +} + + + + + + + +typedef enum { ES = 0, + CS = 2, + SS = 4, + DS = 6, + FS = 8, + GS = 10, + LDTR = 12, + TR = 14, + GDTR = 16, + IDTR = 18} vmcs_seg_offsets_t; + +typedef enum {BASE = VMCS_GUEST_ES_BASE, + LIMIT = VMCS_GUEST_ES_LIMIT, + ACCESS = VMCS_GUEST_ES_ACCESS, + SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t; + + + +static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) { + vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type; + vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type; + vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type; + vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type; + struct vmcs_segment vmcs_seg; + + memset(&vmcs_seg, 0, sizeof(struct vmcs_segment)); + + check_vmcs_read(limit, &(vmcs_seg.limit)); + check_vmcs_read(base, &(vmcs_seg.base)); + + if ((seg_type != GDTR) && (seg_type != IDTR)) { + check_vmcs_read(selector, &(vmcs_seg.selector)); + check_vmcs_read(access, &(vmcs_seg.access.val)); + } + + v3_vmxseg_to_seg(&vmcs_seg, seg); + + return 0; +} + +static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) { + vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type; + vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type; + vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type; + vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type; + struct vmcs_segment vmcs_seg; + + v3_seg_to_vmxseg(seg, &vmcs_seg); + + check_vmcs_write(limit, vmcs_seg.limit); + check_vmcs_write(base, vmcs_seg.base); + + if ((seg_type != GDTR) && (seg_type != IDTR)) { + check_vmcs_write(access, vmcs_seg.access.val); + check_vmcs_write(selector, vmcs_seg.selector); + } + + return 0; +} + +int v3_read_vmcs_segments(struct v3_segments * segs) { + v3_read_vmcs_segment(&(segs->cs), CS); + v3_read_vmcs_segment(&(segs->ds), DS); + v3_read_vmcs_segment(&(segs->es), ES); + v3_read_vmcs_segment(&(segs->fs), FS); + v3_read_vmcs_segment(&(segs->gs), GS); + v3_read_vmcs_segment(&(segs->ss), SS); + v3_read_vmcs_segment(&(segs->ldtr), LDTR); + v3_read_vmcs_segment(&(segs->gdtr), GDTR); + v3_read_vmcs_segment(&(segs->idtr), IDTR); + v3_read_vmcs_segment(&(segs->tr), TR); + + return 0; +} + +int v3_write_vmcs_segments(struct v3_segments * segs) { + v3_write_vmcs_segment(&(segs->cs), CS); + v3_write_vmcs_segment(&(segs->ds), DS); + v3_write_vmcs_segment(&(segs->es), ES); + v3_write_vmcs_segment(&(segs->fs), FS); + v3_write_vmcs_segment(&(segs->gs), GS); + v3_write_vmcs_segment(&(segs->ss), SS); + v3_write_vmcs_segment(&(segs->ldtr), LDTR); + v3_write_vmcs_segment(&(segs->gdtr), GDTR); + v3_write_vmcs_segment(&(segs->idtr), IDTR); + v3_write_vmcs_segment(&(segs->tr), TR); + + return 0; +} + + +void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) { + memset(seg, 0, sizeof(struct v3_segment)); + + seg->selector = vmcs_seg->selector; + seg->limit = vmcs_seg->limit; + seg->base = vmcs_seg->base; + + seg->type = vmcs_seg->access.type; + seg->system = vmcs_seg->access.desc_type; + seg->dpl = vmcs_seg->access.dpl; + seg->present = vmcs_seg->access.present; + seg->avail = vmcs_seg->access.avail; + seg->long_mode = vmcs_seg->access.long_mode; + seg->db = vmcs_seg->access.db; + seg->granularity = vmcs_seg->access.granularity; + seg->unusable = vmcs_seg->access.unusable; + +} + +void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) { + memset(vmcs_seg, 0, sizeof(struct vmcs_segment)); + + vmcs_seg->selector = seg->selector; + vmcs_seg->limit = seg->limit; + vmcs_seg->base = seg->base; + + vmcs_seg->access.type = seg->type; + vmcs_seg->access.desc_type = seg->system; + vmcs_seg->access.dpl = seg->dpl; + vmcs_seg->access.present = seg->present; + vmcs_seg->access.avail = seg->avail; + vmcs_seg->access.long_mode = seg->long_mode; + vmcs_seg->access.db = seg->db; + vmcs_seg->access.granularity = seg->granularity; + vmcs_seg->access.unusable = seg->unusable; +} + + + + +int v3_update_vmcs_ctrl_fields(struct guest_info * info) { + int vmx_ret = 0; + struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data); + + vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value); + vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value); + + if (arch_data->pri_proc_ctrls.sec_ctrls) { + vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value); + } + + vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value); + vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value); + + return vmx_ret; +} + + + + + + +int v3_vmx_save_vmcs(struct guest_info * info) { + struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); + int error = 0; + + check_vmcs_read(VMCS_GUEST_RIP, &(info->rip)); + check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp)); + + check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0)); + check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0)); + check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3)); + check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4)); + check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4)); + check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7)); + + check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags)); + if (((struct vmx_data *)info->vmm_data)->ia32e_avail) { + check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer)); + } + + error = v3_read_vmcs_segments(&(info->segments)); + + return error; +} + + +int v3_vmx_restore_vmcs(struct guest_info * info) { + struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); + int error = 0; + + check_vmcs_write(VMCS_GUEST_RIP, info->rip); + check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp); + + check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0); + check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0); + check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3); + check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4); + check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4); + check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7); + + check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags); + + if (((struct vmx_data *)info->vmm_data)->ia32e_avail) { + check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer); + } + + error = v3_write_vmcs_segments(&(info->segments)); + + return error; + +} + + + +int v3_update_vmcs_host_state(struct guest_info * info) { + int vmx_ret = 0; + addr_t tmp; + struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data); + struct v3_msr tmp_msr; + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%cr0, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%cr0, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp); + + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%cr3, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%cr3, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp); + + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%cr4, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%cr4, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp); + + + + vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, arch_data->host_state.gdtr.base); + vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base); + vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base); + +#define FS_BASE_MSR 0xc0000100 +#define GS_BASE_MSR 0xc0000101 + + // FS.BASE MSR + v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value); + + // GS.BASE MSR + v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value); + + + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%cs, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%cs, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp); + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%ss, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%ss, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp); + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%ds, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%ds, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp); + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%es, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%es, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp); + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%fs, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%fs, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp); + +#ifdef __V3_64BIT__ + __asm__ __volatile__ ( "movq %%gs, %0; " + : "=q"(tmp) + : + ); +#else + __asm__ __volatile__ ( "movl %%gs, %0; " + : "=q"(tmp) + : + ); +#endif + vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp); + + vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, arch_data->host_state.tr.selector); + + +#define SYSENTER_CS_MSR 0x00000174 +#define SYSENTER_ESP_MSR 0x00000175 +#define SYSENTER_EIP_MSR 0x00000176 + + // SYSENTER CS MSR + v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo); + + // SYSENTER_ESP MSR + v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value); + + // SYSENTER_EIP MSR + v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value); + + return vmx_ret; +} + -//extern char * exception_names; -// -// Ignores "HIGH" addresses - 32 bit only for now -// static inline void print_vmcs_field(vmcs_field_t vmcs_index) { int len = v3_vmcs_get_field_len(vmcs_index); addr_t val; - if (vmcs_read(vmcs_index, &val, len) != VMX_SUCCESS) { - PrintError("VMCS_READ error for index %x\n", vmcs_index); + if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) { + PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index)); return; }; if (len == 2) { - PrintDebug("%s: %x\n", v3_vmcs_get_field_name(vmcs_index), (uint16_t)val); + PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val); } else if (len == 4) { - PrintDebug("%s: %x\n", v3_vmcs_get_field_name(vmcs_index), (uint32_t)val); + PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val); } else if (len == 8) { - PrintDebug("%s: %p\n", v3_vmcs_get_field_name(vmcs_index), (void *)(addr_t)val); + PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val); } } -static inline void print_vmcs_segments() { - // see vm_guest.c +static void print_vmcs_segments() { + struct v3_segments segs; + + v3_read_vmcs_segments(&segs); + v3_print_segments(&segs); + + + PrintDebug(" ==> CS\n"); + print_vmcs_field(VMCS_GUEST_CS_SELECTOR); + print_vmcs_field(VMCS_GUEST_CS_BASE); + print_vmcs_field(VMCS_GUEST_CS_LIMIT); + print_vmcs_field(VMCS_GUEST_CS_ACCESS); + + PrintDebug(" ==> SS\n"); + print_vmcs_field(VMCS_GUEST_SS_SELECTOR); + print_vmcs_field(VMCS_GUEST_SS_BASE); + print_vmcs_field(VMCS_GUEST_SS_LIMIT); + print_vmcs_field(VMCS_GUEST_SS_ACCESS); + + PrintDebug(" ==> DS\n"); + print_vmcs_field(VMCS_GUEST_DS_SELECTOR); + print_vmcs_field(VMCS_GUEST_DS_BASE); + print_vmcs_field(VMCS_GUEST_DS_LIMIT); + print_vmcs_field(VMCS_GUEST_DS_ACCESS); + + PrintDebug(" ==> ES\n"); + print_vmcs_field(VMCS_GUEST_ES_SELECTOR); + print_vmcs_field(VMCS_GUEST_ES_BASE); + print_vmcs_field(VMCS_GUEST_ES_LIMIT); + print_vmcs_field(VMCS_GUEST_ES_ACCESS); + + PrintDebug(" ==> FS\n"); + print_vmcs_field(VMCS_GUEST_FS_SELECTOR); + print_vmcs_field(VMCS_GUEST_FS_BASE); + print_vmcs_field(VMCS_GUEST_FS_LIMIT); + print_vmcs_field(VMCS_GUEST_FS_ACCESS); + + PrintDebug(" ==> GS\n"); + print_vmcs_field(VMCS_GUEST_GS_SELECTOR); + print_vmcs_field(VMCS_GUEST_GS_BASE); + print_vmcs_field(VMCS_GUEST_GS_LIMIT); + print_vmcs_field(VMCS_GUEST_GS_ACCESS); + + PrintDebug(" ==> LDTR\n"); + print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR); + print_vmcs_field(VMCS_GUEST_LDTR_BASE); + print_vmcs_field(VMCS_GUEST_LDTR_LIMIT); + print_vmcs_field(VMCS_GUEST_LDTR_ACCESS); + + PrintDebug(" ==> TR\n"); + print_vmcs_field(VMCS_GUEST_TR_SELECTOR); + print_vmcs_field(VMCS_GUEST_TR_BASE); + print_vmcs_field(VMCS_GUEST_TR_LIMIT); + print_vmcs_field(VMCS_GUEST_TR_ACCESS); + + PrintDebug(" ==> GDTR\n"); + print_vmcs_field(VMCS_GUEST_GDTR_BASE); + print_vmcs_field(VMCS_GUEST_GDTR_LIMIT); + + PrintDebug(" ==> IDTR\n"); + print_vmcs_field(VMCS_GUEST_IDTR_BASE); + print_vmcs_field(VMCS_GUEST_IDTR_LIMIT); + + } -/* -void print_debug_vmcs_load_guest() { - const int wordsize = sizeof(addr_t); - uint64_t temp; - struct vmcs_segment_access tmp_seg; - - PrintDebug("\n====== Loading Guest State ======\n"); - PRINT_VMREAD("Guest CR0: %x\n", GUEST_CR0, wordsize); - PRINT_VMREAD("Guest CR3: %x\n", GUEST_CR3, wordsize); - PRINT_VMREAD("Guest CR4: %x\n", GUEST_CR4, wordsize); - PRINT_VMREAD("Guest DR7: %x\n", GUEST_DR7, wordsize); - - READ_VMCS_SEG(&tmp_seg,CS,wordsize); - print_vmcs_segment("CS", &tmp_seg); +static void print_guest_state() +{ + PrintDebug("VMCS_GUEST_STATE\n"); + print_vmcs_field(VMCS_GUEST_RIP); + print_vmcs_field(VMCS_GUEST_RSP); + print_vmcs_field(VMCS_GUEST_RFLAGS); + print_vmcs_field(VMCS_GUEST_CR0); + print_vmcs_field(VMCS_GUEST_CR3); + print_vmcs_field(VMCS_GUEST_CR4); + print_vmcs_field(VMCS_GUEST_DR7); + + + PrintDebug("\n"); + + print_vmcs_segments(); + + PrintDebug("\n"); + + print_vmcs_field(VMCS_GUEST_DBG_CTL); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH); +#endif + print_vmcs_field(VMCS_GUEST_SYSENTER_CS); + print_vmcs_field(VMCS_GUEST_SYSENTER_ESP); + print_vmcs_field(VMCS_GUEST_SYSENTER_EIP); + + print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH); +#endif + + print_vmcs_field(VMCS_GUEST_SMBASE); + + + PrintDebug("GUEST_NON_REGISTER_STATE\n"); + + print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE); + print_vmcs_field(VMCS_GUEST_INT_STATE); + print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP); + +} + +static void print_host_state() +{ + PrintDebug("VMCS_HOST_STATE\n"); + + print_vmcs_field(VMCS_HOST_RIP); + print_vmcs_field(VMCS_HOST_RSP); + print_vmcs_field(VMCS_HOST_CR0); + print_vmcs_field(VMCS_HOST_CR3); + print_vmcs_field(VMCS_HOST_CR4); + + PrintDebug("\n"); + print_vmcs_field(VMCS_HOST_CS_SELECTOR); + print_vmcs_field(VMCS_HOST_SS_SELECTOR); + print_vmcs_field(VMCS_HOST_DS_SELECTOR); + print_vmcs_field(VMCS_HOST_ES_SELECTOR); + print_vmcs_field(VMCS_HOST_FS_SELECTOR); + print_vmcs_field(VMCS_HOST_GS_SELECTOR); + print_vmcs_field(VMCS_HOST_TR_SELECTOR); + + PrintDebug("\n"); + print_vmcs_field(VMCS_HOST_FS_BASE); + print_vmcs_field(VMCS_HOST_GS_BASE); + print_vmcs_field(VMCS_HOST_TR_BASE); + print_vmcs_field(VMCS_HOST_GDTR_BASE); + print_vmcs_field(VMCS_HOST_IDTR_BASE); + + PrintDebug("\n"); + print_vmcs_field(VMCS_HOST_SYSENTER_CS); + print_vmcs_field(VMCS_HOST_SYSENTER_ESP); + print_vmcs_field(VMCS_HOST_SYSENTER_EIP); + + print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH); +#endif +} + + +static void print_exec_ctrls() { + PrintDebug("VMCS_EXEC_CTRL_FIELDS\n"); + print_vmcs_field(VMCS_PIN_CTRLS); + print_vmcs_field(VMCS_PROC_CTRLS); + print_vmcs_field(VMCS_SEC_PROC_CTRLS); - READ_VMCS_SEG(&tmp_seg,SS,wordsize); - print_vmcs_segment("SS", &tmp_seg); + print_vmcs_field(VMCS_EXCP_BITMAP); + print_vmcs_field(VMCS_PG_FAULT_ERR_MASK); + print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH); + + print_vmcs_field(VMCS_IO_BITMAP_A_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH); +#endif + print_vmcs_field(VMCS_IO_BITMAP_B_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH); +#endif + + print_vmcs_field(VMCS_TSC_OFFSET); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_TSC_OFFSET_HIGH); +#endif + + PrintDebug("\n"); + + print_vmcs_field(VMCS_CR0_MASK); + print_vmcs_field(VMCS_CR0_READ_SHDW); + print_vmcs_field(VMCS_CR4_MASK); + print_vmcs_field(VMCS_CR4_READ_SHDW); - READ_VMCS_SEG(&tmp,DS,wordsize); - print_vmcs_segment("DS", &tmp_seg); + print_vmcs_field(VMCS_CR3_TGT_CNT); + print_vmcs_field(VMCS_CR3_TGT_VAL_0); + print_vmcs_field(VMCS_CR3_TGT_VAL_1); + print_vmcs_field(VMCS_CR3_TGT_VAL_2); + print_vmcs_field(VMCS_CR3_TGT_VAL_3); - READ_VMCS_SEG(&tmp_seg,ES,wordsize); - print_vmcs_segment("ES", &tmp_seg); + PrintDebug("\n"); - READ_VMCS_SEG(&tmp_seg,FS,wordsize); - print_vmcs_segment("FS", &tmp_seg); + print_vmcs_field(VMCS_APIC_ACCESS_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH); +#endif + + print_vmcs_field(VMCS_VAPIC_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_VAPIC_ADDR_HIGH); +#endif + + print_vmcs_field(VMCS_TPR_THRESHOLD); - READ_VMCS_SEG(&tmp_seg,GS,wordsize); - print_vmcs_segment("GS", &tmp_seg); + print_vmcs_field(VMCS_MSR_BITMAP); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_MSR_BITMAP_HIGH); +#endif + + print_vmcs_field(VMCS_EXEC_PTR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_EXEC_PTR_HIGH); +#endif +} - READ_VMCS_SEG(&tmp_seg,TR,wordsize); - print_vmcs_segment("TR", &tmp_seg); - READ_VMCS_SEG(&tmp_seg,LDTR,wordsize); - print_vmcs_segment("LDTR", &tmp_seg); +static void print_exit_ctrls() { + PrintDebug("VMCS_EXIT_CTRLS\n"); + + print_vmcs_field(VMCS_EXIT_CTRLS); + + + print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT); + print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH); +#endif + + print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT); + print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH); +#endif + +} + + +static void print_entry_ctrls() { + PrintDebug("VMCS_ENTRY_CTRLS\n"); - PrintDebug("\n==GDTR==\n"); - PRINT_VMREAD("GDTR Base: %x\n", GUEST_GDTR_BASE, wordsize); - PRINT_VMREAD("GDTR Limit: %x\n", GUEST_GDTR_LIMIT, 32); - PrintDebug("====\n"); - - PrintDebug("\n==LDTR==\n"); - PRINT_VMREAD("LDTR Base: %x\n", GUEST_LDTR_BASE, wordsize); - PRINT_VMREAD("LDTR Limit: %x\n", GUEST_LDTR_LIMIT, 32); - PrintDebug("=====\n"); - - PRINT_VMREAD("Guest RSP: %x\n", GUEST_RSP, wordsize); - PRINT_VMREAD("Guest RIP: %x\n", GUEST_RIP, wordsize); - PRINT_VMREAD("Guest RFLAGS: %x\n", GUEST_RFLAGS, wordsize); - PRINT_VMREAD("Guest Activity state: %x\n", GUEST_ACTIVITY_STATE, 32); - PRINT_VMREAD("Guest Interruptibility state: %x\n", GUEST_INT_STATE, 32); - PRINT_VMREAD("Guest pending debug: %x\n", GUEST_PENDING_DEBUG_EXCS, wordsize); - - PRINT_VMREAD("IA32_DEBUGCTL: %x\n", GUEST_IA32_DEBUGCTL, 64); - PRINT_VMREAD("IA32_SYSENTER_CS: %x\n", GUEST_IA32_SYSENTER_CS, 32); - PRINT_VMREAD("IA32_SYSTENTER_ESP: %x\n", GUEST_IA32_SYSENTER_ESP, wordsize); - PRINT_VMREAD("IA32_SYSTENTER_EIP: %x\n", GUEST_IA32_SYSENTER_EIP, wordsize); - PRINT_VMREAD("IA32_PERF_GLOBAL_CTRL: %x\n", GUEST_IA32_PERF_GLOBAL_CTRL, wordsize); - PRINT_VMREAD("VMCS Link Ptr: %x\n", VMCS_LINK_PTR, 64); - // TODO: Maybe add VMX preemption timer and PDTE (Intel 20-8 Vol. 3b) + print_vmcs_field(VMCS_ENTRY_CTRLS); + + print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT); + print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH); +#endif + + print_vmcs_field(VMCS_ENTRY_INT_INFO); + print_vmcs_field(VMCS_ENTRY_EXCP_ERR); + print_vmcs_field(VMCS_ENTRY_INSTR_LEN); + + } -void print_debug_load_host() { - const int wordsize = sizeof(addr_t); - uint64_t temp; - vmcs_segment tmp_seg; - - PrintDebug("\n====== Host State ========\n"); - PRINT_VMREAD("Host CR0: %x\n", HOST_CR0, wordsize); - PRINT_VMREAD("Host CR3: %x\n", HOST_CR3, wordsize); - PRINT_VMREAD("Host CR4: %x\n", HOST_CR4, wordsize); - PRINT_VMREAD("Host RSP: %x\n", HOST_RSP, wordsize); - PRINT_VMREAD("Host RIP: %x\n", HOST_RIP, wordsize); - PRINT_VMREAD("IA32_SYSENTER_CS: %x\n", HOST_IA32_SYSENTER_CS, 32); - PRINT_VMREAD("IA32_SYSENTER_ESP: %x\n", HOST_IA32_SYSENTER_ESP, wordsize); - PRINT_VMREAD("IA32_SYSENTER_EIP: %x\n", HOST_IA32_SYSENTER_EIP, wordsize); - - PRINT_VMREAD("Host CS Selector: %x\n", HOST_CS_SELECTOR, 16); - PRINT_VMREAD("Host SS Selector: %x\n", HOST_SS_SELECTOR, 16); - PRINT_VMREAD("Host DS Selector: %x\n", HOST_DS_SELECTOR, 16); - PRINT_VMREAD("Host ES Selector: %x\n", HOST_ES_SELECTOR, 16); - PRINT_VMREAD("Host FS Selector: %x\n", HOST_FS_SELECTOR, 16); - PRINT_VMREAD("Host GS Selector: %x\n", HOST_GS_SELECTOR, 16); - PRINT_VMREAD("Host TR Selector: %x\n", HOST_TR_SELECTOR, 16); - - PRINT_VMREAD("Host FS Base: %x\n", HOST_FS_BASE, wordsize); - PRINT_VMREAD("Host GS Base: %x\n", HOST_GS_BASE, wordsize); - PRINT_VMREAD("Host TR Base: %x\n", HOST_TR_BASE, wordsize); - PRINT_VMREAD("Host GDTR Base: %x\n", HOST_GDTR_BASE, wordsize); - PRINT_VMREAD("Host IDTR Base: %x\n", HOSE_IDTR_BASE, wordsize); + +static void print_exit_info() { + PrintDebug("VMCS_EXIT_INFO\n"); + + print_vmcs_field(VMCS_EXIT_REASON); + print_vmcs_field(VMCS_EXIT_QUAL); + + print_vmcs_field(VMCS_EXIT_INT_INFO); + print_vmcs_field(VMCS_EXIT_INT_ERR); + + print_vmcs_field(VMCS_IDT_VECTOR_INFO); + print_vmcs_field(VMCS_IDT_VECTOR_ERR); + + print_vmcs_field(VMCS_EXIT_INSTR_LEN); + + print_vmcs_field(VMCS_GUEST_LINEAR_ADDR); + print_vmcs_field(VMCS_EXIT_INSTR_INFO); + + print_vmcs_field(VMCS_IO_RCX); + print_vmcs_field(VMCS_IO_RSI); + print_vmcs_field(VMCS_IO_RDI); + print_vmcs_field(VMCS_IO_RIP); + + + print_vmcs_field(VMCS_INSTR_ERR); +} + +void v3_print_vmcs() { + + print_vmcs_field(VMCS_LINK_PTR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_LINK_PTR_HIGH); +#endif + + print_guest_state(); + print_host_state(); + + print_exec_ctrls(); + print_exit_ctrls(); + print_entry_ctrls(); + print_exit_info(); + + + + } -void print_vmcs_segment(char * name, vmcs_segment* seg) -{ - PrintDebug("\n==VMCS %s Segment==\n",name); - PrintDebug("\tSelector: %x\n", seg->selector); - PrintDebug("\tBase Address: %x\n", seg->baseAddr); - PrintDebug("\tLimit: %x\n", seg->limit); - PrintDebug("\tAccess: %x\n", seg->access); -}*/ /* * Returns the field length in bytes */ -int v3_vmcs_get_field_len(vmcs_field_t field) -{ - switch(field) - { +int v3_vmcs_get_field_len(vmcs_field_t field) { + switch(field) { + /* 16 bit Control Fields */ case VMCS_GUEST_ES_SELECTOR: case VMCS_GUEST_CS_SELECTOR: case VMCS_GUEST_SS_SELECTOR: @@ -171,7 +767,6 @@ int v3_vmcs_get_field_len(vmcs_field_t field) case VMCS_GUEST_GS_SELECTOR: case VMCS_GUEST_LDTR_SELECTOR: case VMCS_GUEST_TR_SELECTOR: - /* 16 bit host state */ case VMCS_HOST_ES_SELECTOR: case VMCS_HOST_CS_SELECTOR: case VMCS_HOST_SS_SELECTOR: @@ -180,410 +775,570 @@ int v3_vmcs_get_field_len(vmcs_field_t field) case VMCS_HOST_GS_SELECTOR: case VMCS_HOST_TR_SELECTOR: return 2; - /* 64 bit control fields */ - case IO_BITMAP_A_ADDR: - case IO_BITMAP_A_ADDR_HIGH: - case IO_BITMAP_B_ADDR: - case IO_BITMAP_B_ADDR_HIGH: - case MSR_BITMAPS: - case MSR_BITMAPS_HIGH: - case VM_EXIT_MSR_STORE_ADDR: - case VM_EXIT_MSR_STORE_ADDR_HIGH: - case VM_EXIT_MSR_LOAD_ADDR: - case VM_EXIT_MSR_LOAD_ADDR_HIGH: - case VM_ENTRY_MSR_LOAD_ADDR: - case VM_ENTRY_MSR_LOAD_ADDR_HIGH: - case VMCS_EXEC_PTR: + + /* 32 bit Control Fields */ + case VMCS_PIN_CTRLS: + case VMCS_PROC_CTRLS: + case VMCS_SEC_PROC_CTRLS: + case VMCS_EXCP_BITMAP: + case VMCS_PG_FAULT_ERR_MASK: + case VMCS_PG_FAULT_ERR_MATCH: + case VMCS_CR3_TGT_CNT: + case VMCS_EXIT_CTRLS: + case VMCS_EXIT_MSR_STORE_CNT: + case VMCS_EXIT_MSR_LOAD_CNT: + case VMCS_ENTRY_CTRLS: + case VMCS_ENTRY_MSR_LOAD_CNT: + case VMCS_ENTRY_INT_INFO: + case VMCS_ENTRY_EXCP_ERR: + case VMCS_ENTRY_INSTR_LEN: + case VMCS_TPR_THRESHOLD: + case VMCS_INSTR_ERR: + case VMCS_EXIT_REASON: + case VMCS_EXIT_INT_INFO: + case VMCS_EXIT_INT_ERR: + case VMCS_IDT_VECTOR_INFO: + case VMCS_IDT_VECTOR_ERR: + case VMCS_EXIT_INSTR_LEN: + case VMCS_EXIT_INSTR_INFO: + case VMCS_GUEST_ES_LIMIT: + case VMCS_GUEST_CS_LIMIT: + case VMCS_GUEST_SS_LIMIT: + case VMCS_GUEST_DS_LIMIT: + case VMCS_GUEST_FS_LIMIT: + case VMCS_GUEST_GS_LIMIT: + case VMCS_GUEST_LDTR_LIMIT: + case VMCS_GUEST_TR_LIMIT: + case VMCS_GUEST_GDTR_LIMIT: + case VMCS_GUEST_IDTR_LIMIT: + case VMCS_GUEST_ES_ACCESS: + case VMCS_GUEST_CS_ACCESS: + case VMCS_GUEST_SS_ACCESS: + case VMCS_GUEST_DS_ACCESS: + case VMCS_GUEST_FS_ACCESS: + case VMCS_GUEST_GS_ACCESS: + case VMCS_GUEST_LDTR_ACCESS: + case VMCS_GUEST_TR_ACCESS: + case VMCS_GUEST_INT_STATE: + case VMCS_GUEST_ACTIVITY_STATE: + case VMCS_GUEST_SMBASE: + case VMCS_GUEST_SYSENTER_CS: + case VMCS_HOST_SYSENTER_CS: + return 4; + + + /* high bits of variable width fields + * We can probably just delete most of these.... + */ + case VMCS_IO_BITMAP_A_ADDR_HIGH: + case VMCS_IO_BITMAP_B_ADDR_HIGH: + case VMCS_MSR_BITMAP_HIGH: + case VMCS_EXIT_MSR_STORE_ADDR_HIGH: + case VMCS_EXIT_MSR_LOAD_ADDR_HIGH: + case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH: case VMCS_EXEC_PTR_HIGH: - case TSC_OFFSET: - case TSC_OFFSET_HIGH: - case VIRT_APIC_PAGE_ADDR: - case VIRT_APIC_PAGE_ADDR_HIGH: - /* 64 bit guest state fields */ - case VMCS_LINK_PTR: + case VMCS_TSC_OFFSET_HIGH: + case VMCS_VAPIC_ADDR_HIGH: + case VMCS_APIC_ACCESS_ADDR_HIGH: case VMCS_LINK_PTR_HIGH: - case GUEST_IA32_DEBUGCTL: - case GUEST_IA32_DEBUGCTL_HIGH: - case GUEST_IA32_PERF_GLOBAL_CTRL: - case GUEST_IA32_PERF_GLOBAL_CTRL_HIGH: - return 8; - /* 32 bit control fields */ - case PIN_VM_EXEC_CTRLS: - case PROC_VM_EXEC_CTRLS: - case EXCEPTION_BITMAP: - case PAGE_FAULT_ERROR_MASK: - case PAGE_FAULT_ERROR_MATCH: - case CR3_TARGET_COUNT: - case VM_EXIT_CTRLS: - case VM_EXIT_MSR_STORE_COUNT: - case VM_EXIT_MSR_LOAD_COUNT: - case VM_ENTRY_CTRLS: - case VM_ENTRY_MSR_LOAD_COUNT: - case VM_ENTRY_INT_INFO_FIELD: - case VM_ENTRY_EXCEPTION_ERROR: - case VM_ENTRY_INSTR_LENGTH: - case TPR_THRESHOLD: - /* 32 bit Read Only data fields */ - case VM_INSTR_ERROR: - case EXIT_REASON: - case VM_EXIT_INT_INFO: - case VM_EXIT_INT_ERROR: - case IDT_VECTOR_INFO: - case IDT_VECTOR_ERROR: - case VM_EXIT_INSTR_LENGTH: - case VMX_INSTR_INFO: - /* 32 bit Guest state fields */ - case GUEST_ES_LIMIT: - case GUEST_CS_LIMIT: - case GUEST_SS_LIMIT: - case GUEST_DS_LIMIT: - case GUEST_FS_LIMIT: - case GUEST_GS_LIMIT: - case GUEST_LDTR_LIMIT: - case GUEST_TR_LIMIT: - case GUEST_GDTR_LIMIT: - case GUEST_IDTR_LIMIT: - case GUEST_ES_ACCESS: - case GUEST_CS_ACCESS: - case GUEST_SS_ACCESS: - case GUEST_DS_ACCESS: - case GUEST_FS_ACCESS: - case GUEST_GS_ACCESS: - case GUEST_LDTR_ACCESS: - case GUEST_TR_ACCESS: - case GUEST_INT_STATE: - case GUEST_ACTIVITY_STATE: - case GUEST_SMBASE: - case GUEST_IA32_SYSENTER_CS: - /* 32 bit host state field */ - case HOST_IA32_SYSENTER_CS: + case VMCS_GUEST_DBG_CTL_HIGH: + case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH: + case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH: return 4; + /* Natural Width Control Fields */ - case CR0_GUEST_HOST_MASK: - case CR4_GUEST_HOST_MASK: - case CR0_READ_SHADOW: - case CR4_READ_SHADOW: - case CR3_TARGET_VALUE_0: - case CR3_TARGET_VALUE_1: - case CR3_TARGET_VALUE_2: - case CR3_TARGET_VALUE_3: - /* Natural Width Read Only Fields */ - case EXIT_QUALIFICATION: - case IO_RCX: - case IO_RSI: - case IO_RDI: - case IO_RIP: - case GUEST_LINEAR_ADDR: - /* Natural Width Guest State Fields */ - case GUEST_CR0: - case GUEST_CR3: - case GUEST_CR4: - case GUEST_ES_BASE: - case GUEST_CS_BASE: - case GUEST_SS_BASE: - case GUEST_DS_BASE: - case GUEST_FS_BASE: - case GUEST_GS_BASE: - case GUEST_LDTR_BASE: - case GUEST_TR_BASE: - case GUEST_GDTR_BASE: - case GUEST_IDTR_BASE: - case GUEST_DR7: - case GUEST_RSP: - case GUEST_RIP: - case GUEST_RFLAGS: - case GUEST_PENDING_DEBUG_EXCS: - case GUEST_IA32_SYSENTER_ESP: - case GUEST_IA32_SYSENTER_EIP: - /* Natural Width Host State Fields */ - case HOST_CR0: - case HOST_CR3: - case HOST_CR4: - case HOST_FS_BASE: - case HOST_GS_BASE: - case HOST_TR_BASE: - case HOST_GDTR_BASE: - case HOST_IDTR_BASE: - case HOST_IA32_SYSENTER_ESP: - case HOST_IA32_SYSENTER_EIP: - case HOST_RSP: - case HOST_RIP: - #ifdef __V3_64BIT__ - return 8; -#else - return 4; -#endif + case VMCS_IO_BITMAP_A_ADDR: + case VMCS_IO_BITMAP_B_ADDR: + case VMCS_MSR_BITMAP: + case VMCS_EXIT_MSR_STORE_ADDR: + case VMCS_EXIT_MSR_LOAD_ADDR: + case VMCS_ENTRY_MSR_LOAD_ADDR: + case VMCS_EXEC_PTR: + case VMCS_TSC_OFFSET: + case VMCS_VAPIC_ADDR: + case VMCS_APIC_ACCESS_ADDR: + case VMCS_LINK_PTR: + case VMCS_GUEST_DBG_CTL: + case VMCS_GUEST_PERF_GLOBAL_CTRL: + case VMCS_HOST_PERF_GLOBAL_CTRL: + case VMCS_CR0_MASK: + case VMCS_CR4_MASK: + case VMCS_CR0_READ_SHDW: + case VMCS_CR4_READ_SHDW: + case VMCS_CR3_TGT_VAL_0: + case VMCS_CR3_TGT_VAL_1: + case VMCS_CR3_TGT_VAL_2: + case VMCS_CR3_TGT_VAL_3: + case VMCS_EXIT_QUAL: + case VMCS_IO_RCX: + case VMCS_IO_RSI: + case VMCS_IO_RDI: + case VMCS_IO_RIP: + case VMCS_GUEST_LINEAR_ADDR: + case VMCS_GUEST_CR0: + case VMCS_GUEST_CR3: + case VMCS_GUEST_CR4: + case VMCS_GUEST_ES_BASE: + case VMCS_GUEST_CS_BASE: + case VMCS_GUEST_SS_BASE: + case VMCS_GUEST_DS_BASE: + case VMCS_GUEST_FS_BASE: + case VMCS_GUEST_GS_BASE: + case VMCS_GUEST_LDTR_BASE: + case VMCS_GUEST_TR_BASE: + case VMCS_GUEST_GDTR_BASE: + case VMCS_GUEST_IDTR_BASE: + case VMCS_GUEST_DR7: + case VMCS_GUEST_RSP: + case VMCS_GUEST_RIP: + case VMCS_GUEST_RFLAGS: + case VMCS_GUEST_PENDING_DBG_EXCP: + case VMCS_GUEST_SYSENTER_ESP: + case VMCS_GUEST_SYSENTER_EIP: + case VMCS_HOST_CR0: + case VMCS_HOST_CR3: + case VMCS_HOST_CR4: + case VMCS_HOST_FS_BASE: + case VMCS_HOST_GS_BASE: + case VMCS_HOST_TR_BASE: + case VMCS_HOST_GDTR_BASE: + case VMCS_HOST_IDTR_BASE: + case VMCS_HOST_SYSENTER_ESP: + case VMCS_HOST_SYSENTER_EIP: + case VMCS_HOST_RSP: + case VMCS_HOST_RIP: + return sizeof(addr_t); + default: + PrintError("Invalid VMCS field\n"); return -1; } } -char* v3_vmcs_get_field_name(vmcs_field_t field) -{ - switch(field) - { + + + + + + + + + + + +static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR"; +static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR"; +static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR"; +static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR"; +static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR"; +static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR"; +static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR"; +static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR"; +static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR"; +static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR"; +static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR"; +static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR"; +static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR"; +static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR"; +static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR"; +static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR"; +static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH"; +static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR"; +static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH"; +static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS"; +static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH"; +static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR"; +static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH"; +static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR"; +static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH"; +static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR"; +static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH"; +static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR"; +static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH"; +static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET"; +static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH"; +static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR"; +static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH"; +static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR"; +static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH"; +static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR"; +static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH"; +static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL"; +static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH"; +static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL"; +static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH"; +static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL"; +static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH"; +static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS"; +static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS"; +static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP"; +static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK"; +static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH"; +static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT"; +static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS"; +static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT"; +static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT"; +static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS"; +static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT"; +static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD"; +static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR"; +static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH"; +static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD"; +static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS"; +static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR"; +static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON"; +static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO"; +static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR"; +static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO"; +static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR"; +static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH"; +static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO"; +static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT"; +static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT"; +static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT"; +static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT"; +static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT"; +static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT"; +static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT"; +static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT"; +static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT"; +static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT"; +static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS"; +static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS"; +static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS"; +static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS"; +static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS"; +static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS"; +static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS"; +static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS"; +static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE"; +static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE"; +static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE"; +static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS"; +static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS"; +static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK"; +static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK"; +static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW"; +static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW"; +static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0"; +static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1"; +static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2"; +static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3"; +static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION"; +static const char VMCS_IO_RCX_STR[] = "IO_RCX"; +static const char VMCS_IO_RSI_STR[] = "IO_RSI"; +static const char VMCS_IO_RDI_STR[] = "IO_RDI"; +static const char VMCS_IO_RIP_STR[] = "IO_RIP"; +static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR"; +static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0"; +static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3"; +static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4"; +static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE"; +static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE"; +static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE"; +static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE"; +static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE"; +static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE"; +static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE"; +static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE"; +static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE"; +static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE"; +static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7"; +static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP"; +static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP"; +static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS"; +static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS"; +static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP"; +static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP"; +static const char VMCS_HOST_CR0_STR[] = "HOST_CR0"; +static const char VMCS_HOST_CR3_STR[] = "HOST_CR3"; +static const char VMCS_HOST_CR4_STR[] = "HOST_CR4"; +static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE"; +static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE"; +static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE"; +static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE"; +static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE"; +static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP"; +static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP"; +static const char VMCS_HOST_RSP_STR[] = "HOST_RSP"; +static const char VMCS_HOST_RIP_STR[] = "HOST_RIP"; + + + +const char * v3_vmcs_field_to_str(vmcs_field_t field) { + switch (field) { case VMCS_GUEST_ES_SELECTOR: - return "VMCS_GUEST_ES_SELECTOR"; + return VMCS_GUEST_ES_SELECTOR_STR; case VMCS_GUEST_CS_SELECTOR: - return "VMCS_GUEST_CS_SELECTOR"; + return VMCS_GUEST_CS_SELECTOR_STR; case VMCS_GUEST_SS_SELECTOR: - return "VMCS_GUEST_SS_SELECTOR"; + return VMCS_GUEST_SS_SELECTOR_STR; case VMCS_GUEST_DS_SELECTOR: - return "VMCS_GUEST_DS_SELECTOR"; + return VMCS_GUEST_DS_SELECTOR_STR; case VMCS_GUEST_FS_SELECTOR: - return "VMCS_GUEST_FS_SELECTOR"; + return VMCS_GUEST_FS_SELECTOR_STR; case VMCS_GUEST_GS_SELECTOR: - return "VMCS_GUEST_GS_SELECTOR"; + return VMCS_GUEST_GS_SELECTOR_STR; case VMCS_GUEST_LDTR_SELECTOR: - return "VMCS_GUEST_LDTR_SELECTOR"; + return VMCS_GUEST_LDTR_SELECTOR_STR; case VMCS_GUEST_TR_SELECTOR: - return "VMCS_GUEST_TR_SELECTOR"; + return VMCS_GUEST_TR_SELECTOR_STR; case VMCS_HOST_ES_SELECTOR: - return "VMCS_HOST_ES_SELECTOR"; + return VMCS_HOST_ES_SELECTOR_STR; case VMCS_HOST_CS_SELECTOR: - return "VMCS_HOST_CS_SELECTOR"; + return VMCS_HOST_CS_SELECTOR_STR; case VMCS_HOST_SS_SELECTOR: - return "VMCS_HOST_SS_SELECTOR"; + return VMCS_HOST_SS_SELECTOR_STR; case VMCS_HOST_DS_SELECTOR: - return "VMCS_HOST_DS_SELECTOR"; + return VMCS_HOST_DS_SELECTOR_STR; case VMCS_HOST_FS_SELECTOR: - return "VMCS_HOST_FS_SELECTOR"; + return VMCS_HOST_FS_SELECTOR_STR; case VMCS_HOST_GS_SELECTOR: - return "VMCS_HOST_GS_SELECTOR"; + return VMCS_HOST_GS_SELECTOR_STR; case VMCS_HOST_TR_SELECTOR: - return "VMCS_HOST_TR_SELECTOR"; - case IO_BITMAP_A_ADDR: - return "IO_BITMAP_A_ADDR"; - case IO_BITMAP_A_ADDR_HIGH: - return "IO_BITMAP_A_ADDR_HIGH"; - case IO_BITMAP_B_ADDR: - return "IO_BITMAP_B_ADDR"; - case IO_BITMAP_B_ADDR_HIGH: - return "IO_BITMAP_B_ADDR_HIGH"; - case MSR_BITMAPS: - return "MSR_BITMAPS"; - case MSR_BITMAPS_HIGH: - return "MSR_BITMAPS_HIGH"; - case VM_EXIT_MSR_STORE_ADDR: - return "VM_EXIT_MSR_STORE_ADDR"; - case VM_EXIT_MSR_STORE_ADDR_HIGH: - return "VM_EXIT_MSR_STORE_ADDR_HIGH"; - case VM_EXIT_MSR_LOAD_ADDR: - return "VM_EXIT_MSR_LOAD_ADDR"; - case VM_EXIT_MSR_LOAD_ADDR_HIGH: - return "VM_EXIT_MSR_LOAD_ADDR_HIGH"; - case VM_ENTRY_MSR_LOAD_ADDR: - return "VM_ENTRY_MSR_LOAD_ADDR"; - case VM_ENTRY_MSR_LOAD_ADDR_HIGH: - return "VM_ENTRY_MSR_LOAD_ADDR_HIGH"; + return VMCS_HOST_TR_SELECTOR_STR; + case VMCS_IO_BITMAP_A_ADDR: + return VMCS_IO_BITMAP_A_ADDR_STR; + case VMCS_IO_BITMAP_A_ADDR_HIGH: + return VMCS_IO_BITMAP_A_ADDR_HIGH_STR; + case VMCS_IO_BITMAP_B_ADDR: + return VMCS_IO_BITMAP_B_ADDR_STR; + case VMCS_IO_BITMAP_B_ADDR_HIGH: + return VMCS_IO_BITMAP_B_ADDR_HIGH_STR; + case VMCS_MSR_BITMAP: + return VMCS_MSR_BITMAP_STR; + case VMCS_MSR_BITMAP_HIGH: + return VMCS_MSR_BITMAP_HIGH_STR; + case VMCS_EXIT_MSR_STORE_ADDR: + return VMCS_EXIT_MSR_STORE_ADDR_STR; + case VMCS_EXIT_MSR_STORE_ADDR_HIGH: + return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR; + case VMCS_EXIT_MSR_LOAD_ADDR: + return VMCS_EXIT_MSR_LOAD_ADDR_STR; + case VMCS_EXIT_MSR_LOAD_ADDR_HIGH: + return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR; + case VMCS_ENTRY_MSR_LOAD_ADDR: + return VMCS_ENTRY_MSR_LOAD_ADDR_STR; + case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH: + return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR; case VMCS_EXEC_PTR: - return "VMCS_EXEC_PTR"; + return VMCS_EXEC_PTR_STR; case VMCS_EXEC_PTR_HIGH: - return "VMCS_EXEC_PTR_HIGH"; - case TSC_OFFSET: - return "TSC_OFFSET"; - case TSC_OFFSET_HIGH: - return "TSC_OFFSET_HIGH"; - case VIRT_APIC_PAGE_ADDR: - return "VIRT_APIC_PAGE_ADDR"; - case VIRT_APIC_PAGE_ADDR_HIGH: - return "VIRT_APIC_PAGE_ADDR_HIGH"; + return VMCS_EXEC_PTR_HIGH_STR; + case VMCS_TSC_OFFSET: + return VMCS_TSC_OFFSET_STR; + case VMCS_TSC_OFFSET_HIGH: + return VMCS_TSC_OFFSET_HIGH_STR; + case VMCS_VAPIC_ADDR: + return VMCS_VAPIC_ADDR_STR; + case VMCS_VAPIC_ADDR_HIGH: + return VMCS_VAPIC_ADDR_HIGH_STR; + case VMCS_APIC_ACCESS_ADDR: + return VMCS_APIC_ACCESS_ADDR_STR; + case VMCS_APIC_ACCESS_ADDR_HIGH: + return VMCS_APIC_ACCESS_ADDR_HIGH_STR; case VMCS_LINK_PTR: - return "VMCS_LINK_PTR"; + return VMCS_LINK_PTR_STR; case VMCS_LINK_PTR_HIGH: - return "VMCS_LINK_PTR_HIGH"; - case GUEST_IA32_DEBUGCTL: - return "GUEST_IA32_DEBUGCTL"; - case GUEST_IA32_DEBUGCTL_HIGH: - return "GUEST_IA32_DEBUGCTL_HIGH"; - case GUEST_IA32_PERF_GLOBAL_CTRL: - return "GUEST_IA32_PERF_GLOBAL_CTRL"; - case GUEST_IA32_PERF_GLOBAL_CTRL_HIGH: - return "GUEST_IA32_PERF_GLOBAL_CTRL_HIGH"; - case PIN_VM_EXEC_CTRLS: - return "PIN_VM_EXEC_CTRLS"; - case PROC_VM_EXEC_CTRLS: - return "PROC_VM_EXEC_CTRLS"; - case EXCEPTION_BITMAP: - return "EXCEPTION_BITMAP"; - case PAGE_FAULT_ERROR_MASK: - return "PAGE_FAULT_ERROR_MASK"; - case PAGE_FAULT_ERROR_MATCH: - return "PAGE_FAULT_ERROR_MATCH"; - case CR3_TARGET_COUNT: - return "CR3_TARGET_COUNT"; - case VM_EXIT_CTRLS: - return "VM_EXIT_CTRLS"; - case VM_EXIT_MSR_STORE_COUNT: - return "VM_EXIT_MSR_STORE_COUNT"; - case VM_EXIT_MSR_LOAD_COUNT: - return "VM_EXIT_MSR_LOAD_COUNT"; - case VM_ENTRY_CTRLS: - return "VM_ENTRY_CTRLS"; - case VM_ENTRY_MSR_LOAD_COUNT: - return "VM_ENTRY_MSR_LOAD_COUNT"; - case VM_ENTRY_INT_INFO_FIELD: - return "VM_ENTRY_INT_INFO_FIELD"; - case VM_ENTRY_EXCEPTION_ERROR: - return "VM_ENTRY_EXCEPTION_ERROR"; - case VM_ENTRY_INSTR_LENGTH: - return "VM_ENTRY_INSTR_LENGTH"; - case TPR_THRESHOLD: - return "TPR_THRESHOLD"; - case VM_INSTR_ERROR: - return "VM_INSTR_ERROR"; - case EXIT_REASON: - return "EXIT_REASON"; - case VM_EXIT_INT_INFO: - return "VM_EXIT_INT_INFO"; - case VM_EXIT_INT_ERROR: - return "VM_EXIT_INT_ERROR"; - case IDT_VECTOR_INFO: - return "IDT_VECTOR_INFO"; - case IDT_VECTOR_ERROR: - return "IDT_VECTOR_ERROR"; - case VM_EXIT_INSTR_LENGTH: - return "VM_EXIT_INSTR_LENGTH"; - case VMX_INSTR_INFO: - return "VMX_INSTR_INFO"; - case GUEST_ES_LIMIT: - return "GUEST_ES_LIMIT"; - case GUEST_CS_LIMIT: - return "GUEST_CS_LIMIT"; - case GUEST_SS_LIMIT: - return "GUEST_SS_LIMIT"; - case GUEST_DS_LIMIT: - return "GUEST_DS_LIMIT"; - case GUEST_FS_LIMIT: - return "GUEST_FS_LIMIT"; - case GUEST_GS_LIMIT: - return "GUEST_GS_LIMIT"; - case GUEST_LDTR_LIMIT: - return "GUEST_LDTR_LIMIT"; - case GUEST_TR_LIMIT: - return "GUEST_TR_LIMIT"; - case GUEST_GDTR_LIMIT: - return "GUEST_GDTR_LIMIT"; - case GUEST_IDTR_LIMIT: - return "GUEST_IDTR_LIMIT"; - case GUEST_ES_ACCESS: - return "GUEST_ES_ACCESS"; - case GUEST_CS_ACCESS: - return "GUEST_CS_ACCESS"; - case GUEST_SS_ACCESS: - return "GUEST_SS_ACCESS"; - case GUEST_DS_ACCESS: - return "GUEST_DS_ACCESS"; - case GUEST_FS_ACCESS: - return "GUEST_FS_ACCESS"; - case GUEST_GS_ACCESS: - return "GUEST_GS_ACCESS"; - case GUEST_LDTR_ACCESS: - return "GUEST_LDTR_ACCESS"; - case GUEST_TR_ACCESS: - return "GUEST_TR_ACCESS"; - case GUEST_INT_STATE: - return "GUEST_INT_STATE"; - case GUEST_ACTIVITY_STATE: - return "GUEST_ACTIVITY_STATE"; - case GUEST_SMBASE: - return "GUEST_SMBASE"; - case GUEST_IA32_SYSENTER_CS: - return "GUEST_IA32_SYSENTER_CS"; - case HOST_IA32_SYSENTER_CS: - return "HOST_IA32_SYSENTER_CS"; - case CR0_GUEST_HOST_MASK: - return "CR0_GUEST_HOST_MASK"; - case CR4_GUEST_HOST_MASK: - return "CR4_GUEST_HOST_MASK"; - case CR0_READ_SHADOW: - return "CR0_READ_SHADOW"; - case CR4_READ_SHADOW: - return "CR4_READ_SHADOW"; - case CR3_TARGET_VALUE_0: - return "CR3_TARGET_VALUE_0"; - case CR3_TARGET_VALUE_1: - return "CR3_TARGET_VALUE_1"; - case CR3_TARGET_VALUE_2: - return "CR3_TARGET_VALUE_2"; - case CR3_TARGET_VALUE_3: - return "CR3_TARGET_VALUE_3"; - case EXIT_QUALIFICATION: - return "EXIT_QUALIFICATION"; - case IO_RCX: - return "IO_RCX"; - case IO_RSI: - return "IO_RSI"; - case IO_RDI: - return "IO_RDI"; - case IO_RIP: - return "IO_RIP"; - case GUEST_LINEAR_ADDR: - return "GUEST_LINEAR_ADDR"; - case GUEST_CR0: - return "GUEST_CR0"; - case GUEST_CR3: - return "GUEST_CR3"; - case GUEST_CR4: - return "GUEST_CR4"; - case GUEST_ES_BASE: - return "GUEST_ES_BASE"; - case GUEST_CS_BASE: - return "GUEST_CS_BASE"; - case GUEST_SS_BASE: - return "GUEST_SS_BASE"; - case GUEST_DS_BASE: - return "GUEST_DS_BASE"; - case GUEST_FS_BASE: - return "GUEST_FS_BASE"; - case GUEST_GS_BASE: - return "GUEST_GS_BASE"; - case GUEST_LDTR_BASE: - return "GUEST_LDTR_BASE"; - case GUEST_TR_BASE: - return "GUEST_TR_BASE"; - case GUEST_GDTR_BASE: - return "GUEST_GDTR_BASE"; - case GUEST_IDTR_BASE: - return "GUEST_IDTR_BASE"; - case GUEST_DR7: - return "GUEST_DR7"; - case GUEST_RSP: - return "GUEST_RSP"; - case GUEST_RIP: - return "GUEST_RIP"; - case GUEST_RFLAGS: - return "GUEST_RFLAGS"; - case GUEST_PENDING_DEBUG_EXCS: - return "GUEST_PENDING_DEBUG_EXCS"; - case GUEST_IA32_SYSENTER_ESP: - return "GUEST_IA32_SYSENTER_ESP"; - case GUEST_IA32_SYSENTER_EIP: - return "GUEST_IA32_SYSENTER_EIP"; - case HOST_CR0: - return "HOST_CR0"; - case HOST_CR3: - return "HOST_CR3"; - case HOST_CR4: - return "HOST_CR4"; - case HOST_FS_BASE: - return "HOST_FS_BASE"; - case HOST_GS_BASE: - return "HOST_GS_BASE"; - case HOST_TR_BASE: - return "HOST_TR_BASE"; - case HOST_GDTR_BASE: - return "HOST_GDTR_BASE"; - case HOST_IDTR_BASE: - return "HOST_IDTR_BASE"; - case HOST_IA32_SYSENTER_ESP: - return "HOST_IA32_SYSENTER_ESP"; - case HOST_IA32_SYSENTER_EIP: - return "HOST_IA32_SYSENTER_EIP"; - case HOST_RSP: - return "HOST_RSP"; - case HOST_RIP: - return "HOST_RIP"; + return VMCS_LINK_PTR_HIGH_STR; + case VMCS_GUEST_DBG_CTL: + return VMCS_GUEST_DBG_CTL_STR; + case VMCS_GUEST_DBG_CTL_HIGH: + return VMCS_GUEST_DBG_CTL_HIGH_STR; + case VMCS_GUEST_PERF_GLOBAL_CTRL: + return VMCS_GUEST_PERF_GLOBAL_CTRL_STR; + case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH: + return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR; + case VMCS_HOST_PERF_GLOBAL_CTRL: + return VMCS_HOST_PERF_GLOBAL_CTRL_STR; + case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH: + return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR; + case VMCS_PIN_CTRLS: + return VMCS_PIN_CTRLS_STR; + case VMCS_PROC_CTRLS: + return VMCS_PROC_CTRLS_STR; + case VMCS_EXCP_BITMAP: + return VMCS_EXCP_BITMAP_STR; + case VMCS_PG_FAULT_ERR_MASK: + return VMCS_PG_FAULT_ERR_MASK_STR; + case VMCS_PG_FAULT_ERR_MATCH: + return VMCS_PG_FAULT_ERR_MATCH_STR; + case VMCS_CR3_TGT_CNT: + return VMCS_CR3_TGT_CNT_STR; + case VMCS_EXIT_CTRLS: + return VMCS_EXIT_CTRLS_STR; + case VMCS_EXIT_MSR_STORE_CNT: + return VMCS_EXIT_MSR_STORE_CNT_STR; + case VMCS_EXIT_MSR_LOAD_CNT: + return VMCS_EXIT_MSR_LOAD_CNT_STR; + case VMCS_ENTRY_CTRLS: + return VMCS_ENTRY_CTRLS_STR; + case VMCS_ENTRY_MSR_LOAD_CNT: + return VMCS_ENTRY_MSR_LOAD_CNT_STR; + case VMCS_ENTRY_INT_INFO: + return VMCS_ENTRY_INT_INFO_STR; + case VMCS_ENTRY_EXCP_ERR: + return VMCS_ENTRY_EXCP_ERR_STR; + case VMCS_ENTRY_INSTR_LEN: + return VMCS_ENTRY_INSTR_LEN_STR; + case VMCS_TPR_THRESHOLD: + return VMCS_TPR_THRESHOLD_STR; + case VMCS_SEC_PROC_CTRLS: + return VMCS_SEC_PROC_CTRLS_STR; + case VMCS_INSTR_ERR: + return VMCS_INSTR_ERR_STR; + case VMCS_EXIT_REASON: + return VMCS_EXIT_REASON_STR; + case VMCS_EXIT_INT_INFO: + return VMCS_EXIT_INT_INFO_STR; + case VMCS_EXIT_INT_ERR: + return VMCS_EXIT_INT_ERR_STR; + case VMCS_IDT_VECTOR_INFO: + return VMCS_IDT_VECTOR_INFO_STR; + case VMCS_IDT_VECTOR_ERR: + return VMCS_IDT_VECTOR_ERR_STR; + case VMCS_EXIT_INSTR_LEN: + return VMCS_EXIT_INSTR_LEN_STR; + case VMCS_EXIT_INSTR_INFO: + return VMCS_EXIT_INSTR_INFO_STR; + case VMCS_GUEST_ES_LIMIT: + return VMCS_GUEST_ES_LIMIT_STR; + case VMCS_GUEST_CS_LIMIT: + return VMCS_GUEST_CS_LIMIT_STR; + case VMCS_GUEST_SS_LIMIT: + return VMCS_GUEST_SS_LIMIT_STR; + case VMCS_GUEST_DS_LIMIT: + return VMCS_GUEST_DS_LIMIT_STR; + case VMCS_GUEST_FS_LIMIT: + return VMCS_GUEST_FS_LIMIT_STR; + case VMCS_GUEST_GS_LIMIT: + return VMCS_GUEST_GS_LIMIT_STR; + case VMCS_GUEST_LDTR_LIMIT: + return VMCS_GUEST_LDTR_LIMIT_STR; + case VMCS_GUEST_TR_LIMIT: + return VMCS_GUEST_TR_LIMIT_STR; + case VMCS_GUEST_GDTR_LIMIT: + return VMCS_GUEST_GDTR_LIMIT_STR; + case VMCS_GUEST_IDTR_LIMIT: + return VMCS_GUEST_IDTR_LIMIT_STR; + case VMCS_GUEST_ES_ACCESS: + return VMCS_GUEST_ES_ACCESS_STR; + case VMCS_GUEST_CS_ACCESS: + return VMCS_GUEST_CS_ACCESS_STR; + case VMCS_GUEST_SS_ACCESS: + return VMCS_GUEST_SS_ACCESS_STR; + case VMCS_GUEST_DS_ACCESS: + return VMCS_GUEST_DS_ACCESS_STR; + case VMCS_GUEST_FS_ACCESS: + return VMCS_GUEST_FS_ACCESS_STR; + case VMCS_GUEST_GS_ACCESS: + return VMCS_GUEST_GS_ACCESS_STR; + case VMCS_GUEST_LDTR_ACCESS: + return VMCS_GUEST_LDTR_ACCESS_STR; + case VMCS_GUEST_TR_ACCESS: + return VMCS_GUEST_TR_ACCESS_STR; + case VMCS_GUEST_INT_STATE: + return VMCS_GUEST_INT_STATE_STR; + case VMCS_GUEST_ACTIVITY_STATE: + return VMCS_GUEST_ACTIVITY_STATE_STR; + case VMCS_GUEST_SMBASE: + return VMCS_GUEST_SMBASE_STR; + case VMCS_GUEST_SYSENTER_CS: + return VMCS_GUEST_SYSENTER_CS_STR; + case VMCS_HOST_SYSENTER_CS: + return VMCS_HOST_SYSENTER_CS_STR; + case VMCS_CR0_MASK: + return VMCS_CR0_MASK_STR; + case VMCS_CR4_MASK: + return VMCS_CR4_MASK_STR; + case VMCS_CR0_READ_SHDW: + return VMCS_CR0_READ_SHDW_STR; + case VMCS_CR4_READ_SHDW: + return VMCS_CR4_READ_SHDW_STR; + case VMCS_CR3_TGT_VAL_0: + return VMCS_CR3_TGT_VAL_0_STR; + case VMCS_CR3_TGT_VAL_1: + return VMCS_CR3_TGT_VAL_1_STR; + case VMCS_CR3_TGT_VAL_2: + return VMCS_CR3_TGT_VAL_2_STR; + case VMCS_CR3_TGT_VAL_3: + return VMCS_CR3_TGT_VAL_3_STR; + case VMCS_EXIT_QUAL: + return VMCS_EXIT_QUAL_STR; + case VMCS_IO_RCX: + return VMCS_IO_RCX_STR; + case VMCS_IO_RSI: + return VMCS_IO_RSI_STR; + case VMCS_IO_RDI: + return VMCS_IO_RDI_STR; + case VMCS_IO_RIP: + return VMCS_IO_RIP_STR; + case VMCS_GUEST_LINEAR_ADDR: + return VMCS_GUEST_LINEAR_ADDR_STR; + case VMCS_GUEST_CR0: + return VMCS_GUEST_CR0_STR; + case VMCS_GUEST_CR3: + return VMCS_GUEST_CR3_STR; + case VMCS_GUEST_CR4: + return VMCS_GUEST_CR4_STR; + case VMCS_GUEST_ES_BASE: + return VMCS_GUEST_ES_BASE_STR; + case VMCS_GUEST_CS_BASE: + return VMCS_GUEST_CS_BASE_STR; + case VMCS_GUEST_SS_BASE: + return VMCS_GUEST_SS_BASE_STR; + case VMCS_GUEST_DS_BASE: + return VMCS_GUEST_DS_BASE_STR; + case VMCS_GUEST_FS_BASE: + return VMCS_GUEST_FS_BASE_STR; + case VMCS_GUEST_GS_BASE: + return VMCS_GUEST_GS_BASE_STR; + case VMCS_GUEST_LDTR_BASE: + return VMCS_GUEST_LDTR_BASE_STR; + case VMCS_GUEST_TR_BASE: + return VMCS_GUEST_TR_BASE_STR; + case VMCS_GUEST_GDTR_BASE: + return VMCS_GUEST_GDTR_BASE_STR; + case VMCS_GUEST_IDTR_BASE: + return VMCS_GUEST_IDTR_BASE_STR; + case VMCS_GUEST_DR7: + return VMCS_GUEST_DR7_STR; + case VMCS_GUEST_RSP: + return VMCS_GUEST_RSP_STR; + case VMCS_GUEST_RIP: + return VMCS_GUEST_RIP_STR; + case VMCS_GUEST_RFLAGS: + return VMCS_GUEST_RFLAGS_STR; + case VMCS_GUEST_PENDING_DBG_EXCP: + return VMCS_GUEST_PENDING_DBG_EXCP_STR; + case VMCS_GUEST_SYSENTER_ESP: + return VMCS_GUEST_SYSENTER_ESP_STR; + case VMCS_GUEST_SYSENTER_EIP: + return VMCS_GUEST_SYSENTER_EIP_STR; + case VMCS_HOST_CR0: + return VMCS_HOST_CR0_STR; + case VMCS_HOST_CR3: + return VMCS_HOST_CR3_STR; + case VMCS_HOST_CR4: + return VMCS_HOST_CR4_STR; + case VMCS_HOST_FS_BASE: + return VMCS_HOST_FS_BASE_STR; + case VMCS_HOST_GS_BASE: + return VMCS_HOST_GS_BASE_STR; + case VMCS_HOST_TR_BASE: + return VMCS_HOST_TR_BASE_STR; + case VMCS_HOST_GDTR_BASE: + return VMCS_HOST_GDTR_BASE_STR; + case VMCS_HOST_IDTR_BASE: + return VMCS_HOST_IDTR_BASE_STR; + case VMCS_HOST_SYSENTER_ESP: + return VMCS_HOST_SYSENTER_ESP_STR; + case VMCS_HOST_SYSENTER_EIP: + return VMCS_HOST_SYSENTER_EIP_STR; + case VMCS_HOST_RSP: + return VMCS_HOST_RSP_STR; + case VMCS_HOST_RIP: + return VMCS_HOST_RIP_STR; default: return NULL; }