X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fide.c;h=a9d88aa385b597f86df223ce2e7751c227ffcf83;hp=0d6e0b2dc6060b47beeaa98f43481616a3be9943;hb=72933e9f7ae22ef28481e29027509f961816351e;hpb=074d44443cd1dc65660b2859503ad9f72bce625a diff --git a/palacios/src/devices/ide.c b/palacios/src/devices/ide.c index 0d6e0b2..a9d88aa 100644 --- a/palacios/src/devices/ide.c +++ b/palacios/src/devices/ide.c @@ -19,6 +19,7 @@ #include #include +#include #include "ide-types.h" #include "atapi-types.h" @@ -49,8 +50,59 @@ #define SEC_ADDR_REG_PORT 0x377 +#define PRI_DMA_CMD_PORT 0xc000 +#define PRI_DMA_STATUS_PORT 0xc002 +#define PRI_DMA_PRD_PORT0 0xc004 +#define PRI_DMA_PRD_PORT1 0xc005 +#define PRI_DMA_PRD_PORT2 0xc006 +#define PRI_DMA_PRD_PORT3 0xc007 + +#define SEC_DMA_CMD_PORT 0xc008 +#define SEC_DMA_STATUS_PORT 0xc00a +#define SEC_DMA_PRD_PORT0 0xc00c +#define SEC_DMA_PRD_PORT1 0xc00d +#define SEC_DMA_PRD_PORT2 0xc00e +#define SEC_DMA_PRD_PORT3 0xc00f + #define DATA_BUFFER_SIZE 2048 +static const char * ide_pri_port_strs[] = {"PRI_DATA", "PRI_FEATURES", "PRI_SECT_CNT", "PRI_SECT_NUM", + "PRI_CYL_LOW", "PRI_CYL_HIGH", "PRI_DRV_SEL", "PRI_CMD", + "PRI_CTRL", "PRI_ADDR_REG"}; + + +static const char * ide_sec_port_strs[] = {"SEC_DATA", "SEC_FEATURES", "SEC_SECT_CNT", "SEC_SECT_NUM", + "SEC_CYL_LOW", "SEC_CYL_HIGH", "SEC_DRV_SEL", "SEC_CMD", + "SEC_CTRL", "SEC_ADDR_REG"}; + +static const char * ide_dma_port_strs[] = {"PRI_DMA_CMD", NULL, + "PRI_DMA_STATUS", NULL, + "PRI_DMA_PRD0", "PRI_DMA_PRD1", + "PRI_DMA_PRD2", "PRI_DMA_PRD3", + "SEC_DMA_CMD", NULL, + "SEC_DMA_STATUS", NULL, + "SEC_DMA_PRD0","SEC_DMA_PRD1", + "SEC_DMA_PRD2","SEC_DMA_PRD3"}; + + + +static inline const char * io_port_to_str(uint16_t port) { + if ((port >= PRI_DATA_PORT) && (port <= PRI_CMD_PORT)) { + return ide_pri_port_strs[port - PRI_DATA_PORT]; + } else if ((port >= SEC_DATA_PORT) && (port <= SEC_CMD_PORT)) { + return ide_sec_port_strs[port - SEC_DATA_PORT]; + } else if ((port == PRI_CTRL_PORT) || (port == PRI_ADDR_REG_PORT)) { + return ide_pri_port_strs[port - PRI_CTRL_PORT + 8]; + } else if ((port == SEC_CTRL_PORT) || (port == SEC_ADDR_REG_PORT)) { + return ide_sec_port_strs[port - SEC_CTRL_PORT + 8]; + } else if ((port >= PRI_DMA_CMD_PORT) && (port <= SEC_DMA_PRD_PORT3)) { + return ide_dma_port_strs[port - PRI_DMA_CMD_PORT]; + } + return NULL; +} + + + static const char * ide_dev_type_strs[] = {"HARDDISK", "CDROM", "NONE"}; @@ -67,6 +119,8 @@ static inline const char * device_type_to_str(v3_ide_dev_type_t type) { struct ide_cd_state { struct atapi_sense_data sense; uint_t current_lba; + uint8_t atapi_cmd; + struct atapi_error_recovery err_recovery; }; struct ide_hd_state { @@ -98,21 +152,46 @@ struct ide_drive { // calculated for easy access uint_t transfer_length; + // We have a local data buffer that we use for IO port accesses uint8_t data_buf[DATA_BUFFER_SIZE]; + void * private_data; + + union { + uint8_t sector_count; // 0x1f2,0x172 + struct atapi_irq_flags irq_flags; + } __attribute__((packed)); + + union { + uint8_t sector_num; // 0x1f3,0x173 + uint8_t lba0; + }; - uint8_t sector_count; // 0x1f2,0x172 - uint8_t sector_num; // 0x1f3,0x173 union { uint16_t cylinder; + uint16_t lba12; + + struct { uint8_t cylinder_low; // 0x1f4,0x174 uint8_t cylinder_high; // 0x1f5,0x175 } __attribute__((packed)); + + struct { + uint8_t lba1; + uint8_t lba2; + } __attribute__((packed)); + + + // The transfer length requested by the CPU + uint16_t req_len; } __attribute__((packed)); + struct ide_dma_cmd_reg dma_cmd; + struct ide_dma_status_reg dma_status; + uint32_t dma_prd_addr; }; @@ -133,6 +212,8 @@ struct ide_channel { int irq; // this is temporary until we add PCI support + struct pci_device * pci_dev; + // Control Registers struct ide_ctrl_reg ctrl_reg; // [write] 0x3f6,0x376 }; @@ -141,28 +222,40 @@ struct ide_channel { struct ide_internal { struct ide_channel channels[2]; + struct vm_device * pci; + struct pci_device * busmaster_pci; }; -static inline uint32_t be_to_le_16(const uint16_t val) { +static inline uint16_t be_to_le_16(const uint16_t val) { uint8_t * buf = (uint8_t *)&val; return (buf[0] << 8) | (buf[1]) ; } +static inline uint16_t le_to_be_16(const uint16_t val) { + return be_to_le_16(val); +} + static inline uint32_t be_to_le_32(const uint32_t val) { uint8_t * buf = (uint8_t *)&val; return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; } +static inline uint32_t le_to_be_32(const uint32_t val) { + return be_to_le_32(val); +} + static inline int get_channel_index(ushort_t port) { if (((port & 0xfff8) == 0x1f0) || - ((port & 0xfffe) == 0x3f6)) { + ((port & 0xfffe) == 0x3f6) || + ((port & 0xfff8) == 0xc000)) { return 0; } else if (((port & 0xfff8) == 0x170) || - ((port & 0xfffe) == 0x376)) { + ((port & 0xfffe) == 0x376) || + ((port & 0xfff8) == 0xc008)) { return 1; } @@ -203,7 +296,6 @@ static void drive_reset(struct ide_drive * drive) { memset(drive->data_buf, 0, sizeof(drive->data_buf)); - drive->transfer_length = 0; drive->transfer_index = 0; // Send the reset signal to the connected device callbacks @@ -244,12 +336,103 @@ static void ide_abort_command(struct vm_device * dev, struct ide_channel * chann } - - // Include the ATAPI interface handlers #include "atapi.h" +static int write_dma_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) { + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + struct ide_channel * channel = get_selected_channel(ide, port); + struct ide_drive * drive = get_selected_drive(channel); + + if (length != 1) { + PrintError("IDE: Invalid Write length on IDE port %x\n", port); + return -1; + } + + PrintDebug("IDE: Writing DMA Port %x (%s) (val=%x)\n", port, io_port_to_str(port), *(uint8_t *)src); + + switch (port) { + case PRI_DMA_CMD_PORT: + case SEC_DMA_CMD_PORT: + drive->dma_cmd.val = *(uint8_t *)src; + break; + + case PRI_DMA_STATUS_PORT: + case SEC_DMA_STATUS_PORT: + drive->dma_status.val = *(uint8_t *)src; + break; + + case PRI_DMA_PRD_PORT0: + case PRI_DMA_PRD_PORT1: + case PRI_DMA_PRD_PORT2: + case PRI_DMA_PRD_PORT3: + case SEC_DMA_PRD_PORT0: + case SEC_DMA_PRD_PORT1: + case SEC_DMA_PRD_PORT2: + case SEC_DMA_PRD_PORT3: { + uint_t addr_index = port & 0x3; + uint8_t * addr_buf = (uint8_t *)&(drive->dma_prd_addr); + + addr_buf[addr_index] = *(uint8_t *)src; + break; + } + default: + PrintError("IDE: Invalid DMA Port (%x)\n", port); + return -1; + } + + return length; +} + + +static int read_dma_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) { + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + struct ide_channel * channel = get_selected_channel(ide, port); + struct ide_drive * drive = get_selected_drive(channel); + + if (length != 1) { + PrintError("IDE: Invalid Write length on IDE port %x\n", port); + return -1; + } + + + + switch (port) { + case PRI_DMA_CMD_PORT: + case SEC_DMA_CMD_PORT: + *(uint8_t *)dst = drive->dma_cmd.val; + break; + + case PRI_DMA_STATUS_PORT: + case SEC_DMA_STATUS_PORT: + *(uint8_t *)dst = drive->dma_status.val; + break; + + case PRI_DMA_PRD_PORT0: + case PRI_DMA_PRD_PORT1: + case PRI_DMA_PRD_PORT2: + case PRI_DMA_PRD_PORT3: + case SEC_DMA_PRD_PORT0: + case SEC_DMA_PRD_PORT1: + case SEC_DMA_PRD_PORT2: + case SEC_DMA_PRD_PORT3: { + uint_t addr_index = port & 0x3; + uint8_t * addr_buf = (uint8_t *)&(drive->dma_prd_addr); + + *(uint8_t *)dst = addr_buf[addr_index]; + break; + } + default: + PrintError("IDE: Invalid DMA Port (%x)\n", port); + return -1; + } + + PrintDebug("IDE: Reading DMA Port %x (%s) (val=%x)\n", port, io_port_to_str(port), *(uint8_t *)dst); + + return length; +} + static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) { @@ -262,7 +445,7 @@ static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_de return -1; } - PrintDebug("IDE: Writing Command Port %x (val=%x)\n", port, *(uint8_t *)src); + PrintDebug("IDE: Writing Command Port %x (%s) (val=%x)\n", port, io_port_to_str(port), *(uint8_t *)src); channel->cmd_reg = *(uint8_t *)src; @@ -318,7 +501,8 @@ static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_d struct ide_channel * channel = get_selected_channel(ide, port); struct ide_drive * drive = get_selected_drive(channel); - PrintDebug("IDE: Writing Data Port %x (val=%x, len=%d)\n", port, *(uint32_t *)src, length); + // PrintDebug("IDE: Writing Data Port %x (val=%x, len=%d)\n", + // port, *(uint32_t *)src, length); memcpy(drive->data_buf + drive->transfer_index, src, length); drive->transfer_index += length; @@ -346,40 +530,127 @@ static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_d } -static int read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - struct ide_channel * channel = get_selected_channel(ide, port); +static int read_hd_data(uint8_t * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel) { + PrintError("Harddrive data port read not implemented\n"); + return -1; +} + + + +static int read_cd_data(uint8_t * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel) { struct ide_drive * drive = get_selected_drive(channel); int data_offset = drive->transfer_index % DATA_BUFFER_SIZE; + int req_offset = drive->transfer_index % drive->req_len; + + if (drive->cd_state.atapi_cmd != 0x28) { + PrintDebug("IDE: Reading CD Data (len=%d) (req_len=%d)\n", length, drive->req_len); + } - PrintDebug("IDE: Reading Data Port %x\n", port); - - if (data_offset == DATA_BUFFER_SIZE) { - // check for more data to transfer, if there isn't any then that's a problem... - /* - * if (ide_update_buffer(drive) == -1) { - * return -1; - * } - */ + if (drive->transfer_index >= drive->transfer_length) { + PrintError("Buffer Overrun... (xfer_len=%d) (cur_idx=%d) (post_idx=%d)\n", + drive->transfer_length, drive->transfer_index, + drive->transfer_index + length); return -1; } - // check for overruns... - // We will return the data padded with 0's - if (drive->transfer_index + length > drive->transfer_length) { - length = drive->transfer_length - drive->transfer_index; - memset(dst, 0, length); + + if ((data_offset == 0) && (drive->transfer_index > 0)) { + + if (drive->drive_type == IDE_CDROM) { + if (atapi_update_data_buf(dev, channel) == -1) { + PrintError("Could not update CDROM data buffer\n"); + return -1; + } + } else { + PrintError("IDE Harddrives not implemented\n"); + return -1; + } } memcpy(dst, drive->data_buf + data_offset, length); - + drive->transfer_index += length; + if ((req_offset == 0) && (drive->transfer_index > 0)) { + if (drive->transfer_index < drive->transfer_length) { + // An increment is complete, but there is still more data to be transferred... + + channel->status.data_req = 1; + + drive->irq_flags.c_d = 0; + + // Update the request length in the cylinder regs + if (atapi_update_req_len(dev, channel, drive->transfer_length - drive->transfer_index) == -1) { + PrintError("Could not update request length after completed increment\n"); + return -1; + } + } else { + // This was the final read of the request + channel->status.data_req = 0; + channel->status.ready = 1; + + drive->irq_flags.c_d = 1; + drive->irq_flags.rel = 0; + } + + drive->irq_flags.io_dir = 1; + channel->status.busy = 0; + + ide_raise_irq(dev, channel); + } + + return length; +} + + +static int read_drive_id(uint8_t * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel) { + struct ide_drive * drive = get_selected_drive(channel); + + channel->status.busy = 0; + channel->status.ready = 1; + channel->status.write_fault = 0; + channel->status.seek_complete = 1; + channel->status.corrected = 0; + channel->status.error = 0; + + + memcpy(dst, drive->data_buf + drive->transfer_index, length); + drive->transfer_index += length; if (drive->transfer_index >= drive->transfer_length) { channel->status.data_req = 0; } + + return length; +} + + +static int ide_read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) { + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + struct ide_channel * channel = get_selected_channel(ide, port); + struct ide_drive * drive = get_selected_drive(channel); + + // PrintDebug("IDE: Reading Data Port %x (len=%d)\n", port, length); + + if ((channel->cmd_reg == 0xec) || + (channel->cmd_reg == 0xa1)) { + return read_drive_id((uint8_t *)dst, length, dev, channel); + } + + if (drive->drive_type == IDE_CDROM) { + if (read_cd_data((uint8_t *)dst, length, dev, channel) == -1) { + PrintError("IDE: Could not read CD Data\n"); + return -1; + } + } else if (drive->drive_type == IDE_DISK) { + if (read_hd_data((uint8_t *)dst, length, dev, channel) == -1) { + PrintError("IDE: Could not read HD Data\n"); + return -1; + } + } else { + memset((uint8_t *)dst, 0, length); + } return length; } @@ -394,7 +665,7 @@ static int write_port_std(ushort_t port, void * src, uint_t length, struct vm_de return -1; } - PrintDebug("IDE: Writing Standard Port %x (val=%x)\n", port, *(uint8_t *)src); + PrintDebug("IDE: Writing Standard Port %x (%s) (val=%x)\n", port, io_port_to_str(port), *(uint8_t *)src); switch (port) { @@ -474,7 +745,7 @@ static int read_port_std(ushort_t port, void * dst, uint_t length, struct vm_dev return -1; } - PrintDebug("IDE: Reading Standard Port %x\n", port); + PrintDebug("IDE: Reading Standard Port %x (%s)\n", port, io_port_to_str(port)); if ((port == PRI_ADDR_REG_PORT) || @@ -565,6 +836,10 @@ static void init_drive(struct ide_drive * drive) { drive->transfer_length = 0; memset(drive->data_buf, 0, sizeof(drive->data_buf)); + drive->dma_cmd.val = 0; + drive->dma_status.val = 0; + drive->dma_prd_addr = 0; + drive->private_data = NULL; drive->cd_ops = NULL; } @@ -585,32 +860,93 @@ static void init_channel(struct ide_channel * channel) { } -static void init_ide_state(struct ide_internal * ide) { - int i; +/* +static int pci_config_update(struct pci_device * pci_dev, uint_t reg_num, int length) { + PrintError("IDE does not handle PCI config updates\n"); + return -1; +} +*/ + +static int init_ide_state(struct vm_device * dev) { + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + struct v3_pci_bar bars[6]; + struct pci_device * pci_dev = NULL; + int i, j; for (i = 0; i < 2; i++) { init_channel(&(ide->channels[i])); // JRL: this is a terrible hack... ide->channels[i].irq = PRI_DEFAULT_IRQ + i; + + for (j = 0; j < 6; j++) { + bars[j].type = PCI_BAR_NONE; + } + + + bars[4].type = PCI_BAR_IO; + bars[4].default_base_port = PRI_DMA_CMD_PORT + (i * 0x8); + bars[4].num_ports = 8; + bars[4].io_read = read_dma_port; + bars[4].io_write = write_dma_port; + + pci_dev = v3_pci_register_device(ide->pci, PCI_STD_DEVICE, 0, "V3_IDE", -1, bars, + NULL, NULL, NULL, dev); + + if (pci_dev == NULL) { + PrintError("Failed to register IDE BUS %d with PCI\n", i); + return -1; + } + + ide->channels[i].pci_dev = pci_dev; + + pci_dev->config_header.vendor_id = 0x1095; + pci_dev->config_header.device_id = 0x0646; + pci_dev->config_header.revision = 0x8f07; + pci_dev->config_header.subclass = 0x01; + pci_dev->config_header.class = 0x01; } + + + + /* Register PIIX3 Busmaster PCI device */ + for (j = 0; j < 6; j++) { + bars[j].type = PCI_BAR_NONE; + } + + pci_dev = v3_pci_register_device(ide->pci, PCI_STD_DEVICE, 0, "PIIX3 IDE", -1, bars, + NULL, NULL, NULL, dev); + + + ide->busmaster_pci = pci_dev; + + pci_dev->config_header.vendor_id = 0x8086; + pci_dev->config_header.device_id = 0x7010; + pci_dev->config_header.revision = 0x80; + pci_dev->config_header.subclass = 0x01; + pci_dev->config_header.class = 0x01; + + + return 0; } static int init_ide(struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + //struct ide_internal * ide = (struct ide_internal *)(dev->private_data); PrintDebug("IDE: Initializing IDE\n"); - init_ide_state(ide); + if (init_ide_state(dev) == -1) { + PrintError("Failed to initialize IDE state\n"); + return -1; + } + - v3_dev_hook_io(dev, PRI_CTRL_PORT, - &read_port_std, &write_port_std); v3_dev_hook_io(dev, PRI_DATA_PORT, - &read_data_port, &write_data_port); + &ide_read_data_port, &write_data_port); v3_dev_hook_io(dev, PRI_FEATURES_PORT, &read_port_std, &write_port_std); v3_dev_hook_io(dev, PRI_SECT_CNT_PORT, @@ -626,12 +962,8 @@ static int init_ide(struct vm_device * dev) { v3_dev_hook_io(dev, PRI_CMD_PORT, &read_port_std, &write_cmd_port); - - v3_dev_hook_io(dev, SEC_CTRL_PORT, - &read_port_std, &write_port_std); - v3_dev_hook_io(dev, SEC_DATA_PORT, - &read_data_port, &write_data_port); + &ide_read_data_port, &write_data_port); v3_dev_hook_io(dev, SEC_FEATURES_PORT, &read_port_std, &write_port_std); v3_dev_hook_io(dev, SEC_SECT_CNT_PORT, @@ -647,6 +979,12 @@ static int init_ide(struct vm_device * dev) { v3_dev_hook_io(dev, SEC_CMD_PORT, &read_port_std, &write_cmd_port); + + v3_dev_hook_io(dev, PRI_CTRL_PORT, + &read_port_std, &write_port_std); + + v3_dev_hook_io(dev, SEC_CTRL_PORT, + &read_port_std, &write_port_std); v3_dev_hook_io(dev, SEC_ADDR_REG_PORT, @@ -655,6 +993,36 @@ static int init_ide(struct vm_device * dev) { v3_dev_hook_io(dev, PRI_ADDR_REG_PORT, &read_port_std, &write_port_std); + + /* + + v3_dev_hook_io(dev, PRI_DMA_CMD_PORT, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, PRI_DMA_STATUS_PORT, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, PRI_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, PRI_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, PRI_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, PRI_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + + + v3_dev_hook_io(dev, SEC_DMA_CMD_PORT, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, SEC_DMA_STATUS_PORT, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, SEC_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, SEC_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, SEC_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + v3_dev_hook_io(dev, SEC_DMA_PRD_PORT0, + &read_dma_port, &write_dma_port); + */ return 0; } @@ -675,11 +1043,11 @@ static struct vm_device_ops dev_ops = { }; -struct vm_device * v3_create_ide() { +struct vm_device * v3_create_ide(struct vm_device * pci) { struct ide_internal * ide = (struct ide_internal *)V3_Malloc(sizeof(struct ide_internal)); struct vm_device * device = v3_create_device("IDE", &dev_ops, ide); - // ide->pci = pci; + ide->pci = pci; PrintDebug("IDE: Creating IDE bus x 2\n");