X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fide.c;h=7b13e5b6506d5fa3c51033f932f3a6d0b4c655b7;hp=43858a45340a8e0ab1a79db74b28edf573b616ce;hb=123a1ba27ea09c8fa77a1b36ce625b43d7c48b14;hpb=a3843aa9457ed5a02159fd5a83620426b0a0f3fe diff --git a/palacios/src/devices/ide.c b/palacios/src/devices/ide.c index 43858a4..7b13e5b 100644 --- a/palacios/src/devices/ide.c +++ b/palacios/src/devices/ide.c @@ -18,12 +18,19 @@ */ #include +#include #include #include #include +#include #include "ide-types.h" #include "atapi-types.h" +#ifndef CONFIG_DEBUG_IDE +#undef PrintDebug +#define PrintDebug(fmt, args...) +#endif + #define PRI_DEFAULT_IRQ 14 #define SEC_DEFAULT_IRQ 15 @@ -54,9 +61,12 @@ #define PRI_DEFAULT_DMA_PORT 0xc000 #define SEC_DEFAULT_DMA_PORT 0xc008 - #define DATA_BUFFER_SIZE 2048 +#define ATAPI_BLOCK_SIZE 2048 +#define HD_SECTOR_SIZE 512 + + static const char * ide_pri_port_strs[] = {"PRI_DATA", "PRI_FEATURES", "PRI_SECT_CNT", "PRI_SECT_NUM", "PRI_CYL_LOW", "PRI_CYL_HIGH", "PRI_DRV_SEL", "PRI_CMD", "PRI_CTRL", "PRI_ADDR_REG"}; @@ -70,6 +80,7 @@ static const char * ide_dma_port_strs[] = {"DMA_CMD", NULL, "DMA_STATUS", NULL, "DMA_PRD0", "DMA_PRD1", "DMA_PRD2", "DMA_PRD3"}; +typedef enum {BLOCK_NONE, BLOCK_DISK, BLOCK_CDROM} v3_block_type_t; static inline const char * io_port_to_str(uint16_t port) { if ((port >= PRI_DATA_PORT) && (port <= PRI_CMD_PORT)) { @@ -90,40 +101,33 @@ static inline const char * dma_port_to_str(uint16_t port) { } -static const char * ide_dev_type_strs[] = {"HARDDISK", "CDROM", "NONE"}; - - -static inline const char * device_type_to_str(v3_ide_dev_type_t type) { - if (type > 2) { - return NULL; - } - - return ide_dev_type_strs[type]; -} - - struct ide_cd_state { struct atapi_sense_data sense; - uint_t current_lba; + uint8_t atapi_cmd; struct atapi_error_recovery err_recovery; }; struct ide_hd_state { + int accessed; + + /* this is the multiple sector transfer size as configured for read/write multiple sectors*/ + uint_t mult_sector_num; + /* This is the current op sector size: + * for multiple sector ops this equals mult_sector_num + * for standard ops this equals 1 + */ + uint_t cur_sector_num; }; struct ide_drive { // Command Registers - v3_ide_dev_type_t drive_type; - - union { - struct v3_ide_cd_ops * cd_ops; - struct v3_ide_hd_ops * hd_ops; - }; + v3_block_type_t drive_type; + struct v3_dev_blk_ops * ops; union { struct ide_cd_state cd_state; @@ -139,11 +143,16 @@ struct ide_drive { // calculated for easy access uint_t transfer_length; + uint64_t current_lba; // We have a local data buffer that we use for IO port accesses uint8_t data_buf[DATA_BUFFER_SIZE]; + uint32_t num_cylinders; + uint32_t num_heads; + uint32_t num_sectors; + void * private_data; union { @@ -154,24 +163,23 @@ struct ide_drive { union { uint8_t sector_num; // 0x1f3,0x173 uint8_t lba0; - }; + } __attribute__((packed)); union { uint16_t cylinder; uint16_t lba12; - - + struct { uint8_t cylinder_low; // 0x1f4,0x174 uint8_t cylinder_high; // 0x1f5,0x175 } __attribute__((packed)); - + struct { uint8_t lba1; uint8_t lba2; } __attribute__((packed)); - - + + // The transfer length requested by the CPU uint16_t req_len; } __attribute__((packed)); @@ -195,8 +203,6 @@ struct ide_channel { int irq; // this is temporary until we add PCI support - struct pci_device * pci_dev; - // Control Registers struct ide_ctrl_reg ctrl_reg; // [write] 0x3f6,0x376 @@ -210,12 +216,19 @@ struct ide_channel { struct ide_internal { struct ide_channel channels[2]; - struct vm_device * pci; - struct pci_device * busmaster_pci; + + struct v3_southbridge * southbridge; + struct vm_device * pci_bus; + + struct pci_device * ide_pci; }; + + +/* Utility functions */ + static inline uint16_t be_to_le_16(const uint16_t val) { uint8_t * buf = (uint8_t *)&val; return (buf[0] << 8) | (buf[1]) ; @@ -265,11 +278,12 @@ static inline int is_lba_enabled(struct ide_channel * channel) { } +/* Drive Commands */ static void ide_raise_irq(struct vm_device * dev, struct ide_channel * channel) { if (channel->ctrl_reg.irq_disable == 0) { - PrintDebug("Raising IDE Interrupt %d\n", channel->irq); - channel->dma_status.int_gen = 1; - v3_raise_irq(dev->vm, channel->irq); + // PrintError("Raising IDE Interrupt %d\n", channel->irq); + channel->dma_status.int_gen = 1; + v3_raise_irq(dev->vm, channel->irq); } } @@ -277,11 +291,14 @@ static void ide_raise_irq(struct vm_device * dev, struct ide_channel * channel) static void drive_reset(struct ide_drive * drive) { drive->sector_count = 0x01; drive->sector_num = 0x01; + + PrintDebug("Resetting drive %s\n", drive->model); - if (drive->drive_type == IDE_CDROM) { + if (drive->drive_type == BLOCK_CDROM) { drive->cylinder = 0xeb14; } else { drive->cylinder = 0x0000; + //drive->hd_state.accessed = 0; } @@ -326,41 +343,161 @@ static void ide_abort_command(struct vm_device * dev, struct ide_channel * chann } -// Include the ATAPI interface handlers +static int dma_read(struct vm_device * dev, struct ide_channel * channel); +static int dma_write(struct vm_device * dev, struct ide_channel * channel); + + +/* ATAPI functions */ #include "atapi.h" +/* ATA functions */ +#include "ata.h" + + +#ifdef CONFIG_DEBUG_IDE +static void print_prd_table(struct vm_device * dev, struct ide_channel * channel) { + struct ide_dma_prd prd_entry; + int index = 0; + + PrintDebug("Dumping PRD table\n"); + + while (1) { + uint32_t prd_entry_addr = channel->dma_prd_addr + (sizeof(struct ide_dma_prd) * index); + int ret; + + ret = read_guest_pa_memory(dev->vm, prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry); + + if (ret != sizeof(struct ide_dma_prd)) { + PrintError("Could not read PRD\n"); + return; + } + + PrintDebug("\tPRD Addr: %x, PRD Len: %d, EOT: %d\n", + prd_entry.base_addr, prd_entry.size, prd_entry.end_of_table); + if (prd_entry.end_of_table) { + break; + } + + index++; + } + + return; +} +#endif +/* IO Operations */ static int dma_read(struct vm_device * dev, struct ide_channel * channel) { struct ide_drive * drive = get_selected_drive(channel); + // This is at top level scope to do the EOT test at the end struct ide_dma_prd prd_entry; - uint32_t prd_entry_addr = channel->dma_prd_addr + (sizeof(struct ide_dma_prd) * channel->dma_tbl_index); - int ret; + uint_t bytes_left = drive->transfer_length; + // Read in the data buffer.... + // Read a sector/block at a time until the prd entry is full. - PrintDebug("PRD table address = %x\n", channel->dma_prd_addr); +#ifdef CONFIG_DEBUG_IDE + print_prd_table(dev, channel); +#endif - ret = read_guest_pa_memory(dev->vm, prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry); + PrintDebug("DMA read for %d bytes\n", bytes_left); - if (ret != sizeof(struct ide_dma_prd)) { - PrintError("Could not read PRD\n"); - return -1; - } + // Loop through the disk data + while (bytes_left > 0) { + uint32_t prd_entry_addr = channel->dma_prd_addr + (sizeof(struct ide_dma_prd) * channel->dma_tbl_index); + uint_t prd_bytes_left = 0; + uint_t prd_offset = 0; + int ret; - PrintDebug("PRD Addr: %x, PDR Len: %d, EOT: %d\n", prd_entry.base_addr, prd_entry.size, prd_entry.end_of_table); + PrintDebug("PRD table address = %x\n", channel->dma_prd_addr); - ret = write_guest_pa_memory(dev->vm, prd_entry.base_addr, prd_entry.size, drive->data_buf); + ret = read_guest_pa_memory(dev->vm, prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry); - if (ret != prd_entry.size) { - PrintError("Failed to copy data into guest memory... (ret=%d)\n", ret); - return -1; - } + if (ret != sizeof(struct ide_dma_prd)) { + PrintError("Could not read PRD\n"); + return -1; + } - channel->status.busy = 0; - channel->status.ready = 1; - channel->status.data_req = 0; - channel->status.error = 0; - channel->status.seek_complete = 1; + PrintDebug("PRD Addr: %x, PRD Len: %d, EOT: %d\n", + prd_entry.base_addr, prd_entry.size, prd_entry.end_of_table); + + // loop through the PRD data.... + + prd_bytes_left = prd_entry.size; + + + while (prd_bytes_left > 0) { + uint_t bytes_to_write = 0; + + if (drive->drive_type == BLOCK_DISK) { + bytes_to_write = (prd_bytes_left > HD_SECTOR_SIZE) ? HD_SECTOR_SIZE : prd_bytes_left; + + + if (ata_read(dev, channel, drive->data_buf, 1) == -1) { + PrintError("Failed to read next disk sector\n"); + return -1; + } + } else if (drive->drive_type == BLOCK_CDROM) { + if (atapi_cmd_is_data_op(drive->cd_state.atapi_cmd)) { + bytes_to_write = (prd_bytes_left > ATAPI_BLOCK_SIZE) ? ATAPI_BLOCK_SIZE : prd_bytes_left; + + if (atapi_read_chunk(dev, channel) == -1) { + PrintError("Failed to read next disk sector\n"); + return -1; + } + } else { + PrintDebug("DMA of command packet\n"); + PrintError("How does this work???\n"); + return -1; + bytes_to_write = (prd_bytes_left > bytes_left) ? bytes_left : prd_bytes_left; + prd_bytes_left = bytes_to_write; + } + } + + PrintDebug("Writing DMA data to guest Memory ptr=%p, len=%d\n", + (void *)(addr_t)(prd_entry.base_addr + prd_offset), bytes_to_write); + + drive->current_lba++; + + ret = write_guest_pa_memory(dev->vm, prd_entry.base_addr + prd_offset, bytes_to_write, drive->data_buf); + + if (ret != bytes_to_write) { + PrintError("Failed to copy data into guest memory... (ret=%d)\n", ret); + return -1; + } + + PrintDebug("\t DMA ret=%d, (prd_bytes_left=%d) (bytes_left=%d)\n", ret, prd_bytes_left, bytes_left); + + drive->transfer_index += ret; + prd_bytes_left -= ret; + prd_offset += ret; + bytes_left -= ret; + } + + channel->dma_tbl_index++; + + if (drive->drive_type == BLOCK_DISK) { + if (drive->transfer_index % HD_SECTOR_SIZE) { + PrintError("We currently don't handle sectors that span PRD descriptors\n"); + return -1; + } + } else if (drive->drive_type == BLOCK_CDROM) { + if (atapi_cmd_is_data_op(drive->cd_state.atapi_cmd)) { + if (drive->transfer_index % ATAPI_BLOCK_SIZE) { + PrintError("We currently don't handle ATAPI BLOCKS that span PRD descriptors\n"); + PrintError("transfer_index=%d, transfer_length=%d\n", + drive->transfer_index, drive->transfer_length); + return -1; + } + } + } + + + if ((prd_entry.end_of_table == 1) && (bytes_left > 0)) { + PrintError("DMA table not large enough for data transfer...\n"); + return -1; + } + } /* drive->irq_flags.io_dir = 1; @@ -369,10 +506,20 @@ static int dma_read(struct vm_device * dev, struct ide_channel * channel) { */ + // Update to the next PRD entry + // set DMA status - channel->dma_status.active = 0; - channel->dma_status.err = 1; - channel->dma_status.int_gen = 1; + + if (prd_entry.end_of_table) { + channel->status.busy = 0; + channel->status.ready = 1; + channel->status.data_req = 0; + channel->status.error = 0; + channel->status.seek_complete = 1; + + channel->dma_status.active = 0; + channel->dma_status.err = 0; + } ide_raise_irq(dev, channel); @@ -381,46 +528,96 @@ static int dma_read(struct vm_device * dev, struct ide_channel * channel) { static int dma_write(struct vm_device * dev, struct ide_channel * channel) { - // unsupported - PrintError("DMA writes currently not supported\n"); - return -1; -} + struct ide_drive * drive = get_selected_drive(channel); + // This is at top level scope to do the EOT test at the end + struct ide_dma_prd prd_entry; + uint_t bytes_left = drive->transfer_length; -/* - * This is an ugly ugly ugly way to differentiate between the first and second DMA channels - */ + PrintDebug("DMA write from %d bytes\n", bytes_left); -static int write_dma_port(ushort_t port_offset, void * src, uint_t length, struct vm_device * dev, struct ide_channel * channel); -static int read_dma_port(ushort_t port_offset, void * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel); + // Loop through disk data + while (bytes_left > 0) { + uint32_t prd_entry_addr = channel->dma_prd_addr + (sizeof(struct ide_dma_prd) * channel->dma_tbl_index); + uint_t prd_bytes_left = 0; + uint_t prd_offset = 0; + int ret; + + PrintDebug("PRD Table address = %x\n", channel->dma_prd_addr); + ret = read_guest_pa_memory(dev->vm, prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry); -static int write_pri_dma_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - PrintDebug("IDE: Writing PRI DMA Port %x (%s) (val=%x)\n", port, dma_port_to_str(port & 0x7), *(uint32_t *)src); - return write_dma_port(port & 0x7, src, length, dev, &(ide->channels[0])); -} + if (ret != sizeof(struct ide_dma_prd)) { + PrintError("Could not read PRD\n"); + return -1; + } -static int write_sec_dma_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - PrintDebug("IDE: Writing SEC DMA Port %x (%s) (val=%x)\n", port, dma_port_to_str(port & 0x7), *(uint32_t *)src); - return write_dma_port(port & 0x7, src, length, dev, &(ide->channels[1])); -} + PrintDebug("PRD Addr: %x, PRD Len: %d, EOT: %d\n", + prd_entry.base_addr, prd_entry.size, prd_entry.end_of_table); + prd_bytes_left = prd_entry.size; -static int read_pri_dma_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - PrintDebug("IDE: Reading PRI DMA Port %x (%s)\n", port, dma_port_to_str(port & 0x7)); - return read_dma_port(port & 0x7, dst, length, dev, &(ide->channels[0])); -} + while (prd_bytes_left > 0) { + uint_t bytes_to_write = 0; -static int read_sec_dma_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) { - struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - PrintDebug("IDE: Reading SEC DMA Port %x (%s)\n", port, dma_port_to_str(port & 0x7)); - return read_dma_port(port & 0x7, dst, length, dev, &(ide->channels[1])); + + bytes_to_write = (prd_bytes_left > HD_SECTOR_SIZE) ? HD_SECTOR_SIZE : prd_bytes_left; + + + ret = read_guest_pa_memory(dev->vm, prd_entry.base_addr + prd_offset, bytes_to_write, drive->data_buf); + + if (ret != bytes_to_write) { + PrintError("Faild to copy data from guest memory... (ret=%d)\n", ret); + return -1; + } + + PrintDebug("\t DMA ret=%d (prd_bytes_left=%d) (bytes_left=%d)\n", ret, prd_bytes_left, bytes_left); + + + if (ata_write(dev, channel, drive->data_buf, 1) == -1) { + PrintError("Failed to write data to disk\n"); + return -1; + } + + drive->current_lba++; + + drive->transfer_index += ret; + prd_bytes_left -= ret; + prd_offset += ret; + bytes_left -= ret; + } + + channel->dma_tbl_index++; + + if (drive->transfer_index % HD_SECTOR_SIZE) { + PrintError("We currently don't handle sectors that span PRD descriptors\n"); + return -1; + } + + if ((prd_entry.end_of_table == 1) && (bytes_left > 0)) { + PrintError("DMA table not large enough for data transfer...\n"); + return -1; + } + } + + if (prd_entry.end_of_table) { + channel->status.busy = 0; + channel->status.ready = 1; + channel->status.data_req = 0; + channel->status.error = 0; + channel->status.seek_complete = 1; + + channel->dma_status.active = 0; + channel->dma_status.err = 0; + } + + ide_raise_irq(dev, channel); + + return 0; } + #define DMA_CMD_PORT 0x00 #define DMA_STATUS_PORT 0x02 #define DMA_PRD_PORT0 0x04 @@ -428,9 +625,17 @@ static int read_sec_dma_port(ushort_t port, void * dst, uint_t length, struct vm #define DMA_PRD_PORT2 0x06 #define DMA_PRD_PORT3 0x07 +#define DMA_CHANNEL_FLAG 0x08 + +static int write_dma_port(ushort_t port, void * src, uint_t length, void * private_data) { + struct vm_device * dev = (struct vm_device *)private_data; + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + uint16_t port_offset = port & (DMA_CHANNEL_FLAG - 1); + uint_t channel_flag = (port & DMA_CHANNEL_FLAG) >> 3; + struct ide_channel * channel = &(ide->channels[channel_flag]); -static int write_dma_port(ushort_t port_offset, void * src, uint_t length, - struct vm_device * dev, struct ide_channel * channel) { + PrintDebug("IDE: Writing DMA Port %x (%s) (val=%x) (len=%d) (channel=%d)\n", + port, dma_port_to_str(port_offset), *(uint32_t *)src, length, channel_flag); switch (port_offset) { case DMA_CMD_PORT: @@ -454,19 +659,27 @@ static int write_dma_port(ushort_t port_offset, void * src, uint_t length, return -1; } } + + channel->dma_cmd.val &= 0x09; } break; - case DMA_STATUS_PORT: + case DMA_STATUS_PORT: { + uint8_t val = *(uint8_t *)src; + if (length != 1) { PrintError("Invalid read length for DMA status port\n"); return -1; } - channel->dma_status.val = *(uint8_t *)src; + // weirdness + channel->dma_status.val = ((val & 0x60) | + (channel->dma_status.val & 0x01) | + (channel->dma_status.val & ~val & 0x06)); + break; - + } case DMA_PRD_PORT0: case DMA_PRD_PORT1: case DMA_PRD_PORT2: @@ -497,8 +710,14 @@ static int write_dma_port(ushort_t port_offset, void * src, uint_t length, } -static int read_dma_port(ushort_t port_offset, void * dst, uint_t length, - struct vm_device * dev, struct ide_channel * channel) { +static int read_dma_port(ushort_t port, void * dst, uint_t length, void * private_data) { + struct vm_device * dev = (struct vm_device *)private_data; + struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + uint16_t port_offset = port & (DMA_CHANNEL_FLAG - 1); + uint_t channel_flag = (port & DMA_CHANNEL_FLAG) >> 3; + struct ide_channel * channel = &(ide->channels[channel_flag]); + + PrintDebug("Reading DMA port %d (%x) (channel=%d)\n", port, port, channel_flag); switch (port_offset) { case DMA_CMD_PORT: @@ -538,7 +757,7 @@ static int read_dma_port(ushort_t port_offset, void * dst, uint_t length, return -1; } - PrintDebug("\tval=%x\n", *(uint32_t *)dst); + PrintDebug("\tval=%x (len=%d)\n", *(uint32_t *)dst, length); return length; } @@ -560,9 +779,41 @@ static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_de channel->cmd_reg = *(uint8_t *)src; switch (channel->cmd_reg) { - + + case 0xa1: // ATAPI Identify Device Packet + if (drive->drive_type != BLOCK_CDROM) { + drive_reset(drive); + + // JRL: Should we abort here? + ide_abort_command(dev, channel); + } else { + + atapi_identify_device(drive); + + channel->error_reg.val = 0; + channel->status.val = 0x58; // ready, data_req, seek_complete + + ide_raise_irq(dev, channel); + } + break; + case 0xec: // Identify Device + if (drive->drive_type != BLOCK_DISK) { + drive_reset(drive); + + // JRL: Should we abort here? + ide_abort_command(dev, channel); + } else { + ata_identify_device(drive); + + channel->error_reg.val = 0; + channel->status.val = 0x58; + + ide_raise_irq(dev, channel); + } + break; + case 0xa0: // ATAPI Command Packet - if (drive->drive_type != IDE_CDROM) { + if (drive->drive_type != BLOCK_CDROM) { ide_abort_command(dev, channel); } @@ -578,25 +829,86 @@ static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_de drive->transfer_index = 0; break; - case 0xa1: // ATAPI Identify Device Packet - atapi_identify_device(drive); - channel->error_reg.val = 0; - channel->status.val = 0x58; // ready, data_req, seek_complete + case 0x20: // Read Sectors with Retry + case 0x21: // Read Sectors without Retry + drive->hd_state.cur_sector_num = 1; + + if (ata_read_sectors(dev, channel) == -1) { + PrintError("Error reading sectors\n"); + return -1; + } + break; + + case 0x24: // Read Sectors Extended + drive->hd_state.cur_sector_num = 1; + + if (ata_read_sectors_ext(dev, channel) == -1) { + PrintError("Error reading extended sectors\n"); + return -1; + } + break; + + case 0xc8: // Read DMA with retry + case 0xc9: { // Read DMA + uint32_t sect_cnt = (drive->sector_count == 0) ? 256 : drive->sector_count; + + if (ata_get_lba(dev, channel, &(drive->current_lba)) == -1) { + ide_abort_command(dev, channel); + return 0; + } - ide_raise_irq(dev, channel); + drive->hd_state.cur_sector_num = 1; + + drive->transfer_length = sect_cnt * HD_SECTOR_SIZE; + drive->transfer_index = 0; + + if (channel->dma_status.active == 1) { + // DMA Read + if (dma_read(dev, channel) == -1) { + PrintError("Failed DMA Read\n"); + return -1; + } + } break; - case 0xec: // Identify Device - if (drive->drive_type != IDE_DISK) { - drive_reset(drive); + } - // JRL: Should we abort here? + case 0xca: { // Write DMA + uint32_t sect_cnt = (drive->sector_count == 0) ? 256 : drive->sector_count; + + if (ata_get_lba(dev, channel, &(drive->current_lba)) == -1) { ide_abort_command(dev, channel); - } else { - PrintError("IDE Disks currently not implemented\n"); - return -1; + return 0; + } + + drive->hd_state.cur_sector_num = 1; + + drive->transfer_length = sect_cnt * HD_SECTOR_SIZE; + drive->transfer_index = 0; + + if (channel->dma_status.active == 1) { + // DMA Write + if (dma_write(dev, channel) == -1) { + PrintError("Failed DMA Write\n"); + return -1; + } } break; + } + case 0xe0: // Standby Now 1 + case 0xe1: // Set Idle Immediate + case 0xe2: // Standby + case 0xe3: // Set Idle 1 + case 0xe6: // Sleep Now 1 + case 0x94: // Standby Now 2 + case 0x95: // Idle Immediate (CFA) + case 0x96: // Standby 2 + case 0x97: // Set idle 2 + case 0x99: // Sleep Now 2 + channel->status.val = 0; + channel->status.ready = 1; + ide_raise_irq(dev, channel); + break; case 0xef: // Set Features // Prior to this the features register has been written to. @@ -614,6 +926,38 @@ static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_de ide_raise_irq(dev, channel); break; + + case 0x91: // Initialize Drive Parameters + case 0x10: // recalibrate? + channel->status.error = 0; + channel->status.ready = 1; + channel->status.seek_complete = 1; + ide_raise_irq(dev, channel); + break; + case 0xc6: { // Set multiple mode (IDE Block mode) + // This makes the drive transfer multiple sectors before generating an interrupt + uint32_t tmp_sect_num = drive->sector_num; // GCC SUCKS + + if (tmp_sect_num > MAX_MULT_SECTORS) { + ide_abort_command(dev, channel); + break; + } + + if (drive->sector_count == 0) { + drive->hd_state.mult_sector_num= 1; + } else { + drive->hd_state.mult_sector_num = drive->sector_count; + } + + channel->status.ready = 1; + channel->status.error = 0; + + ide_raise_irq(dev, channel); + + break; + } + case 0xc4: // read multiple sectors + drive->hd_state.cur_sector_num = drive->hd_state.mult_sector_num; default: PrintError("Unimplemented IDE command (%x)\n", channel->cmd_reg); return -1; @@ -658,15 +1002,78 @@ static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_d static int read_hd_data(uint8_t * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel) { - PrintError("Harddrive data port read not implemented\n"); - return -1; + struct ide_drive * drive = get_selected_drive(channel); + int data_offset = drive->transfer_index % HD_SECTOR_SIZE; + + + + if (drive->transfer_index >= drive->transfer_length) { + PrintError("Buffer overrun... (xfer_len=%d) (cur_idx=%x) (post_idx=%d)\n", + drive->transfer_length, drive->transfer_index, + drive->transfer_index + length); + return -1; + } + + + if ((data_offset == 0) && (drive->transfer_index > 0)) { + drive->current_lba++; + + if (ata_read(dev, channel, drive->data_buf, 1) == -1) { + PrintError("Could not read next disk sector\n"); + return -1; + } + } + + /* + PrintDebug("Reading HD Data (Val=%x), (len=%d) (offset=%d)\n", + *(uint32_t *)(drive->data_buf + data_offset), + length, data_offset); + */ + memcpy(dst, drive->data_buf + data_offset, length); + + drive->transfer_index += length; + + + /* This is the trigger for interrupt injection. + * For read single sector commands we interrupt after every sector + * For multi sector reads we interrupt only at end of the cluster size (mult_sector_num) + * cur_sector_num is configured depending on the operation we are currently running + * We also trigger an interrupt if this is the last byte to transfer, regardless of sector count + */ + if (((drive->transfer_index % (HD_SECTOR_SIZE * drive->hd_state.cur_sector_num)) == 0) || + (drive->transfer_index == drive->transfer_length)) { + if (drive->transfer_index < drive->transfer_length) { + // An increment is complete, but there is still more data to be transferred... + PrintDebug("Integral Complete, still transferring more sectors\n"); + channel->status.data_req = 1; + + drive->irq_flags.c_d = 0; + } else { + PrintDebug("Final Sector Transferred\n"); + // This was the final read of the request + channel->status.data_req = 0; + + + drive->irq_flags.c_d = 1; + drive->irq_flags.rel = 0; + } + + channel->status.ready = 1; + drive->irq_flags.io_dir = 1; + channel->status.busy = 0; + + ide_raise_irq(dev, channel); + } + + + return length; } static int read_cd_data(uint8_t * dst, uint_t length, struct vm_device * dev, struct ide_channel * channel) { struct ide_drive * drive = get_selected_drive(channel); - int data_offset = drive->transfer_index % DATA_BUFFER_SIZE; + int data_offset = drive->transfer_index % ATAPI_BLOCK_SIZE; int req_offset = drive->transfer_index % drive->req_len; if (drive->cd_state.atapi_cmd != 0x28) { @@ -680,17 +1087,10 @@ static int read_cd_data(uint8_t * dst, uint_t length, struct vm_device * dev, st return -1; } - - + if ((data_offset == 0) && (drive->transfer_index > 0)) { - - if (drive->drive_type == IDE_CDROM) { - if (atapi_update_data_buf(dev, channel) == -1) { - PrintError("Could not update CDROM data buffer\n"); - return -1; - } - } else { - PrintError("IDE Harddrives not implemented\n"); + if (atapi_update_data_buf(dev, channel) == -1) { + PrintError("Could not update CDROM data buffer\n"); return -1; } } @@ -699,6 +1099,8 @@ static int read_cd_data(uint8_t * dst, uint_t length, struct vm_device * dev, st drive->transfer_index += length; + + // Should the req_offset be recalculated here????? if ((req_offset == 0) && (drive->transfer_index > 0)) { if (drive->transfer_index < drive->transfer_length) { // An increment is complete, but there is still more data to be transferred... @@ -758,19 +1160,19 @@ static int ide_read_data_port(ushort_t port, void * dst, uint_t length, struct v struct ide_channel * channel = get_selected_channel(ide, port); struct ide_drive * drive = get_selected_drive(channel); - // PrintDebug("IDE: Reading Data Port %x (len=%d)\n", port, length); + PrintDebug("IDE: Reading Data Port %x (len=%d)\n", port, length); if ((channel->cmd_reg == 0xec) || (channel->cmd_reg == 0xa1)) { return read_drive_id((uint8_t *)dst, length, dev, channel); } - if (drive->drive_type == IDE_CDROM) { + if (drive->drive_type == BLOCK_CDROM) { if (read_cd_data((uint8_t *)dst, length, dev, channel) == -1) { PrintError("IDE: Could not read CD Data\n"); return -1; } - } else if (drive->drive_type == IDE_DISK) { + } else if (drive->drive_type == BLOCK_DISK) { if (read_hd_data((uint8_t *)dst, length, dev, channel) == -1) { PrintError("IDE: Could not read HD Data\n"); return -1; @@ -817,21 +1219,25 @@ static int write_port_std(ushort_t port, void * src, uint_t length, struct vm_de case PRI_SECT_CNT_PORT: case SEC_SECT_CNT_PORT: - drive->sector_count = *(uint8_t *)src; + channel->drives[0].sector_count = *(uint8_t *)src; + channel->drives[1].sector_count = *(uint8_t *)src; break; case PRI_SECT_NUM_PORT: case SEC_SECT_NUM_PORT: - drive->sector_num = *(uint8_t *)src; - + channel->drives[0].sector_num = *(uint8_t *)src; + channel->drives[1].sector_num = *(uint8_t *)src; + break; case PRI_CYL_LOW_PORT: case SEC_CYL_LOW_PORT: - drive->cylinder_low = *(uint8_t *)src; + channel->drives[0].cylinder_low = *(uint8_t *)src; + channel->drives[1].cylinder_low = *(uint8_t *)src; break; case PRI_CYL_HIGH_PORT: case SEC_CYL_HIGH_PORT: - drive->cylinder_high = *(uint8_t *)src; + channel->drives[0].cylinder_high = *(uint8_t *)src; + channel->drives[1].cylinder_high = *(uint8_t *)src; break; case PRI_DRV_SEL_PORT: @@ -845,7 +1251,7 @@ static int write_port_std(ushort_t port, void * src, uint_t length, struct vm_de drive = get_selected_drive(channel); // Selecting a non-present device is a no-no - if (drive->drive_type == IDE_NONE) { + if (drive->drive_type == BLOCK_NONE) { PrintDebug("Attempting to select a non-present drive\n"); channel->error_reg.abort = 1; channel->status.error = 1; @@ -882,7 +1288,7 @@ static int read_port_std(ushort_t port, void * dst, uint_t length, struct vm_dev // if no drive is present just return 0 + reserved bits - if (drive->drive_type == IDE_NONE) { + if (drive->drive_type == BLOCK_NONE) { if ((port == PRI_DRV_SEL_PORT) || (port == SEC_DRV_SEL_PORT)) { *(uint8_t *)dst = 0xa0; @@ -953,7 +1359,7 @@ static void init_drive(struct ide_drive * drive) { drive->sector_num = 0x01; drive->cylinder = 0x0000; - drive->drive_type = IDE_NONE; + drive->drive_type = BLOCK_NONE; memset(drive->model, 0, sizeof(drive->model)); @@ -961,10 +1367,13 @@ static void init_drive(struct ide_drive * drive) { drive->transfer_length = 0; memset(drive->data_buf, 0, sizeof(drive->data_buf)); - + drive->num_cylinders = 0; + drive->num_heads = 0; + drive->num_sectors = 0; + drive->private_data = NULL; - drive->cd_ops = NULL; + drive->ops = NULL; } static void init_channel(struct ide_channel * channel) { @@ -989,96 +1398,160 @@ static void init_channel(struct ide_channel * channel) { } -static int pci_config_update(struct pci_device * pci_dev, uint_t reg_num, int length) { - PrintDebug("Interupt register (Dev=%s), irq=%d\n", pci_dev->name, pci_dev->config_header.intr_line); +static int pci_config_update(uint_t reg_num, void * src, uint_t length, void * private_data) { + PrintDebug("PCI Config Update\n"); + PrintDebug("\t\tInterupt register (Dev=%s), irq=%d\n", pci_dev->name, pci_dev->config_header.intr_line); return 0; } static int init_ide_state(struct vm_device * dev) { struct ide_internal * ide = (struct ide_internal *)(dev->private_data); - struct v3_pci_bar bars[6]; - struct pci_device * pci_dev = NULL; - int i, j; + int i; - for (i = 0; i < 2; i++) { + /* + * Check if the PIIX 3 actually represents both IDE channels in a single PCI entry + */ + + for (i = 0; i < 1; i++) { init_channel(&(ide->channels[i])); // JRL: this is a terrible hack... ide->channels[i].irq = PRI_DEFAULT_IRQ + i; + } - for (j = 0; j < 6; j++) { - bars[j].type = PCI_BAR_NONE; - } + return 0; +} - bars[4].type = PCI_BAR_IO; - bars[4].default_base_port = PRI_DEFAULT_DMA_PORT + (i * 0x8); - bars[4].num_ports = 8; - - if (i == 0) { - bars[4].io_read = read_pri_dma_port; - bars[4].io_write = write_pri_dma_port; - } else { - bars[4].io_read = read_sec_dma_port; - bars[4].io_write = write_sec_dma_port; - } - pci_dev = v3_pci_register_device(ide->pci, PCI_STD_DEVICE, 0, "V3_IDE", -1, bars, - pci_config_update, NULL, NULL, dev); - if (pci_dev == NULL) { - PrintError("Failed to register IDE BUS %d with PCI\n", i); - return -1; - } - ide->channels[i].pci_dev = pci_dev; +static int ide_free(struct vm_device * dev) { + // unhook io ports.... + // deregister from PCI? + return 0; +} + + +static struct v3_device_ops dev_ops = { + .free = ide_free, + .reset = NULL, + .start = NULL, + .stop = NULL, +}; - pci_dev->config_header.vendor_id = 0x1095; - pci_dev->config_header.device_id = 0x0646; - pci_dev->config_header.revision = 0x8f07; - pci_dev->config_header.subclass = 0x01; - pci_dev->config_header.class = 0x01; - pci_dev->config_header.intr_line = PRI_DEFAULT_IRQ + i; - pci_dev->config_header.intr_pin = 1; + + +static int connect_fn(struct guest_info * info, + void * frontend_data, + struct v3_dev_blk_ops * ops, + v3_cfg_tree_t * cfg, + void * private_data) { + struct ide_internal * ide = (struct ide_internal *)(frontend_data); + struct ide_channel * channel = NULL; + struct ide_drive * drive = NULL; + + char * bus_str = v3_cfg_val(cfg, "bus_num"); + char * drive_str = v3_cfg_val(cfg, "drive_num"); + char * type_str = v3_cfg_val(cfg, "type"); + char * model_str = v3_cfg_val(cfg, "model"); + uint_t bus_num = 0; + uint_t drive_num = 0; + + + if ((!type_str) || (!drive_str) || (!bus_str)) { + PrintError("Incomplete IDE Configuration\n"); + return -1; } + bus_num = atoi(bus_str); + drive_num = atoi(drive_str); + channel = &(ide->channels[bus_num]); + drive = &(channel->drives[drive_num]); - /* Register PIIX3 Busmaster PCI device */ - for (j = 0; j < 6; j++) { - bars[j].type = PCI_BAR_NONE; + if (drive->drive_type != BLOCK_NONE) { + PrintError("Device slot (bus=%d, drive=%d) already occupied\n", bus_num, drive_num); + return -1; } - pci_dev = v3_pci_register_device(ide->pci, PCI_STD_DEVICE, 0, "PIIX3 IDE", -1, bars, - NULL, NULL, NULL, dev); - + strncpy(drive->model, model_str, sizeof(drive->model) - 1); - ide->busmaster_pci = pci_dev; + if (strcasecmp(type_str, "cdrom") == 0) { + drive->drive_type = BLOCK_CDROM; + + while (strlen((char *)(drive->model)) < 40) { + strcat((char*)(drive->model), " "); + } + + } else if (strcasecmp(type_str, "hd") == 0) { + drive->drive_type = BLOCK_DISK; - pci_dev->config_header.vendor_id = 0x8086; - pci_dev->config_header.device_id = 0x7010; - pci_dev->config_header.revision = 0x80; - pci_dev->config_header.subclass = 0x01; - pci_dev->config_header.class = 0x01; + drive->hd_state.accessed = 0; + drive->hd_state.mult_sector_num = 1; + drive->num_sectors = 63; + drive->num_heads = 16; + drive->num_cylinders = ops->get_capacity(private_data) / (drive->num_sectors * drive->num_heads); + } else { + PrintError("invalid IDE drive type\n"); + return -1; + } + + + drive->ops = ops; + + if (ide->ide_pci) { + // Hardcode this for now, but its not a good idea.... + ide->ide_pci->config_space[0x41 + (bus_num * 2)] = 0x80; + } + + drive->private_data = private_data; return 0; } -static int init_ide(struct vm_device * dev) { - //struct ide_internal * ide = (struct ide_internal *)(dev->private_data); + +static int ide_init(struct guest_info * vm, v3_cfg_tree_t * cfg) { + struct ide_internal * ide = (struct ide_internal *)V3_Malloc(sizeof(struct ide_internal)); + char * name = v3_cfg_val(cfg, "name"); PrintDebug("IDE: Initializing IDE\n"); + memset(ide, 0, sizeof(struct ide_internal)); + + + ide->pci_bus = v3_find_dev(vm, v3_cfg_val(cfg, "bus")); + + if (ide->pci_bus != NULL) { + struct vm_device * southbridge = v3_find_dev(vm, v3_cfg_val(cfg, "controller")); + + if (!southbridge) { + PrintError("Could not find southbridge\n"); + return -1; + } + + ide->southbridge = (struct v3_southbridge *)(southbridge->private_data); + } + + PrintDebug("IDE: Creating IDE bus x 2\n"); + + struct vm_device * dev = v3_allocate_device(name, &dev_ops, ide); + + if (v3_attach_device(vm, dev) == -1) { + PrintError("Could not attach device %s\n", name); + return -1; + } if (init_ide_state(dev) == -1) { PrintError("Failed to initialize IDE state\n"); return -1; } + PrintDebug("Connecting to IDE IO ports\n"); v3_dev_hook_io(dev, PRI_DATA_PORT, &ide_read_data_port, &write_data_port); @@ -1128,109 +1601,96 @@ static int init_ide(struct vm_device * dev) { v3_dev_hook_io(dev, PRI_ADDR_REG_PORT, &read_port_std, &write_port_std); - return 0; -} -static int deinit_ide(struct vm_device * dev) { - // unhook io ports.... - // deregister from PCI? - return 0; -} + if (ide->pci_bus) { + struct v3_pci_bar bars[6]; + struct v3_southbridge * southbridge = (struct v3_southbridge *)(ide->southbridge); + struct pci_device * sb_pci = (struct pci_device *)(southbridge->southbridge_pci); + struct pci_device * pci_dev = NULL; + int i; -static struct vm_device_ops dev_ops = { - .init = init_ide, - .deinit = deinit_ide, - .reset = NULL, - .start = NULL, - .stop = NULL, -}; + PrintDebug("Connecting IDE to PCI bus\n"); + for (i = 0; i < 6; i++) { + bars[i].type = PCI_BAR_NONE; + } -struct vm_device * v3_create_ide(struct vm_device * pci) { - struct ide_internal * ide = (struct ide_internal *)V3_Malloc(sizeof(struct ide_internal)); - struct vm_device * device = v3_create_device("IDE", &dev_ops, ide); + bars[4].type = PCI_BAR_IO; + // bars[4].default_base_port = PRI_DEFAULT_DMA_PORT; + bars[4].default_base_port = -1; + bars[4].num_ports = 16; - ide->pci = pci; + bars[4].io_read = read_dma_port; + bars[4].io_write = write_dma_port; + bars[4].private_data = dev; - PrintDebug("IDE: Creating IDE bus x 2\n"); + pci_dev = v3_pci_register_device(ide->pci_bus, PCI_STD_DEVICE, 0, sb_pci->dev_num, 1, + "PIIX3_IDE", bars, + pci_config_update, NULL, NULL, dev); - return device; -} + if (pci_dev == NULL) { + PrintError("Failed to register IDE BUS %d with PCI\n", i); + return -1; + } + /* This is for CMD646 devices + pci_dev->config_header.vendor_id = 0x1095; + pci_dev->config_header.device_id = 0x0646; + pci_dev->config_header.revision = 0x8f07; + */ + pci_dev->config_header.vendor_id = 0x8086; + pci_dev->config_header.device_id = 0x7010; + pci_dev->config_header.revision = 0x00; + pci_dev->config_header.prog_if = 0x80; // Master IDE device + pci_dev->config_header.subclass = PCI_STORAGE_SUBCLASS_IDE; + pci_dev->config_header.class = PCI_CLASS_STORAGE; + pci_dev->config_header.command = 0; + pci_dev->config_header.status = 0x0280; -int v3_ide_register_cdrom(struct vm_device * ide_dev, - uint_t bus_num, - uint_t drive_num, - char * dev_name, - struct v3_ide_cd_ops * ops, - void * private_data) { + ide->ide_pci = pci_dev; - struct ide_internal * ide = (struct ide_internal *)(ide_dev->private_data); - struct ide_channel * channel = NULL; - struct ide_drive * drive = NULL; - V3_ASSERT((bus_num >= 0) && (bus_num < 2)); - V3_ASSERT((drive_num >= 0) && (drive_num < 2)); + } - channel = &(ide->channels[bus_num]); - drive = &(channel->drives[drive_num]); - - if (drive->drive_type != IDE_NONE) { - PrintError("Device slot (bus=%d, drive=%d) already occupied\n", bus_num, drive_num); + if (v3_dev_add_blk_frontend(vm, name, connect_fn, (void *)ide) == -1) { + PrintError("Could not register %s as frontend\n", name); return -1; } + - strncpy(drive->model, dev_name, sizeof(drive->model) - 1); - - while (strlen((char *)(drive->model)) < 40) { - strcat((char*)(drive->model), " "); - } + PrintDebug("IDE Initialized\n"); + return 0; +} - drive->drive_type = IDE_CDROM; - drive->cd_ops = ops; +device_register("IDE", ide_init) - drive->private_data = private_data; - return 0; -} -int v3_ide_register_harddisk(struct vm_device * ide_dev, - uint_t bus_num, - uint_t drive_num, - char * dev_name, - struct v3_ide_hd_ops * ops, - void * private_data) { +int v3_ide_get_geometry(struct vm_device * ide_dev, int channel_num, int drive_num, + uint32_t * cylinders, uint32_t * heads, uint32_t * sectors) { struct ide_internal * ide = (struct ide_internal *)(ide_dev->private_data); - struct ide_channel * channel = NULL; - struct ide_drive * drive = NULL; - - V3_ASSERT((bus_num >= 0) && (bus_num < 2)); - V3_ASSERT((drive_num >= 0) && (drive_num < 2)); - - channel = &(ide->channels[bus_num]); - drive = &(channel->drives[drive_num]); + struct ide_channel * channel = &(ide->channels[channel_num]); + struct ide_drive * drive = &(channel->drives[drive_num]); - if (drive->drive_type != IDE_NONE) { - PrintError("Device slot (bus=%d, drive=%d) already occupied\n", bus_num, drive_num); + if (drive->drive_type == BLOCK_NONE) { return -1; } - strncpy(drive->model, dev_name, sizeof(drive->model) - 1); + *cylinders = drive->num_cylinders; + *heads = drive->num_heads; + *sectors = drive->num_sectors; - drive->drive_type = IDE_DISK; + return 0; +} - drive->hd_ops = ops; - drive->private_data = private_data; - return 0; -}