X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Finclude%2Fpalacios%2Fvmx.h;h=a34cd46ca5a7eaf6980e34bc5a96c59d542355b1;hp=7d020535756752d8d125c723154584c835c7b619;hb=123a1ba27ea09c8fa77a1b36ce625b43d7c48b14;hpb=f8b365257743be47363da720f0261f5ed6441c57 diff --git a/palacios/include/palacios/vmx.h b/palacios/include/palacios/vmx.h index 7d02053..a34cd46 100644 --- a/palacios/include/palacios/vmx.h +++ b/palacios/include/palacios/vmx.h @@ -1,4 +1,5 @@ + /* * This file is part of the Palacios Virtual Machine Monitor developed * by the V3VEE Project with funding from the United States National @@ -21,17 +22,19 @@ */ -#ifndef __VMX_H -#define __VMX_H +#ifndef __VMX_H__ +#define __VMX_H__ #ifdef __V3VEE__ #include #include +#include +#include // Intel VMX Specific MSRs #define VMX_FEATURE_CONTROL_MSR 0x0000003a -#define VMX_BASIC_MSR 0x00000480 +#define VMX_BASIC_MSR 0x00000480 #define VMX_PINBASED_CTLS_MSR 0x00000481 #define VMX_PROCBASED_CTLS_MSR 0x00000482 #define VMX_EXIT_CTLS_MSR 0x00000483 @@ -56,6 +59,116 @@ #define CPUID_1_ECX_VTXFLAG 0x00000020 +struct vmx_pin_ctrls { + union { + uint32_t value; + struct { + uint_t ext_int_exit : 1; + uint_t rsvd1 : 2; + uint_t nmi_exit : 1; + uint_t rsvd2 : 1; + uint_t virt_nmi : 1; + uint_t active_preempt_timer : 1; + uint_t rsvd3 : 25; + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); + + +struct vmx_pri_proc_ctrls { + union { + uint32_t value; + struct { + uint_t rsvd1 : 2; + uint_t int_wndw_exit : 1; + uint_t tsc_offset : 1; + uint_t rsvd2 : 3; + uint_t hlt_exit : 1; + uint_t rsvd3 : 1; + uint_t invlpg_exit : 1; + uint_t mwait_exit : 1; + uint_t rdpmc_exit : 1; + uint_t rdtsc_exit : 1; + uint_t rsvd4 : 2; + uint_t cr3_ld_exit : 1; + uint_t cr3_str_exit : 1; + uint_t rsvd5 : 2; + uint_t cr8_ld_exit : 1; + uint_t cr8_str_exit : 1; + uint_t tpr_shdw : 1; + uint_t nmi_wndw_exit : 1; + uint_t mov_dr_exit : 1; + uint_t uncon_io_exit : 1; + uint_t use_io_bitmap : 1; + uint_t rsvd6 : 1; + uint_t monitor_trap : 1; + uint_t use_msr_bitmap : 1; + uint_t monitor_exit : 1; + uint_t pause_exit : 1; + uint_t sec_ctrls : 1; + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); + +struct vmx_sec_proc_ctrls { + union { + uint32_t value; + struct { + uint_t virt_apic_acc : 1; + uint_t enable_ept : 1; + uint_t desc_table_exit : 1; + uint_t enable_rdtscp : 1; + uint_t virt_x2apic : 1; + uint_t enable_vpid : 1; + uint_t unrstrct_guest : 1; + uint_t rsvd1 : 2; + uint_t pause_loop_exit : 1; + uint_t rsvd2 : 21; + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); + +struct vmx_exit_ctrls { + union { + uint32_t value; + struct { + uint_t rsvd1 : 2; + uint_t save_dbg_ctrls : 1; + uint_t rsvd2 : 6; + uint_t host_64_on : 1; + uint_t rsvd3 : 2; + uint_t ld_perf_glbl_ctrl : 1; + uint_t rsvd4 : 2; + uint_t ack_int_on_exit : 1; + uint_t rsvd5 : 2; + uint_t save_pat : 1; + uint_t ld_pat : 1; + uint_t save_efer : 1; + uint_t ld_efer : 1; + uint_t save_preempt_timer : 1; + uint_t rsvd6 : 9; + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); + +struct vmx_entry_ctrls { + union { + uint32_t value; + struct { + uint_t rsvd1 : 2; + uint_t ld_dbg_ctrls : 1; + uint_t rsvd2 : 6; + uint_t guest_ia32e : 1; + uint_t smm_entry : 1; + uint_t no_dual_monitor : 1; + uint_t rsvd3 : 1; + uint_t ld_perf_glbl_ctrl : 1; + uint_t ld_pat : 1; + uint_t ld_efer : 1; + uint_t rsvd4 : 16; + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); struct vmx_basic_msr { uint32_t revision; @@ -68,44 +181,61 @@ struct vmx_basic_msr { } __attribute__((packed)); typedef enum { - VMXASSIST_STARTUP, - VMXASSIST_V8086_BIOS, - VMXASSIST_V8086, - NORMAL + VMXASSIST_DISABLED, + VMXASSIST_ENABLED } vmx_state_t; +struct tss_descriptor { + uint16_t limit1; + uint16_t base1; + uint_t base2 : 8; + /* In IA32, type follows the form 10B1b, where B is the busy flag */ + uint_t type : 4; + uint_t zero1 : 1; + uint_t dpl : 2; + uint_t present : 1; + uint_t limit2 : 4; + uint_t available : 1; + uint_t zero2 : 1; + uint_t zero3 : 1; + uint_t granularity : 1; + uint_t base3 : 8; +#ifdef __V3_64BIT__ + uint32_t base4; + uint_t rsvd1 : 8; + uint_t zero4 : 5; + uint_t rsvd2 : 19; +#endif +}__attribute__((packed)); + +struct vmcs_host_state { + struct v3_segment gdtr; + struct v3_segment idtr; + struct v3_segment tr; +}; + struct vmx_data { vmx_state_t state; - struct vmcs_data vmcs; -}; + struct vmcs_host_state host_state; + addr_t vmcs_ptr_phys; -enum InstructionType { VM_UNKNOWN_INST, VM_MOV_TO_CR0 } ; + uint8_t ia32e_avail; -struct Instruction { - enum InstructionType type; - uint_t address; - uint_t size; - uint_t input1; - uint_t input2; - uint_t output; + /* VMX Control Fields */ + struct vmx_pin_ctrls pin_ctrls; + struct vmx_pri_proc_ctrls pri_proc_ctrls; + struct vmx_sec_proc_ctrls sec_proc_ctrls; + struct vmx_exit_ctrls exit_ctrls; + struct vmx_entry_ctrls entry_ctrls; }; - - - -int is_vmx_capable(); - -VmxOnRegion * Init_VMX(); -VmxOnRegion * CreateVmxOnRegion(); - -int VMLaunch(struct VMDescriptor *vm); - - -int Do_VMM(struct VMXRegs regs); +int v3_is_vmx_capable(); +void v3_init_vmx_cpu(int cpu_id); #endif // ! __V3VEE__ #endif +