X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Finclude%2Fpalacios%2Fvmx.h;h=4ac707b4e0290fe99bab16e37123046399feb7e0;hp=2b50a04890cc60d9553660c4689b119bde0a33c0;hb=52a58bb7bdf06ca22ad6883f8095f8aa5ca4b8a4;hpb=a1d3e2f36e9ef64ca62c611c4f0aa050726e186b diff --git a/palacios/include/palacios/vmx.h b/palacios/include/palacios/vmx.h index 2b50a04..4ac707b 100644 --- a/palacios/include/palacios/vmx.h +++ b/palacios/include/palacios/vmx.h @@ -29,6 +29,7 @@ #include #include #include +#include // Intel VMX Specific MSRs #define VMX_FEATURE_CONTROL_MSR 0x0000003a @@ -75,9 +76,51 @@ typedef enum { NORMAL } vmx_state_t; +struct tss_descriptor { + union { + ulong_t value; + struct { + uint16_t limit1; + uint16_t base1; + uint_t base2 : 8; + /* In IA32, type follows the form 10B1b, where B is the busy flag */ + uint_t type : 4; + uint_t zero1 : 1; + uint_t dpl : 2; + uint_t present : 1; + uint_t limit2 : 4; + uint_t available : 1; + uint_t zero2 : 1; + uint_t zero3 : 1; + uint_t granularity : 1; + uint_t base3 : 8; +#ifdef __V3_64BIT__ + uint32_t base4; + uint_t rsvd1 : 8; + uint_t zero4 : 5; + uint_t rsvd2 : 19; +#endif + } __attribute__((packed)); + } __attribute__((packed)); +}__attribute__((packed)); + +struct vmcs_host_state { + struct v3_segment gdtr; + struct v3_segment idtr; + struct v3_segment tr; +}; + struct vmx_data { vmx_state_t state; addr_t vmcs_ptr_phys; + struct vmcs_host_state host_state; + /* VMX Control Fields */ + uint32_t pinbased_ctrls; + uint32_t pri_procbased_ctrls; + uint32_t sec_procbased_ctrls; + uint32_t exit_ctrls; + uint32_t entry_ctrls; + uint32_t excp_bitmap; }; @@ -104,3 +147,4 @@ void v3_init_vmx(struct v3_ctrl_ops* vm_ops); #endif +