X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?p=palacios.git;a=blobdiff_plain;f=palacios%2Finclude%2Fpalacios%2Fsvm.h;fp=palacios%2Finclude%2Fpalacios%2Fsvm.h;h=b522ee34f0a326852a031d0f5a3d7158164e1cc6;hp=0000000000000000000000000000000000000000;hb=ddc16b0737cf58f7aa90a69c6652cdf4090aec51;hpb=626595465a2c6987606a6bc697df65130ad8c2d3

diff --git a/palacios/include/palacios/svm.h b/palacios/include/palacios/svm.h
new file mode 100644
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+++ b/palacios/include/palacios/svm.h
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+/* 
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National 
+ * Science Foundation and the Department of Energy.  
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico.  You can find out more at 
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software.  You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+#ifndef __SVM_H
+#define __SVM_H
+
+
+
+
+#ifdef __V3VEE__
+
+#include <palacios/vmm.h>
+
+
+#include <palacios/vmcb.h>
+#include <palacios/vmm_util.h>
+
+#define CPUID_FEATURE_IDS 0x80000001
+#define CPUID_FEATURE_IDS_ecx_svm_avail 0x00000004
+
+#define CPUID_SVM_REV_AND_FEATURE_IDS 0x8000000a
+#define CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml 0x00000004
+#define CPUID_SVM_REV_AND_FEATURE_IDS_edx_np  0x00000001
+
+
+#define EFER_MSR                 0xc0000080
+#define EFER_MSR_svm_enable      0x00001000
+
+/************/
+/* SVM MSRs */
+/************/
+/* AMD Arch Vol 3, sec. 15.28, pg 420 */
+/************/
+
+// SVM VM_CR MSR 
+#define SVM_VM_CR_MSR             0xc0010114
+#define SVM_VM_CR_MSR_dpd         0x00000001
+#define SVM_VM_CR_MSR_r_init      0x00000002
+#define SVM_VM_CR_MSR_dis_a20m    0x00000004
+#define SVM_VM_CR_MSR_lock        0x00000008
+#define SVM_VM_CR_MSR_svmdis      0x00000010
+
+#define SVM_IGNNE_MSR             0xc0010115
+
+// SMM Signal Control Register 
+#define SVM_SMM_CTL_MSR           0xc0010116
+#define SVM_SMM_CTL_MSR_dismiss   0x00000001
+#define SVM_SMM_CTL_MSR_enter     0x00000002
+#define SVM_SMM_CTL_MSR_smi_cycle 0x00000004
+#define SVM_SMM_CTL_MSR_exit      0x00000008
+#define SVM_SMM_CTL_MSR_rsm_cycle 0x00000010
+
+#define SVM_VM_HSAVE_PA_MSR      0xc0010117
+
+#define SVM_KEY_MSR              0xc0010118
+
+/******/
+
+
+
+
+#define SVM_HANDLER_SUCCESS   0x0
+#define SVM_HANDLER_ERROR     0x1
+#define SVM_HANDLER_HALT      0x2
+
+
+
+void v3_init_SVM(struct v3_ctrl_ops * vmm_ops);
+int v3_is_svm_capable();
+
+#endif
+
+
+
+#endif