From: Jack Lange <jacklange@cs.pitt.edu>
Date: Wed, 25 Apr 2012 14:33:58 +0000 (-0400)
Subject: added 64bit bar support to passthrough PCI
X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=commitdiff_plain;h=abfa178accc81df11dcc3afe7972e4c46640cb28;p=palacios.releases.git

added 64bit bar support to passthrough PCI
---

diff --git a/linux_module/iface-host-pci-hw.h b/linux_module/iface-host-pci-hw.h
index b08d897..1736c90 100644
--- a/linux_module/iface-host-pci-hw.h
+++ b/linux_module/iface-host-pci-hw.h
@@ -78,8 +78,17 @@ static int setup_hw_pci_dev(struct host_pci_device * host_dev) {
 		bar->type = PT_BAR_IO;
 	    } else if (flags & IORESOURCE_MEM) {
 		if (flags & IORESOURCE_MEM_64) {
-		    printk("ERROR: 64 Bit BARS not yet supported\n");
-		    bar->type = PT_BAR_NONE;
+		    struct v3_host_pci_bar * hi_bar = &(v3_dev->bars[i + 1]); 
+	    
+		    bar->type = PT_BAR_MEM64_LO;
+
+		    hi_bar->type = PT_BAR_MEM64_HI;
+		    hi_bar->size = bar->size;
+		    hi_bar->addr = bar->addr;
+		    hi_bar->cacheable = ((flags & IORESOURCE_CACHEABLE) != 0);
+		    hi_bar->prefetchable = ((flags & IORESOURCE_PREFETCH) != 0);
+		    
+		    i++;
 		} else if (flags & IORESOURCE_DMA) {
 		    bar->type = PT_BAR_MEM24;
 		} else {
diff --git a/palacios/src/devices/host_pci.c b/palacios/src/devices/host_pci.c
index 85e9cb3..8db3c3a 100644
--- a/palacios/src/devices/host_pci.c
+++ b/palacios/src/devices/host_pci.c
@@ -178,9 +178,14 @@ static int pci_bar_init(int bar_num, uint32_t * dst, void * private_data) {
 			  hbar->addr, hbar->addr + hbar->size - 1,
 			  hbar->addr);
     } else if (hbar->type == PT_BAR_MEM64_LO) {
-	PrintError("Don't currently handle 64 bit bars...\n");
+	struct v3_host_pci_bar * hi_hbar = &(state->host_dev->bars[bar_num + 1]);
+	bar_val = PCI_MEM64_LO_BAR_VAL(hi_hbar->addr, hbar->prefetchable);
     } else if (hbar->type == PT_BAR_MEM64_HI) {
-	PrintError("Don't currently handle 64 bit bars...\n");
+	bar_val = PCI_MEM64_HI_BAR_VAL(hbar->addr, hbar->prefetchable);
+
+	v3_add_shadow_mem(dev->vm, V3_MEM_CORE_ANY, 
+			  hbar->addr, hbar->addr + hbar->size - 1,
+			  hbar->addr);	
     }