From: Lei Xia <lxia@northwestern.edu>
Date: Fri, 11 Nov 2011 17:06:41 +0000 (-0600)
Subject: set RTL8139's default io base port to -1 when registered with PCI bus
X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=commitdiff_plain;h=Release-1.3;p=palacios-OLD.git

set RTL8139's default io base port to -1 when registered with PCI bus
---

diff --git a/palacios/src/devices/rtl8139.c b/palacios/src/devices/rtl8139.c
index 47abbde..9eaa306 100644
--- a/palacios/src/devices/rtl8139.c
+++ b/palacios/src/devices/rtl8139.c
@@ -1712,7 +1712,7 @@ static int register_dev(struct rtl8139_state * nic_state)  {
     }
 
     bars[0].type = PCI_BAR_IO;
-    bars[0].default_base_port = 0xc100;
+    bars[0].default_base_port = -1;
     bars[0].num_ports = 0x100;
 
     bars[0].io_read = rtl8139_ioport_read;