X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=f6a6a0b5db5aaf10e0aeedc03068ea8f6560d162;hb=b283373f3067fe329fb6c526f62d72cec27f4149;hp=ef0f614d23c2eeec292a4fd747d3d3231d9ec24f;hpb=e02cc15e36e8f5d7ee66390986351748dd9a16a1;p=palacios.git

diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c
index ef0f614..f6a6a0b 100644
--- a/palacios/src/palacios/vmx.c
+++ b/palacios/src/palacios/vmx.c
@@ -42,8 +42,7 @@
 
 
 static addr_t host_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0};
-
-
+static addr_t active_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0};
 
 extern int v3_vmx_launch(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs);
 extern int v3_vmx_resume(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs);
@@ -73,50 +72,7 @@ static int inline check_vmcs_read(vmcs_field_t field, void * val) {
     return ret;
 }
 
-#if 0
-// For the 32 bit reserved bit fields 
-// MB1s are in the low 32 bits, MBZs are in the high 32 bits of the MSR
-static uint32_t sanitize_bits1(uint32_t msr_num, uint32_t val) {
-    v3_msr_t mask_msr;
-
-    PrintDebug("sanitize_bits1 (MSR:%x)\n", msr_num);
-
-    v3_get_msr(msr_num, &mask_msr.hi, &mask_msr.lo);
-
-    PrintDebug("MSR %x = %x : %x \n", msr_num, mask_msr.hi, mask_msr.lo);
-
-    val |= mask_msr.lo;
-    val |= mask_msr.hi;
-  
-    return val;
-}
-
-
-
-static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) {
-    v3_msr_t msr0, msr1;
-    addr_t msr0_val, msr1_val;
-
-    PrintDebug("sanitize_bits2 (MSR0=%x, MSR1=%x)\n", msr_num0, msr_num1);
-
-    v3_get_msr(msr_num0, &msr0.hi, &msr0.lo);
-    v3_get_msr(msr_num1, &msr1.hi, &msr1.lo);
-  
-    // This generates a mask that is the natural bit width of the CPU
-    msr0_val = msr0.value;
-    msr1_val = msr1.value;
-
-    PrintDebug("MSR %x = %p, %x = %p \n", msr_num0, (void*)msr0_val, msr_num1, (void*)msr1_val);
-
-    val |= msr0_val;
-    val |= msr1_val;
-
-    return val;
-}
-
-
 
-#endif
 
 
 static addr_t allocate_vmcs() {
@@ -141,9 +97,15 @@ static addr_t allocate_vmcs() {
 
 static int init_vmcs_bios(struct guest_info * info, struct vmx_data * vmx_state) {
     int vmx_ret = 0;
+    struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
+
+    // disable global interrupts for vm state initialization
+    v3_disable_ints();
 
     PrintDebug("Loading VMCS\n");
     vmx_ret = vmcs_load(vmx_state->vmcs_ptr_phys);
+    active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys;
+    vmx_state->state = VMX_UNLAUNCHED;
 
     if (vmx_ret != VMX_SUCCESS) {
         PrintError("VMPTRLD failed\n");
@@ -421,7 +383,12 @@ static int init_vmcs_bios(struct guest_info * info, struct vmx_data * vmx_state)
     }
 
 
-    vmx_state->state = VMXASSIST_DISABLED;
+    vmx_state->assist_state = VMXASSIST_DISABLED;
+
+    // reenable global interrupts for vm state initialization now
+    // that the vm state is initialized. If another VM kicks us off, 
+    // it'll update our vmx state so that we know to reload ourself
+    v3_disable_ints();
 
     return 0;
 }
@@ -440,6 +407,7 @@ int v3_init_vmx_vmcs(struct guest_info * info, v3_vm_class_t vm_class) {
     PrintDebug("VMCS pointer: %p\n", (void *)(vmx_state->vmcs_ptr_phys));
 
     info->vmm_data = vmx_state;
+    vmx_state->state = VMX_UNLAUNCHED;
 
     PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data);
     
@@ -659,6 +627,7 @@ int v3_vmx_enter(struct guest_info * info) {
     int ret = 0;
     uint32_t tsc_offset_low, tsc_offset_high;
     struct vmx_exit_info exit_info;
+    struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
 
     // Conditionally yield the CPU if the timeslice has expired
     v3_yield_cond(info);
@@ -697,13 +666,20 @@ int v3_vmx_enter(struct guest_info * info) {
     check_vmcs_write(VMCS_TSC_OFFSET_HIGH, tsc_offset_high);
     check_vmcs_write(VMCS_TSC_OFFSET, tsc_offset_low);
 
-    if (info->vm_info->run_state == VM_STOPPED) {
+    if (active_vmcs_ptrs[V3_Get_CPU()] != vmx_info->vmcs_ptr_phys) {
+	vmcs_load(vmx_info->vmcs_ptr_phys);
+	active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys;
+    }
+
+    if (vmx_info->state == VMX_UNLAUNCHED) {
+	vmx_info->state = VMX_LAUNCHED;
 	info->vm_info->run_state = VM_RUNNING;
 	ret = v3_vmx_launch(&(info->vm_regs), info, &(info->ctrl_regs));
     } else {
+	V3_ASSERT(vmx_info->state != VMX_UNLAUNCHED);
 	ret = v3_vmx_resume(&(info->vm_regs), info, &(info->ctrl_regs));
     }
-
+    
     //  PrintDebug("VMX Exit: ret=%d\n", ret);
 
     if (ret != VMX_SUCCESS) {
@@ -750,6 +726,17 @@ int v3_vmx_enter(struct guest_info * info) {
     update_irq_exit_state(info);
 #endif
 
+    if (exit_info.exit_reason == VMEXIT_INTR_WINDOW) {
+	// This is a special case whose only job is to inject an interrupt
+	vmcs_read(VMCS_PROC_CTRLS, &(vmx_info->pri_proc_ctrls.value));
+        vmx_info->pri_proc_ctrls.int_wndw_exit = 0;
+        vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value);
+
+#ifdef CONFIG_DEBUG_INTERRUPTS
+        PrintDebug("Interrupts available again! (RIP=%llx)\n", info->rip);
+#endif
+    }
+
     // reenable global interrupts after vm exit
     v3_enable_ints();