X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=ed5140fad09fd70c1765518600f0b3f8d340f886;hb=e3b62e7befa086a4fb320890952f54667ee46329;hp=18dc8698e6d2b516049739b010005730722384a0;hpb=2d3172e90b9f059548bf5dfcf4f85ed71672aac7;p=palacios.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index 18dc869..ed5140f 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -34,6 +34,7 @@ #include #include #include +#include #ifdef V3_CONFIG_CHECKPOINT #include @@ -52,7 +53,7 @@ /* These fields contain the hardware feature sets supported by the local CPU */ static struct vmx_hw_info hw_info; -extern v3_cpu_arch_t v3_cpu_types[]; +extern v3_cpu_arch_t v3_mach_type; static addr_t host_vmcs_ptrs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0}; @@ -91,11 +92,17 @@ static int inline check_vmcs_read(vmcs_field_t field, void * val) { static addr_t allocate_vmcs() { + void *temp; struct vmcs_data * vmcs_page = NULL; PrintDebug("Allocating page\n"); - vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1)); + temp = V3_AllocPages(1); + if (!temp) { + PrintError("Cannot allocate VMCS\n"); + return -1; + } + vmcs_page = (struct vmcs_data *)V3_VAddr(temp); memset(vmcs_page, 0, 4096); vmcs_page->revision = hw_info.basic_info.revision; @@ -104,13 +111,15 @@ static addr_t allocate_vmcs() { return (addr_t)V3_PAddr((void *)vmcs_page); } -/* +#if 0 static int debug_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * src, void * priv_data) { struct v3_msr * efer = (struct v3_msr *)&(core->ctrl_regs.efer); - V3_Print("\n\nEFER READ\n"); + V3_Print("\n\nEFER READ (val = %p)\n", (void *)efer->value); v3_print_guest_state(core); + v3_print_vmcs(); + src->value = efer->value; return 0; @@ -118,25 +127,16 @@ static int debug_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * static int debug_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { struct v3_msr * efer = (struct v3_msr *)&(core->ctrl_regs.efer); - V3_Print("\n\nEFER WRITE\n"); + V3_Print("\n\nEFER WRITE (old_val = %p) (new_val = %p)\n", (void *)efer->value, (void *)src.value); v3_print_guest_state(core); + v3_print_vmcs(); efer->value = src.value; - { - struct vmx_data * vmx_state = core->vmm_data; - - V3_Print("Trapping page faults and GPFs\n"); - vmx_state->excp_bmap.pf = 1; - vmx_state->excp_bmap.gp = 1; - - check_vmcs_write(VMCS_EXCP_BITMAP, vmx_state->excp_bmap.value); - } - return 0; } -*/ +#endif static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) { @@ -170,8 +170,8 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) vmx_state->sec_proc_ctrls.value = hw_info.sec_proc_ctrls.def_val; /* Print Control MSRs */ - PrintDebug("CR0 MSR: %p\n", (void *)(addr_t)hw_info.cr0.value); - PrintDebug("CR4 MSR: %p\n", (void *)(addr_t)hw_info.cr4.value); + V3_Print("CR0 MSR: req_val=%p, req_mask=%p\n", (void *)(addr_t)hw_info.cr0.req_val, (void *)(addr_t)hw_info.cr0.req_mask); + V3_Print("CR4 MSR: req_val=%p, req_mask=%p\n", (void *)(addr_t)hw_info.cr4.req_val, (void *)(addr_t)hw_info.cr4.req_mask); @@ -234,7 +234,7 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) vmx_state->entry_ctrls.ld_pat = 1; /* Temporary GPF trap */ - // vmx_state->excp_bmap.gp = 1; + // vmx_state->excp_bmap.gp = 1; // Setup Guests initial PAT field vmx_ret |= check_vmcs_write(VMCS_GUEST_PAT, 0x0007040600070406LL); @@ -251,7 +251,8 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) #define CR0_PE 0x00000001 #define CR0_PG 0x80000000 #define CR0_WP 0x00010000 // To ensure mem hooks work - vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG | CR0_WP)); +#define CR0_NE 0x00000020 + vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG | CR0_WP | CR0_NE)); // Cause VM_EXIT whenever CR4.VMXE or CR4.PAE bits are written @@ -280,12 +281,13 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) core); } else if ((core->shdw_pg_mode == NESTED_PAGING) && - (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_CPU)) { + (v3_mach_type == V3_VMX_EPT_CPU)) { #define CR0_PE 0x00000001 #define CR0_PG 0x80000000 #define CR0_WP 0x00010000 // To ensure mem hooks work - vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG | CR0_WP)); +#define CR0_NE 0x00000020 + vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG | CR0_WP | CR0_NE)); // vmx_state->pinbased_ctrls |= NMI_EXIT; @@ -319,7 +321,7 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) v3_hook_msr(core->vm_info, EFER_MSR, NULL, NULL, NULL); } else if ((core->shdw_pg_mode == NESTED_PAGING) && - (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_UG_CPU)) { + (v3_mach_type == V3_VMX_EPT_UG_CPU)) { int i = 0; // For now we will assume that unrestricted guest mode is assured w/ EPT @@ -328,7 +330,7 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) core->rip = 0xfff0; core->vm_regs.rdx = 0x00000f00; core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1 - core->ctrl_regs.cr0 = 0x00000030; + core->ctrl_regs.cr0 = 0x60010030; core->ctrl_regs.cr4 = 0x00002010; // Enable VMX and PSE flag @@ -402,7 +404,9 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) // Cause VM_EXIT whenever the CR4.VMXE bit is set vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE); - +#define CR0_NE 0x00000020 + vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, CR0_NE); + ((struct cr0_32 *)&(core->shdw_pg_state.guest_cr0))->ne = 1; if (v3_init_ept(core, &hw_info) == -1) { PrintError("Error initializing EPT\n"); @@ -410,10 +414,10 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) } // Hook all accesses to EFER register - //v3_hook_msr(core->vm_info, EFER_MSR, &debug_efer_read, &debug_efer_write, core); + // v3_hook_msr(core->vm_info, EFER_MSR, &debug_efer_read, &debug_efer_write, core); v3_hook_msr(core->vm_info, EFER_MSR, NULL, NULL, NULL); } else { - PrintError("Invalid Virtual paging mode\n"); + PrintError("Invalid Virtual paging mode (pg_mode=%d) (mach_type=%d)\n", core->shdw_pg_mode, v3_mach_type); return -1; } @@ -542,11 +546,19 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) return 0; } -int v3_init_vmx_vmcs(struct guest_info * core, v3_vm_class_t vm_class) { + +static void __init_vmx_vmcs(void * arg) { + struct guest_info * core = arg; struct vmx_data * vmx_state = NULL; int vmx_ret = 0; vmx_state = (struct vmx_data *)V3_Malloc(sizeof(struct vmx_data)); + + if (!vmx_state) { + PrintError("Unable to allocate in initializing vmx vmcs\n"); + return; + } + memset(vmx_state, 0, sizeof(struct vmx_data)); PrintDebug("vmx_data pointer: %p\n", (void *)vmx_state); @@ -568,23 +580,57 @@ int v3_init_vmx_vmcs(struct guest_info * core, v3_vm_class_t vm_class) { if (vmx_ret != VMX_SUCCESS) { PrintError("VMCLEAR failed\n"); - return -1; + return; } - if (vm_class == V3_PC_VM) { + if (core->vm_info->vm_class == V3_PC_VM) { PrintDebug("Initializing VMCS\n"); if (init_vmcs_bios(core, vmx_state) == -1) { PrintError("Error initializing VMCS to BIOS state\n"); - return -1; + return; } } else { PrintError("Invalid VM Class\n"); - return -1; + return; } PrintDebug("Serializing VMCS: %p\n", (void *)vmx_state->vmcs_ptr_phys); vmx_ret = vmcs_clear(vmx_state->vmcs_ptr_phys); + core->core_run_state = CORE_STOPPED; + return; +} + + + +int v3_init_vmx_vmcs(struct guest_info * core, v3_vm_class_t vm_class) { + extern v3_cpu_arch_t v3_cpu_types[]; + + if (v3_cpu_types[V3_Get_CPU()] == V3_INVALID_CPU) { + int i = 0; + + for (i = 0; i < V3_CONFIG_MAX_CPUS; i++) { + if (v3_cpu_types[i] != V3_INVALID_CPU) { + break; + } + } + + if (i == V3_CONFIG_MAX_CPUS) { + PrintError("Could not find VALID CPU for VMX guest initialization\n"); + return -1; + } + + V3_Call_On_CPU(i, __init_vmx_vmcs, core); + + } else { + __init_vmx_vmcs(core); + } + + if (core->core_run_state != CORE_STOPPED) { + PrintError("Error initializing VMX Core\n"); + return -1; + } + return 0; } @@ -607,9 +653,14 @@ int v3_deinit_vmx_vmcs(struct guest_info * core) { * JRL: This is broken */ int v3_vmx_save_core(struct guest_info * core, void * ctx){ - uint64_t vmcs_ptr = vmcs_store(); + struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); - v3_chkpt_save(ctx, "vmcs_data", PAGE_SIZE, (void *)vmcs_ptr); + // note that the vmcs pointer is an HPA, but we need an HVA + if (v3_chkpt_save(ctx, "vmcs_data", PAGE_SIZE_4KB, + V3_VAddr((void*) (vmx_info->vmcs_ptr_phys))) ==-1) { + PrintError("Could not save vmcs data for VMX\n"); + return -1; + } return 0; } @@ -617,12 +668,27 @@ int v3_vmx_save_core(struct guest_info * core, void * ctx){ int v3_vmx_load_core(struct guest_info * core, void * ctx){ struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); struct cr0_32 * shadow_cr0; - char vmcs[PAGE_SIZE_4KB]; + addr_t vmcs_page_paddr; //HPA + + vmcs_page_paddr = (addr_t) V3_AllocPages(1); + + if (!vmcs_page_paddr) { + PrintError("Could not allocate space for a vmcs in VMX\n"); + return -1; + } - v3_chkpt_load(ctx, "vmcs_data", PAGE_SIZE_4KB, vmcs); + if (v3_chkpt_load(ctx, "vmcs_data", PAGE_SIZE_4KB, + V3_VAddr((void *)vmcs_page_paddr)) == -1) { + PrintError("Could not load vmcs data for VMX\n"); + return -1; + } vmcs_clear(vmx_info->vmcs_ptr_phys); - vmcs_load((addr_t)vmcs); + + // Probably need to delete the old one... + V3_FreePages((void*)(vmx_info->vmcs_ptr_phys),1); + + vmcs_load(vmcs_page_paddr); v3_vmx_save_vmcs(core); @@ -853,7 +919,11 @@ v3_vmx_config_tsc_virtualization(struct guest_info * info) { check_vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value); } - tsc_offset = v3_tsc_host_offset(&info->time_state); + if (info->time_state.flags & VM_TIME_TSC_PASSTHROUGH) { + tsc_offset = 0; + } else { + tsc_offset = v3_tsc_host_offset(&info->time_state); + } tsc_offset_high = (uint32_t)(( tsc_offset >> 32) & 0xffffffff); tsc_offset_low = (uint32_t)(tsc_offset & 0xffffffff); @@ -878,7 +948,7 @@ int v3_vmx_enter(struct guest_info * info) { uint64_t guest_cycles = 0; // Conditionally yield the CPU if the timeslice has expired - v3_yield_cond(info); + v3_yield_cond(info,-1); // Update timer devices late after being in the VM so that as much // of the time in the VM is accounted for as possible. Also do it before @@ -1020,7 +1090,7 @@ int v3_vmx_enter(struct guest_info * info) { update_irq_exit_state(info); #endif - if (exit_info.exit_reason == VMEXIT_INTR_WINDOW) { + if (exit_info.exit_reason == VMX_EXIT_INTR_WINDOW) { // This is a special case whose only job is to inject an interrupt vmcs_read(VMCS_PROC_CTRLS, &(vmx_info->pri_proc_ctrls.value)); vmx_info->pri_proc_ctrls.int_wndw_exit = 0; @@ -1035,7 +1105,7 @@ int v3_vmx_enter(struct guest_info * info) { v3_enable_ints(); // Conditionally yield the CPU if the timeslice has expired - v3_yield_cond(info); + v3_yield_cond(info,-1); v3_advance_time(info, NULL); v3_update_timers(info); @@ -1070,7 +1140,7 @@ int v3_start_vmx_guest(struct guest_info * info) { return 0; } - v3_yield(info); + v3_yield(info,-1); //PrintDebug("VMX core %u: still waiting for INIT\n",info->vcpu_id); } @@ -1187,7 +1257,7 @@ int v3_reset_vmx_vm_core(struct guest_info * core, addr_t rip) { // init vmcs bios if ((core->shdw_pg_mode == NESTED_PAGING) && - (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_UG_CPU)) { + (v3_mach_type == V3_VMX_EPT_UG_CPU)) { // easy core->rip = 0; core->segments.cs.selector = rip << 8; @@ -1206,6 +1276,7 @@ int v3_reset_vmx_vm_core(struct guest_info * core, addr_t rip) { void v3_init_vmx_cpu(int cpu_id) { addr_t vmx_on_region = 0; extern v3_cpu_arch_t v3_mach_type; + extern v3_cpu_arch_t v3_cpu_types[]; if (v3_mach_type == V3_INVALID_CPU) { if (v3_init_vmx_hw(&hw_info) == -1) {