X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=90f8e52c219e5aa5aa9467af9c7b728b6efff70c;hb=88648ddca6003a438826e7d86e28a2ba7b5bfcac;hp=20c0c5f9ac3e56f6abe648cde0047f5c677ed3e6;hpb=a7b07dc7f3bd9c28b0fbfb3c685a306326d56e76;p=palacios.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index 20c0c5f..90f8e52 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -31,6 +31,12 @@ #include #include #include +#include +#include + +#ifdef V3_CONFIG_CHECKPOINT +#include +#endif #include #include @@ -130,53 +136,6 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) /******* Setup Host State **********/ /* Cache GDTR, IDTR, and TR in host struct */ - addr_t gdtr_base; - struct { - uint16_t selector; - addr_t base; - } __attribute__((packed)) tmp_seg; - - - __asm__ __volatile__( - "sgdt (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - gdtr_base = tmp_seg.base; - vmx_state->host_state.gdtr.base = gdtr_base; - - __asm__ __volatile__( - "sidt (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - vmx_state->host_state.idtr.base = tmp_seg.base; - - __asm__ __volatile__( - "str (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - vmx_state->host_state.tr.selector = tmp_seg.selector; - - /* The GDTR *index* is bits 3-15 of the selector. */ - struct tss_descriptor * desc = NULL; - desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3))); - - tmp_seg.base = ((desc->base1) | - (desc->base2 << 16) | - (desc->base3 << 24) | -#ifdef __V3_64BIT__ - ((uint64_t)desc->base4 << 32) -#else - (0) -#endif - ); - - vmx_state->host_state.tr.base = tmp_seg.base; /********** Setup VMX Control Fields ***********/ @@ -207,10 +166,6 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) - - - - #ifdef __V3_64BIT__ // Ensure host runs in 64-bit mode at each VM EXIT vmx_state->exit_ctrls.host_64_on = 1; @@ -394,19 +349,10 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area { -#define IA32_STAR 0xc0000081 -#define IA32_LSTAR 0xc0000082 -#define IA32_FMASK 0xc0000084 -#define IA32_KERN_GS_BASE 0xc0000102 - -#define IA32_CSTAR 0xc0000083 // Compatibility mode STAR (ignored for now... hopefully its not that important...) - - int msr_ret = 0; - struct vmcs_msr_entry * exit_store_msrs = NULL; - struct vmcs_msr_entry * exit_load_msrs = NULL; - struct vmcs_msr_entry * entry_load_msrs = NULL;; + struct vmcs_msr_save_area * msr_entries = NULL; int max_msrs = (hw_info.misc_info.max_msr_cache_size + 1) * 4; + int msr_ret = 0; V3_Print("Setting up MSR load/store areas (max_msr_count=%d)\n", max_msrs); @@ -415,40 +361,60 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) return -1; } - vmx_state->msr_area = V3_VAddr(V3_AllocPages(1)); - - if (vmx_state->msr_area == NULL) { + vmx_state->msr_area_paddr = (addr_t)V3_AllocPages(1); + + if (vmx_state->msr_area_paddr == (addr_t)NULL) { PrintError("could not allocate msr load/store area\n"); return -1; } + msr_entries = (struct vmcs_msr_save_area *)V3_VAddr((void *)(vmx_state->msr_area_paddr)); + vmx_state->msr_area = msr_entries; // cache in vmx_info + + memset(msr_entries, 0, PAGE_SIZE); + + msr_entries->guest_star.index = IA32_STAR_MSR; + msr_entries->guest_lstar.index = IA32_LSTAR_MSR; + msr_entries->guest_fmask.index = IA32_FMASK_MSR; + msr_entries->guest_kern_gs.index = IA32_KERN_GS_BASE_MSR; + + msr_entries->host_star.index = IA32_STAR_MSR; + msr_entries->host_lstar.index = IA32_LSTAR_MSR; + msr_entries->host_fmask.index = IA32_FMASK_MSR; + msr_entries->host_kern_gs.index = IA32_KERN_GS_BASE_MSR; + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_STORE_CNT, 4); msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_LOAD_CNT, 4); msr_ret |= check_vmcs_write(VMCS_ENTRY_MSR_LOAD_CNT, 4); - - - exit_store_msrs = (struct vmcs_msr_entry *)(vmx_state->msr_area); - exit_load_msrs = (struct vmcs_msr_entry *)(vmx_state->msr_area + (sizeof(struct vmcs_msr_entry) * 4)); - entry_load_msrs = (struct vmcs_msr_entry *)(vmx_state->msr_area + (sizeof(struct vmcs_msr_entry) * 8)); + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_STORE_ADDR, (addr_t)V3_PAddr(msr_entries->guest_msrs)); + msr_ret |= check_vmcs_write(VMCS_ENTRY_MSR_LOAD_ADDR, (addr_t)V3_PAddr(msr_entries->guest_msrs)); + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_LOAD_ADDR, (addr_t)V3_PAddr(msr_entries->host_msrs)); - exit_store_msrs[0].index = IA32_STAR; - exit_store_msrs[1].index = IA32_LSTAR; - exit_store_msrs[2].index = IA32_FMASK; - exit_store_msrs[3].index = IA32_KERN_GS_BASE; - - memcpy(exit_store_msrs, exit_load_msrs, sizeof(struct vmcs_msr_entry) * 4); - memcpy(exit_store_msrs, entry_load_msrs, sizeof(struct vmcs_msr_entry) * 4); - - v3_get_msr(IA32_STAR, &(exit_load_msrs[0].hi), &(exit_load_msrs[0].lo)); - v3_get_msr(IA32_LSTAR, &(exit_load_msrs[1].hi), &(exit_load_msrs[1].lo)); - v3_get_msr(IA32_FMASK, &(exit_load_msrs[2].hi), &(exit_load_msrs[2].lo)); - v3_get_msr(IA32_KERN_GS_BASE, &(exit_load_msrs[3].hi), &(exit_load_msrs[3].lo)); + msr_ret |= v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL); + + + // IMPORTANT: These MSRs appear to be cached by the hardware.... + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL); + + msr_ret |= v3_hook_msr(core->vm_info, FS_BASE_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, GS_BASE_MSR, NULL, NULL, NULL); + + + // Not sure what to do about this... Does not appear to be an explicit hardware cache version... + msr_ret |= v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL); + + if (msr_ret != 0) { + PrintError("Error configuring MSR save/restore area\n"); + return -1; + } - msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_STORE_ADDR, (addr_t)V3_PAddr(exit_store_msrs)); - msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_LOAD_ADDR, (addr_t)V3_PAddr(exit_load_msrs)); - msr_ret |= check_vmcs_write(VMCS_ENTRY_MSR_LOAD_ADDR, (addr_t)V3_PAddr(entry_load_msrs)); } @@ -485,10 +451,12 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) return -1; } + /* if (v3_update_vmcs_host_state(core)) { PrintError("Could not write host state\n"); return -1; } + */ // reenable global interrupts for vm state initialization now // that the vm state is initialized. If another VM kicks us off, @@ -549,7 +517,7 @@ int v3_deinit_vmx_vmcs(struct guest_info * core) { struct vmx_data * vmx_state = core->vmm_data; V3_FreePages((void *)(vmx_state->vmcs_ptr_phys), 1); - V3_FreePages(vmx_state->msr_area, 1); + V3_FreePages(V3_PAddr(vmx_state->msr_area), 1); V3_Free(vmx_state); @@ -557,6 +525,63 @@ int v3_deinit_vmx_vmcs(struct guest_info * core) { } + +#ifdef V3_CONFIG_CHECKPOINT +/* + * JRL: This is broken + */ +int v3_vmx_save_core(struct guest_info * core, void * ctx){ + uint64_t vmcs_ptr = vmcs_store(); + + v3_chkpt_save(ctx, "vmcs_data", PAGE_SIZE, (void *)vmcs_ptr); + + return 0; +} + +int v3_vmx_load_core(struct guest_info * core, void * ctx){ + struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); + struct cr0_32 * shadow_cr0; + char vmcs[PAGE_SIZE_4KB]; + + v3_chkpt_load(ctx, "vmcs_data", PAGE_SIZE_4KB, vmcs); + + vmcs_clear(vmx_info->vmcs_ptr_phys); + vmcs_load((addr_t)vmcs); + + v3_vmx_save_vmcs(core); + + shadow_cr0 = (struct cr0_32 *)&(core->ctrl_regs.cr0); + + + /* Get the CPU mode to set the guest_ia32e entry ctrl */ + + if (core->shdw_pg_mode == SHADOW_PAGING) { + if (v3_get_vm_mem_mode(core) == VIRTUAL_MEM) { + if (v3_activate_shadow_pt(core) == -1) { + PrintError("Failed to activate shadow page tables\n"); + return -1; + } + } else { + if (v3_activate_passthrough_pt(core) == -1) { + PrintError("Failed to activate passthrough page tables\n"); + return -1; + } + } + } + + return 0; +} +#endif + + +void v3_flush_vmx_vm_core(struct guest_info * core) { + struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); + vmcs_clear(vmx_info->vmcs_ptr_phys); + vmx_info->state = VMX_UNLAUNCHED; +} + + + static int update_irq_exit_state(struct guest_info * info) { struct vmx_exit_idt_vec_info idt_vec_info; @@ -758,7 +783,9 @@ int v3_vmx_enter(struct guest_info * info) { v3_update_timers(info); if (vmcs_store() != vmx_info->vmcs_ptr_phys) { + vmcs_clear(vmx_info->vmcs_ptr_phys); vmcs_load(vmx_info->vmcs_ptr_phys); + vmx_info->state = VMX_UNLAUNCHED; } v3_vmx_restore_vmcs(info); @@ -795,26 +822,28 @@ int v3_vmx_enter(struct guest_info * info) { if (vmx_info->state == VMX_UNLAUNCHED) { vmx_info->state = VMX_LAUNCHED; - info->vm_info->run_state = VM_RUNNING; ret = v3_vmx_launch(&(info->vm_regs), info, &(info->ctrl_regs)); } else { V3_ASSERT(vmx_info->state != VMX_UNLAUNCHED); ret = v3_vmx_resume(&(info->vm_regs), info, &(info->ctrl_regs)); } + + // PrintDebug("VMX Exit: ret=%d\n", ret); if (ret != VMX_SUCCESS) { uint32_t error = 0; - vmcs_read(VMCS_INSTR_ERR, &error); v3_enable_ints(); - PrintError("VMENTRY Error: %d\n", error); + PrintError("VMENTRY Error: %d (launch_ret = %d)\n", error, ret); return -1; } + + // Immediate exit from VM time bookkeeping v3_time_exit_vm(info); @@ -871,7 +900,7 @@ int v3_vmx_enter(struct guest_info * info) { v3_yield_cond(info); if (v3_handle_vmx_exit(info, &exit_info) == -1) { - PrintError("Error in VMX exit handler\n"); + PrintError("Error in VMX exit handler (Exit reason=%x)\n", exit_info.exit_reason); return -1; } @@ -885,17 +914,25 @@ int v3_start_vmx_guest(struct guest_info * info) { if (info->vcpu_id == 0) { info->core_run_state = CORE_RUNNING; - info->vm_info->run_state = VM_RUNNING; } else { PrintDebug("VMX core %u: Waiting for core initialization\n", info->vcpu_id); while (info->core_run_state == CORE_STOPPED) { + + if (info->vm_info->run_state == VM_STOPPED) { + // The VM was stopped before this core was initialized. + return 0; + } + v3_yield(info); //PrintDebug("VMX core %u: still waiting for INIT\n",info->vcpu_id); } PrintDebug("VMX core %u initialized\n", info->vcpu_id); + + // We'll be paranoid about race conditions here + v3_wait_at_barrier(info); } @@ -916,11 +953,40 @@ int v3_start_vmx_guest(struct guest_info * info) { } if (v3_vmx_enter(info) == -1) { + + addr_t host_addr; + addr_t linear_addr = 0; + + info->vm_info->run_state = VM_ERROR; + + V3_Print("VMX core %u: VMX ERROR!!\n", info->vcpu_id); + + v3_print_guest_state(info); + + V3_Print("VMX core %u\n", info->vcpu_id); + + linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs)); + + if (info->mem_mode == PHYSICAL_MEM) { + v3_gpa_to_hva(info, linear_addr, &host_addr); + } else if (info->mem_mode == VIRTUAL_MEM) { + v3_gva_to_hva(info, linear_addr, &host_addr); + } + + V3_Print("VMX core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr); + + V3_Print("VMX core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr); + v3_dump_mem((uint8_t *)host_addr, 15); + + v3_print_stack(info); + + v3_print_vmcs(); print_exit_log(info); return -1; } + v3_wait_at_barrier(info); if (info->vm_info->run_state == VM_STOPPED) { @@ -993,6 +1059,7 @@ int v3_reset_vmx_vm_core(struct guest_info * core, addr_t rip) { void v3_init_vmx_cpu(int cpu_id) { + addr_t vmx_on_region = 0; if (cpu_id == 0) { if (v3_init_vmx_hw(&hw_info) == -1) { @@ -1005,17 +1072,18 @@ void v3_init_vmx_cpu(int cpu_id) { // Setup VMXON Region - host_vmcs_ptrs[cpu_id] = allocate_vmcs(); + vmx_on_region = allocate_vmcs(); - PrintDebug("VMXON pointer: 0x%p\n", (void *)host_vmcs_ptrs[cpu_id]); - if (vmx_on(host_vmcs_ptrs[cpu_id]) == VMX_SUCCESS) { + if (vmx_on(vmx_on_region) == VMX_SUCCESS) { V3_Print("VMX Enabled\n"); + host_vmcs_ptrs[cpu_id] = vmx_on_region; } else { - PrintError("VMX initialization failure\n"); - return; + V3_Print("VMX already enabled\n"); + V3_FreePages((void *)vmx_on_region, 1); } - + + PrintDebug("VMXON pointer: 0x%p\n", (void *)host_vmcs_ptrs[cpu_id]); { struct vmx_sec_proc_ctrls sec_proc_ctrls; @@ -1038,5 +1106,16 @@ void v3_init_vmx_cpu(int cpu_id) { void v3_deinit_vmx_cpu(int cpu_id) { extern v3_cpu_arch_t v3_cpu_types[]; v3_cpu_types[cpu_id] = V3_INVALID_CPU; - V3_FreePages((void *)host_vmcs_ptrs[cpu_id], 1); + + if (host_vmcs_ptrs[cpu_id] != 0) { + V3_Print("Disabling VMX\n"); + + if (vmx_off() != VMX_SUCCESS) { + PrintError("Error executing VMXOFF\n"); + } + + V3_FreePages((void *)host_vmcs_ptrs[cpu_id], 1); + + host_vmcs_ptrs[cpu_id] = 0; + } }