X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=87dfac0e57d31ac0bb8451a26e08543a415c7ce8;hb=a2b48dd0c4f8ccfa633139bc2b9aa4ddf59eda5c;hp=a525e8735f28c2d5cfe87f8a317c1c06dc0dc2c0;hpb=fcc9962fe5d3b877f8f25de8745d0d4d1eaf394e;p=palacios.releases.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index a525e87..87dfac0 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -31,12 +31,19 @@ #include #include #include +#include +#include +#include + +#ifdef V3_CONFIG_CHECKPOINT +#include +#endif #include #include #include -#ifndef CONFIG_DEBUG_VMX +#ifndef V3_CONFIG_DEBUG_VMX #undef PrintDebug #define PrintDebug(fmt, args...) #endif @@ -47,8 +54,7 @@ static struct vmx_hw_info hw_info; extern v3_cpu_arch_t v3_cpu_types[]; -static addr_t active_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0}; -static addr_t host_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0}; +static addr_t host_vmcs_ptrs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0}; extern int v3_vmx_launch(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs); extern int v3_vmx_resume(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs); @@ -63,6 +69,9 @@ static int inline check_vmcs_write(vmcs_field_t field, addr_t val) { return 1; } + + + return 0; } @@ -95,18 +104,55 @@ static addr_t allocate_vmcs() { return (addr_t)V3_PAddr((void *)vmcs_page); } +/* + +static int debug_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * src, void * priv_data) { + struct v3_msr * efer = (struct v3_msr *)&(core->ctrl_regs.efer); + V3_Print("\n\nEFER READ\n"); + + v3_print_guest_state(core); + + src->value = efer->value; + return 0; +} + +static int debug_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { + struct v3_msr * efer = (struct v3_msr *)&(core->ctrl_regs.efer); + V3_Print("\n\nEFER WRITE\n"); + + v3_print_guest_state(core); + + efer->value = src.value; + + { + struct vmx_data * vmx_state = core->vmm_data; + + V3_Print("Trapping page faults and GPFs\n"); + vmx_state->excp_bmap.pf = 1; + vmx_state->excp_bmap.gp = 1; + + check_vmcs_write(VMCS_EXCP_BITMAP, vmx_state->excp_bmap.value); + } + return 0; +} +*/ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) { int vmx_ret = 0; + /* Get Available features */ + struct vmx_pin_ctrls avail_pin_ctrls; + avail_pin_ctrls.value = v3_vmx_get_ctrl_features(&(hw_info.pin_ctrls)); + /* ** */ + + // disable global interrupts for vm state initialization v3_disable_ints(); PrintDebug("Loading VMCS\n"); vmx_ret = vmcs_load(vmx_state->vmcs_ptr_phys); - active_vmcs_ptrs[V3_Get_CPU()] = vmx_state->vmcs_ptr_phys; vmx_state->state = VMX_UNLAUNCHED; if (vmx_ret != VMX_SUCCESS) { @@ -132,53 +178,6 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) /******* Setup Host State **********/ /* Cache GDTR, IDTR, and TR in host struct */ - addr_t gdtr_base; - struct { - uint16_t selector; - addr_t base; - } __attribute__((packed)) tmp_seg; - - - __asm__ __volatile__( - "sgdt (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - gdtr_base = tmp_seg.base; - vmx_state->host_state.gdtr.base = gdtr_base; - - __asm__ __volatile__( - "sidt (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - vmx_state->host_state.idtr.base = tmp_seg.base; - - __asm__ __volatile__( - "str (%0);" - : - : "q"(&tmp_seg) - : "memory" - ); - vmx_state->host_state.tr.selector = tmp_seg.selector; - - /* The GDTR *index* is bits 3-15 of the selector. */ - struct tss_descriptor * desc = NULL; - desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3))); - - tmp_seg.base = ((desc->base1) | - (desc->base2 << 16) | - (desc->base3 << 24) | -#ifdef __V3_64BIT__ - ((uint64_t)desc->base4 << 32) -#else - (0) -#endif - ); - - vmx_state->host_state.tr.base = tmp_seg.base; /********** Setup VMX Control Fields ***********/ @@ -188,12 +187,19 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) vmx_state->pin_ctrls.ext_int_exit = 1; + /* We enable the preemption timer by default to measure accurate guest time */ + if (avail_pin_ctrls.active_preempt_timer) { + V3_Print("VMX Preemption Timer is available\n"); + vmx_state->pin_ctrls.active_preempt_timer = 1; + vmx_state->exit_ctrls.save_preempt_timer = 1; + } + vmx_state->pri_proc_ctrls.hlt_exit = 1; - vmx_state->pri_proc_ctrls.invlpg_exit = 1; - vmx_state->pri_proc_ctrls.pause_exit = 1; + + vmx_state->pri_proc_ctrls.pause_exit = 0; vmx_state->pri_proc_ctrls.tsc_offset = 1; -#ifdef CONFIG_TIME_VIRTUALIZE_TSC +#ifdef V3_CONFIG_TIME_VIRTUALIZE_TSC vmx_state->pri_proc_ctrls.rdtsc_exit = 1; #endif @@ -209,23 +215,29 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) - #ifdef __V3_64BIT__ + // Ensure host runs in 64-bit mode at each VM EXIT vmx_state->exit_ctrls.host_64_on = 1; #endif - /* Not sure how exactly to handle this... */ - v3_hook_msr(core->vm_info, EFER_MSR, - &v3_handle_efer_read, - &v3_handle_efer_write, - core); + // Restore host's EFER register on each VM EXIT + vmx_state->exit_ctrls.ld_efer = 1; + // Save/restore guest's EFER register to/from VMCS on VM EXIT/ENTRY + vmx_state->exit_ctrls.save_efer = 1; + vmx_state->entry_ctrls.ld_efer = 1; - vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE); + vmx_state->exit_ctrls.save_pat = 1; + vmx_state->exit_ctrls.ld_pat = 1; + vmx_state->entry_ctrls.ld_pat = 1; + /* Temporary GPF trap */ + // vmx_state->excp_bmap.gp = 1; + // Setup Guests initial PAT field + vmx_ret |= check_vmcs_write(VMCS_GUEST_PAT, 0x0007040600070406LL); /* Setup paging */ if (core->shdw_pg_mode == SHADOW_PAGING) { @@ -241,6 +253,10 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) #define CR0_WP 0x00010000 // To ensure mem hooks work vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG | CR0_WP)); + + // Cause VM_EXIT whenever CR4.VMXE or CR4.PAE bits are written + vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE | CR4_PAE); + core->ctrl_regs.cr3 = core->direct_map_pt; // vmx_state->pinbased_ctrls |= NMI_EXIT; @@ -249,16 +265,22 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) vmx_state->pri_proc_ctrls.cr3_ld_exit = 1; vmx_state->pri_proc_ctrls.cr3_str_exit = 1; + vmx_state->pri_proc_ctrls.invlpg_exit = 1; + /* Add page fault exits */ vmx_state->excp_bmap.pf = 1; // Setup VMX Assist v3_vmxassist_init(core, vmx_state); - } else if ((core->shdw_pg_mode == NESTED_PAGING) && - (v3_cpu_types[core->cpu_id] == V3_VMX_EPT_CPU)) { + // Hook all accesses to EFER register + v3_hook_msr(core->vm_info, EFER_MSR, + &v3_handle_efer_read, + &v3_handle_efer_write, + core); - // initialize 1to1 pts + } else if ((core->shdw_pg_mode == NESTED_PAGING) && + (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_CPU)) { #define CR0_PE 0x00000001 #define CR0_PG 0x80000000 @@ -267,12 +289,17 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) // vmx_state->pinbased_ctrls |= NMI_EXIT; - /* Add CR exits */ - //vmx_state->pri_proc_ctrls.cr3_ld_exit = 1; - //vmx_state->pri_proc_ctrls.cr3_str_exit = 1; + // Cause VM_EXIT whenever CR4.VMXE or CR4.PAE bits are written + vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE | CR4_PAE); + + /* Disable CR exits */ + vmx_state->pri_proc_ctrls.cr3_ld_exit = 0; + vmx_state->pri_proc_ctrls.cr3_str_exit = 0; + + vmx_state->pri_proc_ctrls.invlpg_exit = 0; /* Add page fault exits */ - vmx_state->excp_bmap.pf = 1; // This should never happen..., enabled to catch bugs + // vmx_state->excp_bmap.pf = 1; // This should never happen..., enabled to catch bugs // Setup VMX Assist v3_vmxassist_init(core, vmx_state); @@ -280,29 +307,30 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) /* Enable EPT */ vmx_state->pri_proc_ctrls.sec_ctrls = 1; // Enable secondary proc controls vmx_state->sec_proc_ctrls.enable_ept = 1; // enable EPT paging - // vmx_state->sec_proc_ctrls.unrstrct_guest = 1; // enable unrestricted guest operation - vmx_state->entry_ctrls.ld_efer = 1; - vmx_state->exit_ctrls.ld_efer = 1; - vmx_state->exit_ctrls.save_efer = 1; + if (v3_init_ept(core, &hw_info) == -1) { PrintError("Error initializing EPT\n"); return -1; } + // Hook all accesses to EFER register + v3_hook_msr(core->vm_info, EFER_MSR, NULL, NULL, NULL); } else if ((core->shdw_pg_mode == NESTED_PAGING) && - (v3_cpu_types[core->cpu_id] == V3_VMX_EPT_UG_CPU)) { + (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_UG_CPU)) { int i = 0; // For now we will assume that unrestricted guest mode is assured w/ EPT + core->vm_regs.rsp = 0x00; core->rip = 0xfff0; core->vm_regs.rdx = 0x00000f00; core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1 - core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode - + core->ctrl_regs.cr0 = 0x00000030; + core->ctrl_regs.cr4 = 0x00002010; // Enable VMX and PSE flag + core->segments.cs.selector = 0xf000; core->segments.cs.limit = 0xffff; @@ -347,7 +375,7 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) core->segments.ldtr.selector = 0x0000; core->segments.ldtr.limit = 0x0000ffff; core->segments.ldtr.base = 0x0000000000000000LL; - core->segments.ldtr.type = 2; + core->segments.ldtr.type = 0x2; core->segments.ldtr.present = 1; core->segments.tr.selector = 0x0000; @@ -364,9 +392,16 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) vmx_state->sec_proc_ctrls.enable_ept = 1; // enable EPT paging vmx_state->sec_proc_ctrls.unrstrct_guest = 1; // enable unrestricted guest operation - vmx_state->entry_ctrls.ld_efer = 1; - vmx_state->exit_ctrls.ld_efer = 1; - vmx_state->exit_ctrls.save_efer = 1; + + /* Disable shadow paging stuff */ + vmx_state->pri_proc_ctrls.cr3_ld_exit = 0; + vmx_state->pri_proc_ctrls.cr3_str_exit = 0; + + vmx_state->pri_proc_ctrls.invlpg_exit = 0; + + + // Cause VM_EXIT whenever the CR4.VMXE bit is set + vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE); if (v3_init_ept(core, &hw_info) == -1) { @@ -374,16 +409,90 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) return -1; } + // Hook all accesses to EFER register + //v3_hook_msr(core->vm_info, EFER_MSR, &debug_efer_read, &debug_efer_write, core); + v3_hook_msr(core->vm_info, EFER_MSR, NULL, NULL, NULL); } else { PrintError("Invalid Virtual paging mode\n"); return -1; } - // Hook the VMX msrs + // hook vmx msrs // Setup SYSCALL/SYSENTER MSRs in load/store area + + // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area + { + + struct vmcs_msr_save_area * msr_entries = NULL; + int max_msrs = (hw_info.misc_info.max_msr_cache_size + 1) * 4; + int msr_ret = 0; + + V3_Print("Setting up MSR load/store areas (max_msr_count=%d)\n", max_msrs); + + if (max_msrs < 4) { + PrintError("Max MSR cache size is too small (%d)\n", max_msrs); + return -1; + } + + vmx_state->msr_area_paddr = (addr_t)V3_AllocPages(1); + + if (vmx_state->msr_area_paddr == (addr_t)NULL) { + PrintError("could not allocate msr load/store area\n"); + return -1; + } + + msr_entries = (struct vmcs_msr_save_area *)V3_VAddr((void *)(vmx_state->msr_area_paddr)); + vmx_state->msr_area = msr_entries; // cache in vmx_info + + memset(msr_entries, 0, PAGE_SIZE); + + msr_entries->guest_star.index = IA32_STAR_MSR; + msr_entries->guest_lstar.index = IA32_LSTAR_MSR; + msr_entries->guest_fmask.index = IA32_FMASK_MSR; + msr_entries->guest_kern_gs.index = IA32_KERN_GS_BASE_MSR; + + msr_entries->host_star.index = IA32_STAR_MSR; + msr_entries->host_lstar.index = IA32_LSTAR_MSR; + msr_entries->host_fmask.index = IA32_FMASK_MSR; + msr_entries->host_kern_gs.index = IA32_KERN_GS_BASE_MSR; + + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_STORE_CNT, 4); + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_LOAD_CNT, 4); + msr_ret |= check_vmcs_write(VMCS_ENTRY_MSR_LOAD_CNT, 4); + + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_STORE_ADDR, (addr_t)V3_PAddr(msr_entries->guest_msrs)); + msr_ret |= check_vmcs_write(VMCS_ENTRY_MSR_LOAD_ADDR, (addr_t)V3_PAddr(msr_entries->guest_msrs)); + msr_ret |= check_vmcs_write(VMCS_EXIT_MSR_LOAD_ADDR, (addr_t)V3_PAddr(msr_entries->host_msrs)); + + + msr_ret |= v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL); + + + // IMPORTANT: These MSRs appear to be cached by the hardware.... + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, FS_BASE_MSR, NULL, NULL, NULL); + msr_ret |= v3_hook_msr(core->vm_info, GS_BASE_MSR, NULL, NULL, NULL); + + msr_ret |= v3_hook_msr(core->vm_info, IA32_PAT_MSR, NULL, NULL, NULL); + + // Not sure what to do about this... Does not appear to be an explicit hardware cache version... + msr_ret |= v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL); + + if (msr_ret != 0) { + PrintError("Error configuring MSR save/restore area\n"); + return -1; + } + + + } /* Sanity check ctrl/reg fields against hw_defaults */ @@ -418,10 +527,12 @@ static int init_vmcs_bios(struct guest_info * core, struct vmx_data * vmx_state) return -1; } + /* if (v3_update_vmcs_host_state(core)) { PrintError("Could not write host state\n"); return -1; } + */ // reenable global interrupts for vm state initialization now // that the vm state is initialized. If another VM kicks us off, @@ -462,12 +573,18 @@ int v3_init_vmx_vmcs(struct guest_info * core, v3_vm_class_t vm_class) { if (vm_class == V3_PC_VM) { PrintDebug("Initializing VMCS\n"); - init_vmcs_bios(core, vmx_state); + if (init_vmcs_bios(core, vmx_state) == -1) { + PrintError("Error initializing VMCS to BIOS state\n"); + return -1; + } } else { PrintError("Invalid VM Class\n"); return -1; } + PrintDebug("Serializing VMCS: %p\n", (void *)vmx_state->vmcs_ptr_phys); + vmx_ret = vmcs_clear(vmx_state->vmcs_ptr_phys); + return 0; } @@ -476,6 +593,7 @@ int v3_deinit_vmx_vmcs(struct guest_info * core) { struct vmx_data * vmx_state = core->vmm_data; V3_FreePages((void *)(vmx_state->vmcs_ptr_phys), 1); + V3_FreePages(V3_PAddr(vmx_state->msr_area), 1); V3_Free(vmx_state); @@ -483,14 +601,71 @@ int v3_deinit_vmx_vmcs(struct guest_info * core) { } + +#ifdef V3_CONFIG_CHECKPOINT +/* + * JRL: This is broken + */ +int v3_vmx_save_core(struct guest_info * core, void * ctx){ + uint64_t vmcs_ptr = vmcs_store(); + + v3_chkpt_save(ctx, "vmcs_data", PAGE_SIZE, (void *)vmcs_ptr); + + return 0; +} + +int v3_vmx_load_core(struct guest_info * core, void * ctx){ + struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); + struct cr0_32 * shadow_cr0; + char vmcs[PAGE_SIZE_4KB]; + + v3_chkpt_load(ctx, "vmcs_data", PAGE_SIZE_4KB, vmcs); + + vmcs_clear(vmx_info->vmcs_ptr_phys); + vmcs_load((addr_t)vmcs); + + v3_vmx_save_vmcs(core); + + shadow_cr0 = (struct cr0_32 *)&(core->ctrl_regs.cr0); + + + /* Get the CPU mode to set the guest_ia32e entry ctrl */ + + if (core->shdw_pg_mode == SHADOW_PAGING) { + if (v3_get_vm_mem_mode(core) == VIRTUAL_MEM) { + if (v3_activate_shadow_pt(core) == -1) { + PrintError("Failed to activate shadow page tables\n"); + return -1; + } + } else { + if (v3_activate_passthrough_pt(core) == -1) { + PrintError("Failed to activate passthrough page tables\n"); + return -1; + } + } + } + + return 0; +} +#endif + + +void v3_flush_vmx_vm_core(struct guest_info * core) { + struct vmx_data * vmx_info = (struct vmx_data *)(core->vmm_data); + vmcs_clear(vmx_info->vmcs_ptr_phys); + vmx_info->state = VMX_UNLAUNCHED; +} + + + static int update_irq_exit_state(struct guest_info * info) { struct vmx_exit_idt_vec_info idt_vec_info; check_vmcs_read(VMCS_IDT_VECTOR_INFO, &(idt_vec_info.value)); if ((info->intr_core_state.irq_started == 1) && (idt_vec_info.valid == 0)) { -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Calling v3_injecting_intr\n"); +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Calling v3_injecting_intr\n"); #endif info->intr_core_state.irq_started = 0; v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ); @@ -521,15 +696,15 @@ static int update_irq_entry_state(struct guest_info * info) { check_vmcs_write(VMCS_ENTRY_EXCP_ERR, info->excp_state.excp_error_code); int_info.error_code = 1; -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Injecting exception %d with error code %x\n", +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Injecting exception %d with error code %x\n", int_info.vector, info->excp_state.excp_error_code); #endif } int_info.valid = 1; -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Injecting exception %d (EIP=%p)\n", int_info.vector, (void *)(addr_t)info->rip); +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Injecting exception %d (EIP=%p)\n", int_info.vector, (void *)(addr_t)info->rip); #endif check_vmcs_write(VMCS_ENTRY_INT_INFO, int_info.value); @@ -540,8 +715,8 @@ static int update_irq_entry_state(struct guest_info * info) { if ((info->intr_core_state.irq_started == 1) && (idt_vec_info.valid == 1)) { -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("IRQ pending from previous injection\n"); +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("IRQ pending from previous injection\n"); #endif // Copy the IDT vectoring info over to reinject the old interrupt @@ -567,8 +742,8 @@ static int update_irq_entry_state(struct guest_info * info) { ent_int.error_code = 0; ent_int.valid = 1; -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Injecting Interrupt %d at exit %u(EIP=%p)\n", +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Injecting Interrupt %d at exit %u(EIP=%p)\n", info->intr_core_state.irq_vector, (uint32_t)info->num_exits, (void *)(addr_t)info->rip); @@ -612,8 +787,8 @@ static int update_irq_entry_state(struct guest_info * info) { check_vmcs_read(VMCS_EXIT_INSTR_LEN, &instr_len); -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Enabling Interrupt-Window exiting: %d\n", instr_len); +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Enabling Interrupt-Window exiting: %d\n", instr_len); #endif vmx_info->pri_proc_ctrls.int_wndw_exit = 1; @@ -627,6 +802,9 @@ static int update_irq_entry_state(struct guest_info * info) { static struct vmx_exit_info exit_log[10]; +static uint64_t rip_log[10]; + + static void print_exit_log(struct guest_info * info) { int cnt = info->num_exits % 10; @@ -643,6 +821,9 @@ static void print_exit_log(struct guest_info * info) { V3_Print("\tint_info = %p\n", (void *)(addr_t)tmp->int_info); V3_Print("\tint_err = %p\n", (void *)(addr_t)tmp->int_err); V3_Print("\tinstr_info = %p\n", (void *)(addr_t)tmp->instr_info); + V3_Print("\tguest_linear_addr= %p\n", (void *)(addr_t)tmp->guest_linear_addr); + V3_Print("\tRIP = %p\n", (void *)rip_log[cnt]); + cnt--; @@ -654,6 +835,34 @@ static void print_exit_log(struct guest_info * info) { } +int +v3_vmx_config_tsc_virtualization(struct guest_info * info) { + struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); + + if (info->time_state.time_flags & V3_TIME_TRAP_RDTSC) { + if (!vmx_info->pri_proc_ctrls.rdtsc_exit) { + vmx_info->pri_proc_ctrls.rdtsc_exit = 1; + check_vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value); + } + } else { + sint64_t tsc_offset; + uint32_t tsc_offset_low, tsc_offset_high; + + if (vmx_info->pri_proc_ctrls.rdtsc_exit) { + vmx_info->pri_proc_ctrls.rdtsc_exit = 0; + check_vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value); + } + + tsc_offset = v3_tsc_host_offset(&info->time_state); + tsc_offset_high = (uint32_t)(( tsc_offset >> 32) & 0xffffffff); + tsc_offset_low = (uint32_t)(tsc_offset & 0xffffffff); + + check_vmcs_write(VMCS_TSC_OFFSET_HIGH, tsc_offset_high); + check_vmcs_write(VMCS_TSC_OFFSET, tsc_offset_low); + } + return 0; +} + /* * CAUTION and DANGER!!! * @@ -664,33 +873,33 @@ static void print_exit_log(struct guest_info * info) { */ int v3_vmx_enter(struct guest_info * info) { int ret = 0; - uint32_t tsc_offset_low, tsc_offset_high; struct vmx_exit_info exit_info; struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); + uint64_t guest_cycles = 0; // Conditionally yield the CPU if the timeslice has expired v3_yield_cond(info); - // Perform any additional yielding needed for time adjustment - v3_adjust_time(info); - - // Update timer devices prior to entering VM. - v3_update_timers(info); - // disable global interrupts for vm state transition v3_disable_ints(); + // Update timer devices late after being in the VM so that as much + // of the time in the VM is accounted for as possible. Also do it before + // updating IRQ entry state so that any interrupts the timers raise get + // handled on the next VM entry. Must be done with interrupts disabled. + v3_advance_time(info); + v3_update_timers(info); - if (active_vmcs_ptrs[V3_Get_CPU()] != vmx_info->vmcs_ptr_phys) { + if (vmcs_store() != vmx_info->vmcs_ptr_phys) { + vmcs_clear(vmx_info->vmcs_ptr_phys); vmcs_load(vmx_info->vmcs_ptr_phys); - active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys; + vmx_info->state = VMX_UNLAUNCHED; } - v3_vmx_restore_vmcs(info); -#ifdef CONFIG_SYMCALL +#ifdef V3_CONFIG_SYMCALL if (info->sym_core_state.symcall_state.sym_call_active == 0) { update_irq_entry_state(info); } @@ -704,40 +913,82 @@ int v3_vmx_enter(struct guest_info * info) { vmcs_write(VMCS_GUEST_CR3, guest_cr3); } + // Perform last-minute time bookkeeping prior to entering the VM v3_time_enter_vm(info); + v3_vmx_config_tsc_virtualization(info); - tsc_offset_high = (uint32_t)((v3_tsc_host_offset(&info->time_state) >> 32) & 0xffffffff); - tsc_offset_low = (uint32_t)(v3_tsc_host_offset(&info->time_state) & 0xffffffff); - check_vmcs_write(VMCS_TSC_OFFSET_HIGH, tsc_offset_high); - check_vmcs_write(VMCS_TSC_OFFSET, tsc_offset_low); - + - if (vmx_info->state == VMX_UNLAUNCHED) { - vmx_info->state = VMX_LAUNCHED; - info->vm_info->run_state = VM_RUNNING; - ret = v3_vmx_launch(&(info->vm_regs), info, &(info->ctrl_regs)); - } else { - V3_ASSERT(vmx_info->state != VMX_UNLAUNCHED); - ret = v3_vmx_resume(&(info->vm_regs), info, &(info->ctrl_regs)); + if (v3_update_vmcs_host_state(info)) { + v3_enable_ints(); + PrintError("Could not write host state\n"); + return -1; } + if (vmx_info->pin_ctrls.active_preempt_timer) { + /* Preemption timer is active */ + uint32_t preempt_window = 0xffffffff; + + if (info->timeouts.timeout_active) { + preempt_window = info->timeouts.next_timeout; + } + + check_vmcs_write(VMCS_PREEMPT_TIMER, preempt_window); + } + + + { + uint64_t entry_tsc = 0; + uint64_t exit_tsc = 0; + + if (vmx_info->state == VMX_UNLAUNCHED) { + vmx_info->state = VMX_LAUNCHED; + rdtscll(entry_tsc); + ret = v3_vmx_launch(&(info->vm_regs), info, &(info->ctrl_regs)); + rdtscll(exit_tsc); + + } else { + V3_ASSERT(vmx_info->state != VMX_UNLAUNCHED); + rdtscll(entry_tsc); + ret = v3_vmx_resume(&(info->vm_regs), info, &(info->ctrl_regs)); + rdtscll(exit_tsc); + } + + guest_cycles = exit_tsc - entry_tsc; + } + // PrintDebug("VMX Exit: ret=%d\n", ret); if (ret != VMX_SUCCESS) { uint32_t error = 0; - vmcs_read(VMCS_INSTR_ERR, &error); - PrintError("VMENTRY Error: %d\n", error); + v3_enable_ints(); + + PrintError("VMENTRY Error: %d (launch_ret = %d)\n", error, ret); return -1; } - // Immediate exit from VM time bookkeeping - v3_time_exit_vm(info); info->num_exits++; + /* If we have the preemption time, then use it to get more accurate guest time */ + if (vmx_info->pin_ctrls.active_preempt_timer) { + uint32_t cycles_left = 0; + check_vmcs_read(VMCS_PREEMPT_TIMER, &(cycles_left)); + + if (info->timeouts.timeout_active) { + guest_cycles = info->timeouts.next_timeout - cycles_left; + } else { + guest_cycles = 0xffffffff - cycles_left; + } + } + + // Immediate exit from VM time bookkeeping + v3_time_exit_vm(info, &guest_cycles); + + /* Update guest state */ v3_vmx_save_vmcs(info); @@ -747,6 +998,7 @@ int v3_vmx_enter(struct guest_info * info) { info->cpu_mode = v3_get_vm_cpu_mode(info); + check_vmcs_read(VMCS_EXIT_INSTR_LEN, &(exit_info.instr_len)); check_vmcs_read(VMCS_EXIT_INSTR_INFO, &(exit_info.instr_info)); check_vmcs_read(VMCS_EXIT_REASON, &(exit_info.exit_reason)); @@ -762,9 +1014,9 @@ int v3_vmx_enter(struct guest_info * info) { //PrintDebug("VMX Exit taken, id-qual: %u-%lu\n", exit_info.exit_reason, exit_info.exit_qual); exit_log[info->num_exits % 10] = exit_info; + rip_log[info->num_exits % 10] = get_addr_linear(info, info->rip, &(info->segments.cs)); - -#ifdef CONFIG_SYMCALL +#ifdef V3_CONFIG_SYMCALL if (info->sym_core_state.symcall_state.sym_call_active == 0) { update_irq_exit_state(info); } @@ -778,8 +1030,8 @@ int v3_vmx_enter(struct guest_info * info) { vmx_info->pri_proc_ctrls.int_wndw_exit = 0; vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value); -#ifdef CONFIG_DEBUG_INTERRUPTS - PrintDebug("Interrupts available again! (RIP=%llx)\n", info->rip); +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + V3_Print("Interrupts available again! (RIP=%llx)\n", info->rip); #endif } @@ -790,40 +1042,53 @@ int v3_vmx_enter(struct guest_info * info) { v3_yield_cond(info); if (v3_handle_vmx_exit(info, &exit_info) == -1) { - PrintError("Error in VMX exit handler\n"); + PrintError("Error in VMX exit handler (Exit reason=%x)\n", exit_info.exit_reason); return -1; } + if (info->timeouts.timeout_active) { + /* Check to see if any timeouts have expired */ + v3_handle_timeouts(info, guest_cycles); + } + return 0; } int v3_start_vmx_guest(struct guest_info * info) { - PrintDebug("Starting VMX core %u\n", info->cpu_id); + PrintDebug("Starting VMX core %u\n", info->vcpu_id); - if (info->cpu_id == 0) { + if (info->vcpu_id == 0) { info->core_run_state = CORE_RUNNING; - info->vm_info->run_state = VM_RUNNING; } else { - PrintDebug("VMX core %u: Waiting for core initialization\n", info->cpu_id); + PrintDebug("VMX core %u: Waiting for core initialization\n", info->vcpu_id); while (info->core_run_state == CORE_STOPPED) { + + if (info->vm_info->run_state == VM_STOPPED) { + // The VM was stopped before this core was initialized. + return 0; + } + v3_yield(info); - //PrintDebug("VMX core %u: still waiting for INIT\n",info->cpu_id); + //PrintDebug("VMX core %u: still waiting for INIT\n",info->vcpu_id); } - PrintDebug("VMX core %u initialized\n", info->cpu_id); + PrintDebug("VMX core %u initialized\n", info->vcpu_id); + + // We'll be paranoid about race conditions here + v3_wait_at_barrier(info); } PrintDebug("VMX core %u: I am starting at CS=0x%x (base=0x%p, limit=0x%x), RIP=0x%p\n", - info->cpu_id, info->segments.cs.selector, (void *)(info->segments.cs.base), + info->vcpu_id, info->segments.cs.selector, (void *)(info->segments.cs.base), info->segments.cs.limit, (void *)(info->rip)); - PrintDebug("VMX core %u: Launching VMX VM\n", info->cpu_id); + PrintDebug("VMX core %u: Launching VMX VM on logical core %u\n", info->vcpu_id, info->pcpu_id); v3_start_time(info); @@ -835,11 +1100,40 @@ int v3_start_vmx_guest(struct guest_info * info) { } if (v3_vmx_enter(info) == -1) { + + addr_t host_addr; + addr_t linear_addr = 0; + + info->vm_info->run_state = VM_ERROR; + + V3_Print("VMX core %u: VMX ERROR!!\n", info->vcpu_id); + + v3_print_guest_state(info); + + V3_Print("VMX core %u\n", info->vcpu_id); + + linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs)); + + if (info->mem_mode == PHYSICAL_MEM) { + v3_gpa_to_hva(info, linear_addr, &host_addr); + } else if (info->mem_mode == VIRTUAL_MEM) { + v3_gva_to_hva(info, linear_addr, &host_addr); + } + + V3_Print("VMX core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr); + + V3_Print("VMX core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr); + v3_dump_mem((uint8_t *)host_addr, 15); + + v3_print_stack(info); + + v3_print_vmcs(); print_exit_log(info); return -1; } + v3_wait_at_barrier(info); if (info->vm_info->run_state == VM_STOPPED) { @@ -891,13 +1185,31 @@ int v3_is_vmx_capable() { } +int v3_reset_vmx_vm_core(struct guest_info * core, addr_t rip) { + // init vmcs bios + + if ((core->shdw_pg_mode == NESTED_PAGING) && + (v3_cpu_types[core->pcpu_id] == V3_VMX_EPT_UG_CPU)) { + // easy + core->rip = 0; + core->segments.cs.selector = rip << 8; + core->segments.cs.limit = 0xffff; + core->segments.cs.base = rip << 12; + } else { + core->vm_regs.rdx = core->vcpu_id; + core->vm_regs.rbx = rip; + } + return 0; +} void v3_init_vmx_cpu(int cpu_id) { + addr_t vmx_on_region = 0; + extern v3_cpu_arch_t v3_mach_type; - if (cpu_id == 0) { + if (v3_mach_type == V3_INVALID_CPU) { if (v3_init_vmx_hw(&hw_info) == -1) { PrintError("Could not initialize VMX hardware features on cpu %d\n", cpu_id); return; @@ -908,17 +1220,18 @@ void v3_init_vmx_cpu(int cpu_id) { // Setup VMXON Region - host_vmcs_ptrs[cpu_id] = allocate_vmcs(); + vmx_on_region = allocate_vmcs(); - PrintDebug("VMXON pointer: 0x%p\n", (void *)host_vmcs_ptrs[cpu_id]); - if (vmx_on(host_vmcs_ptrs[cpu_id]) == VMX_SUCCESS) { - PrintDebug("VMX Enabled\n"); + if (vmx_on(vmx_on_region) == VMX_SUCCESS) { + V3_Print("VMX Enabled\n"); + host_vmcs_ptrs[cpu_id] = vmx_on_region; } else { - PrintError("VMX initialization failure\n"); - return; + V3_Print("VMX already enabled\n"); + V3_FreePages((void *)vmx_on_region, 1); } - + + PrintDebug("VMXON pointer: 0x%p\n", (void *)host_vmcs_ptrs[cpu_id]); { struct vmx_sec_proc_ctrls sec_proc_ctrls; @@ -935,11 +1248,23 @@ void v3_init_vmx_cpu(int cpu_id) { v3_cpu_types[cpu_id] = V3_VMX_EPT_UG_CPU; } } + } void v3_deinit_vmx_cpu(int cpu_id) { extern v3_cpu_arch_t v3_cpu_types[]; v3_cpu_types[cpu_id] = V3_INVALID_CPU; - V3_FreePages((void *)host_vmcs_ptrs[cpu_id], 1); + + if (host_vmcs_ptrs[cpu_id] != 0) { + V3_Print("Disabling VMX\n"); + + if (vmx_off() != VMX_SUCCESS) { + PrintError("Error executing VMXOFF\n"); + } + + V3_FreePages((void *)host_vmcs_ptrs[cpu_id], 1); + + host_vmcs_ptrs[cpu_id] = 0; + } }