X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=841f5dc29896db98be0c92a67be99a3ba23f3399;hb=a1d3e2f36e9ef64ca62c611c4f0aa050726e186b;hp=0395b6ef53d0272177630f9b4e737225700ad51e;hpb=1316eb77b6d89245583446dab3345f749c415764;p=palacios.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index 0395b6e..841f5dc 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -23,6 +23,10 @@ #include #include #include +#include +#include +#include +#include // @@ -31,10 +35,11 @@ // // - +#if 0 #include #include +#include @@ -50,7 +55,6 @@ extern int Launch_VM(ullong_t vmcsPtr, uint_t eip); #define ROMBIOS_DEBUG_PORT 0x403 -static struct VM theVM; static uint_t GetLinearIP(struct VM * vm) { if (vm->state == VM_VMXASSIST_V8086_BIOS || vm->state == VM_VMXASSIST_V8086) { @@ -66,22 +70,17 @@ static uint_t GetLinearIP(struct VM * vm) { #define MAX_CODE 512 #define INSTR_OFFSET_START 17 #define NOP_SEQ_LEN 10 -#define INSTR_OFFSET_END (INSTR_OFFSET_START+NOP_SEQ_LEN-1) +#define INSTR_OFFSET_END (INSTR_OFFSET_START + NOP_SEQ_LEN - 1) #define TEMPLATE_CODE_LEN 35 -uint_t oldesp=0; -uint_t myregs=0; - +uint_t oldesp = 0; +uint_t myregs = 0; -extern uint_t VMCS_CLEAR(); -extern uint_t VMCS_LOAD(); -extern uint_t VMCS_STORE(); extern uint_t VMCS_LAUNCH(); -extern uint_t VMCS_RESUME(); extern uint_t Init_VMCS_HostState(); extern uint_t Init_VMCS_GuestState(); @@ -123,60 +122,6 @@ void DecodeCurrentInstruction(struct VM *vm, struct Instruction *inst) } -static void V8086ModeSegmentRegisterFixup(struct VM *vm) -{ - vm->vmcs.guestStateArea.cs.baseAddr = vm->vmcs.guestStateArea.cs.selector << 4; - vm->vmcs.guestStateArea.es.baseAddr = vm->vmcs.guestStateArea.es.selector << 4; - vm->vmcs.guestStateArea.ss.baseAddr = vm->vmcs.guestStateArea.ss.selector << 4; - vm->vmcs.guestStateArea.ds.baseAddr = vm->vmcs.guestStateArea.ds.selector << 4; - vm->vmcs.guestStateArea.fs.baseAddr = vm->vmcs.guestStateArea.fs.selector << 4; - vm->vmcs.guestStateArea.gs.baseAddr = vm->vmcs.guestStateArea.gs.selector << 4; -} - -static void SetupV8086ModeForBoot(struct VM *vm) -{ - vm->state = VM_VMXASSIST_V8086_BIOS; - - // Put guest into V8086 mode on return - vm->vmcs.guestStateArea.rflags |= EFLAGS_VM | EFLAGS_IOPL_HI | EFLAGS_IOPL_LO ; - - // We will start at f000:fff0 on return - // - // We want this to look as much as possible as a processor - // reset - vm->vmcs.guestStateArea.rip = 0xfff0; // note, 16 bit rip - vm->vmcs.guestStateArea.cs.selector = 0xf000; - vm->vmcs.guestStateArea.cs.limit = 0xffff; - vm->vmcs.guestStateArea.cs.access.as_dword = 0xf3; - - vm->vmcs.guestStateArea.ss.selector = 0x0000; - vm->vmcs.guestStateArea.ss.limit = 0xffff; - vm->vmcs.guestStateArea.ss.access.as_dword = 0xf3; - - vm->vmcs.guestStateArea.ds.selector = 0x0000; - vm->vmcs.guestStateArea.ds.limit = 0xffff; - vm->vmcs.guestStateArea.ds.access.as_dword = 0xf3; - - vm->vmcs.guestStateArea.es.selector = 0x0000; - vm->vmcs.guestStateArea.es.limit = 0xffff; - vm->vmcs.guestStateArea.es.access.as_dword = 0xf3; - - vm->vmcs.guestStateArea.fs.selector = 0x0000; - vm->vmcs.guestStateArea.fs.limit = 0xffff; - vm->vmcs.guestStateArea.fs.access.as_dword = 0xf3; - - vm->vmcs.guestStateArea.gs.selector = 0x0000; - vm->vmcs.guestStateArea.gs.limit = 0xffff; - vm->vmcs.guestStateArea.gs.access.as_dword = 0xf3; - - V8086ModeSegmentRegisterFixup(vm); - - PrintTrace_VMCSData(&(vm->vmcs)); - -} - - - static void ConfigureExits(struct VM *vm) { @@ -229,7 +174,7 @@ int MyLaunch(struct VM *vm) PrintTrace("Guest ESP: 0x%x (%u)\n", guest_esp, guest_esp); - exit_eip=(uint_t)RunVMM; + exit_eip = (uint_t)RunVMM; PrintTrace("Clear\n"); VMCS_CLEAR(vmcs); @@ -275,13 +220,14 @@ int MyLaunch(struct VM *vm) /* Guest state */ PrintTrace("Setting up guest state\n"); PrintTrace("GUEST_RIP: %x (%u)\n", entry_eip, entry_eip); - VMCS_WRITE(GUEST_RIP,&entry_eip); + VMCS_WRITE(GUEST_RIP, &entry_eip); SetCRBitsCorrectly(IA32_VMX_CR0_FIXED0_MSR, IA32_VMX_CR0_FIXED1_MSR, GUEST_CR0); SetCRBitsCorrectly(IA32_VMX_CR4_FIXED0_MSR, IA32_VMX_CR4_FIXED1_MSR, GUEST_CR4); ret = Init_VMCS_GuestState(); PrintTrace("InitGuestState returned\n"); + if (ret != VMX_SUCCESS) { if (ret == VMX_FAIL_VALID) { PrintTrace("Init Guest state: VMCS FAILED WITH ERROR\n"); @@ -291,11 +237,11 @@ int MyLaunch(struct VM *vm) return ret; } PrintTrace("GUEST_RSP: %x (%u)\n", guest_esp, (uint_t)guest_esp); - VMCS_WRITE(GUEST_RSP,&guest_esp); + VMCS_WRITE(GUEST_RSP, &guest_esp); // tmpReg = 0x4100; tmpReg = 0xffffffff; - if (VMCS_WRITE(EXCEPTION_BITMAP,&tmpReg ) != VMX_SUCCESS) { + if (VMCS_WRITE(EXCEPTION_BITMAP, &tmpReg) != VMX_SUCCESS) { PrintInfo("Bitmap error\n"); } @@ -342,7 +288,153 @@ int VMLaunch(struct VMDescriptor *vm) // // +#endif + +static int update_vmcs_host_state(struct guest_info * info) { + addr_t tmp; + + struct { + uint16_t limit; + addr_t base; + } __attribute__((packed)) tmp_seg; + + + struct v3_msr tmp_msr; + + __asm__ __volatile__ ( "movq %%cr0, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_CR0, tmp); + + + __asm__ __volatile__ ( "movq %%cr3, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_CR3, tmp); + + + __asm__ __volatile__ ( "movq %%cr4, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_CR4, tmp); + + + + + __asm__ __volatile__ ("sgdt (%0); " + : + :"q"(&tmp_seg) + : "memory" + ); + vmcs_write(VMCS_HOST_GDTR_BASE, tmp_seg.base); + + + __asm__ __volatile__ ("sidt (%0); " + : + :"q"(&tmp_seg) + : "memory" + ); + vmcs_write(VMCS_HOST_IDTR_BASE, tmp_seg.base); + + /* How do we handle this...? + __asm__ __volatile__ ("str (%0); " + : + :"q"(&tmp_seg) + : "memory" + ); + vmcs_write(VMCS_HOST_TR_BASE, tmp_seg.base); + */ + +#define FS_BASE_MSR 0xc0000100 +#define GS_BASE_MSR 0xc0000101 + + // FS.BASE MSR + v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value); + + // GS.BASE MSR + v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value); + + + + __asm__ __volatile__ ( "movq %%cs, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_CS_SELECTOR, tmp); + + __asm__ __volatile__ ( "movq %%ss, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_SS_SELECTOR, tmp); + + __asm__ __volatile__ ( "movq %%ds, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_DS_SELECTOR, tmp); + + __asm__ __volatile__ ( "movq %%es, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_ES_SELECTOR, tmp); + + __asm__ __volatile__ ( "movq %%fs, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_FS_SELECTOR, tmp); + + __asm__ __volatile__ ( "movq %%gs, %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_GS_SELECTOR, tmp); + + __asm__ __volatile__ ( "str %0; " + : "=q"(tmp) + : + ); + vmcs_write(VMCS_HOST_TR_SELECTOR, tmp); + + +#define SYSENTER_CS_MSR 0x00000174 +#define SYSENTER_ESP_MSR 0x00000175 +#define SYSENTER_EIP_MSR 0x00000176 + + // SYSENTER CS MSR + v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.value); + + // SYSENTER_ESP MSR + v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value); + + // SYSENTER_EIP MSR + v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value); + + // RIP + // RSP + + return 0; +} + + + + + +static addr_t vmxon_ptr_phys; + + +#if 0 // For the 32 bit reserved bit fields // MB1s are in the low 32 bits, MBZs are in the high 32 bits of the MSR static uint32_t sanitize_bits1(uint32_t msr_num, uint32_t val) { @@ -352,7 +444,7 @@ static uint32_t sanitize_bits1(uint32_t msr_num, uint32_t val) { v3_get_msr(msr_num, &mask_msr.hi, &mask_msr.lo); - PrintDebug("MSR %x = %x : %x \n", msr_num, msr.hi, msr.lo); + PrintDebug("MSR %x = %x : %x \n", msr_num, mask_msr.hi, mask_msr.lo); val &= mask_msr.lo; val &= mask_msr.hi; @@ -361,6 +453,7 @@ static uint32_t sanitize_bits1(uint32_t msr_num, uint32_t val) { } + static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) { v3_msr_t msr0, msr1; addr_t msr0_val, msr1_val; @@ -374,7 +467,7 @@ static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) { msr0_val = msr0.value; msr1_val = msr1.value; - PrintDebug("MSR %x = %p, %x = %p \n", msr_num0, msr0_val, msr_num1, msr1_val); + PrintDebug("MSR %x = %p, %x = %p \n", msr_num0, (void*)msr0_val, msr_num1, (void*)msr1_val); val &= msr0_val; val &= msr1_val; @@ -382,151 +475,312 @@ static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) { return val; } +static int setup_base_host_state() { + + + + // vmwrite(HOST_IDTR_BASE, + + +} + +#endif -static vmcs_t * allocate_vmcs() { +static void setup_v8086_mode_for_boot(struct guest_info* vm_info) +{ + + ((struct vmx_data *)vm_info->vmm_data)->state = VMXASSIST_V8086_BIOS; + ((struct rflags *)&(vm_info->ctrl_regs.rflags))->vm = 1; + ((struct rflags *)&(vm_info->ctrl_regs.rflags))->iopl = 3; + + vm_info->rip = 0xfff0; + + vm_info->segments.cs.selector = 0xf000; + vm_info->segments.cs.base = 0xf000 << 4; + vm_info->segments.cs.limit = 0xffff; + vm_info->segments.cs.type = 3; + vm_info->segments.cs.system = 1; + vm_info->segments.cs.dpl = 3; + vm_info->segments.cs.present = 1; + vm_info->segments.cs.granularity = 0; + + int i = 0; + struct v3_segment * seg_ptr = (struct v3_segment *)&(vm_info->segments); + + /* Set values for selectors ds through ss */ + for(i = 1; i < 6 ; i++) { + seg_ptr[i].selector = 0x0000; + seg_ptr[i].base = 0x00000; + seg_ptr[i].type = 3; + seg_ptr[i].system = 1; + seg_ptr[i].dpl = 3; + seg_ptr[i].present = 1; + seg_ptr[i].granularity = 0; + } +} + + +static addr_t allocate_vmcs() +{ reg_ex_t msr; - vmcs_t * vmcs_page = (vmcs_t *)V3_VAddr(V3_AllocPages(1)); + PrintDebug("Allocating page\n"); + struct vmcs_data * vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1)); - memset(vmcb_page, 0, 4096); + + memset(vmcs_page, 0, 4096); v3_get_msr(VMX_BASIC_MSR, &(msr.e_reg.high), &(msr.e_reg.low)); - *(uint32_t *)vmcs_page = ((struct vmx_basic_msr *)msr.val)->revision; + vmcs_page->revision = ((struct vmx_basic_msr*)&msr)->revision; + PrintDebug("VMX Revision: 0x%x\n",vmcs_page->revision); - return vmcs_page; + return (addr_t)V3_PAddr((void*)vmcs_page); } -static void init_vmcs_bios(vmcs_t * vmcs, struct guest_info * vm_info) { +static void init_vmcs_bios(struct guest_info * vm_info) +{ + + setup_v8086_mode_for_boot(vm_info); + // TODO: Fix vmcs fields so they're 32-bit + } static int init_vmx_guest(struct guest_info * info, struct v3_vm_config * config_ptr) { + PrintDebug("Entering init_vmx_guest\n"); v3_pre_config_guest(info, config_ptr); + struct vmx_data* data; + + data = (struct vmx_data*)V3_Malloc(sizeof(struct vmx_data)); + PrintDebug("vmx_data pointer: %p\n",(void*)data); + PrintDebug("Allocating VMCS\n"); - info->vmm_data = (void *)allocate_vmcs(); + data->vmcs_ptr_phys = allocate_vmcs(); + PrintDebug("VMCS pointer: %p\n",(void*)data->vmcs_ptr_phys); - PrintDebug("Initializing VMCS (addr=%p)\n", (void *)info->vmm_data); - init_vmcs_bios((vmcs_t *)(info->vmm_data), info); + info->vmm_data = (void *)data; - v3_post_config_guest(info, config_ptr); + PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data); + init_vmcs_bios(info); + + // v3_post_config_guest(info, config_ptr); return 0; } +static int inline check_vmcs_write(vmcs_field_t field, addr_t val) +{ + int ret = 0; + ret = vmcs_write(field,val); + if (ret != VMX_SUCCESS) { + PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret); + return 1; + } -static int start_svm_guest(struct guest_info *info) { - return -1; + return 0; } +static void inline translate_segment_access(struct v3_segment * v3_seg, + struct vmcs_segment_access * access) +{ + access->type = v3_seg->type; + access->desc_type = v3_seg->system; + access->dpl = v3_seg->dpl; + access->present = v3_seg->present; + access->avail = v3_seg->avail; + access->long_mode = v3_seg->long_mode; + access->db = v3_seg->db; + access->granularity = v3_seg->granularity; +} +static int inline vmcs_write_guest_segments(struct guest_info* info) +{ + int ret = 0; + struct vmcs_segment_access access; + /* CS Segment */ + translate_segment_access(&(info->segments.cs), &access); + ret &= check_vmcs_write(VMCS_GUEST_CS_BASE, info->segments.cs.base); + ret &= check_vmcs_write(VMCS_GUEST_CS_SELECTOR, info->segments.cs.selector); + ret &= check_vmcs_write(VMCS_GUEST_CS_LIMIT, info->segments.cs.limit); + ret &= check_vmcs_write(VMCS_GUEST_CS_ACCESS, access.value); + /* SS Segment */ + translate_segment_access(&(info->segments.ss), &access); -int v3_is_vmx_capable() { - uint_t ret; - v3_msr_t feature_msr; - addr_t eax = 0, ebx = 0, ecx = 0, edx = 0; + ret &= check_vmcs_write(VMCS_GUEST_SS_BASE, info->segments.ss.base); + ret &= check_vmcs_write(VMCS_GUEST_SS_SELECTOR, info->segments.ss.selector); + ret &= check_vmcs_write(VMCS_GUEST_SS_LIMIT, info->segments.ss.limit); + ret &= check_vmcs_write(VMCS_GUEST_SS_ACCESS, access.value); - v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx); + /* DS Segment */ + translate_segment_access(&(info->segments.ds), &access); - if (ecx & CPUID_1_ECX_VTXFLAG) { - v3_get_msr(IA32_FEATURE_CONTROL_MSR, &(feature_msr.hi), &(feature_msr.lo)); - - PrintTrace("MSRREGlow: 0x%.8x\n", feature_msr.lo); + ret &= check_vmcs_write(VMCS_GUEST_DS_BASE, info->segments.ds.base); + ret &= check_vmcs_write(VMCS_GUEST_DS_SELECTOR, info->segments.ds.selector); + ret &= check_vmcs_write(VMCS_GUEST_DS_LIMIT, info->segments.ds.limit); + ret &= check_vmcs_write(VMCS_GUEST_DS_ACCESS, access.value); - if ((feature_msr.lo & FEATURE_CONTROL_VALID) != FEATURE_CONTROL_VALID) { - PrintDebug("VMX is locked -- enable in the BIOS\n"); - return 0; - } - } else { - PrintDebug("VMX not supported on this cpu\n"); - return 0; - } + /* ES Segment */ + translate_segment_access(&(info->segments.es), &access); - return 1; + ret &= check_vmcs_write(VMCS_GUEST_ES_BASE, info->segments.es.base); + ret &= check_vmcs_write(VMCS_GUEST_ES_SELECTOR, info->segments.es.selector); + ret &= check_vmcs_write(VMCS_GUEST_ES_LIMIT, info->segments.es.limit); + ret &= check_vmcs_write(VMCS_GUEST_ES_ACCESS, access.value); + + /* FS Segment */ + translate_segment_access(&(info->segments.fs), &access); + ret &= check_vmcs_write(VMCS_GUEST_FS_BASE, info->segments.fs.base); + ret &= check_vmcs_write(VMCS_GUEST_FS_SELECTOR, info->segments.fs.selector); + ret &= check_vmcs_write(VMCS_GUEST_FS_LIMIT, info->segments.fs.limit); + ret &= check_vmcs_write(VMCS_GUEST_FS_ACCESS, access.value); + + /* GS Segment */ + translate_segment_access(&(info->segments.gs), &access); + + ret &= check_vmcs_write(VMCS_GUEST_GS_BASE, info->segments.gs.base); + ret &= check_vmcs_write(VMCS_GUEST_GS_SELECTOR, info->segments.gs.selector); + ret &= check_vmcs_write(VMCS_GUEST_GS_LIMIT, info->segments.gs.limit); + ret &= check_vmcs_write(VMCS_GUEST_GS_ACCESS, access.value); + + return ret; } -static int has_vmx_nested_paging() { - return 0; +static int start_vmx_guest(struct guest_info* info) { + struct vmx_data * vmx_data = (struct vmx_data *)info->vmm_data; + int vmx_ret; + + // Have to do a whole lot of flag setting here + PrintDebug("Clearing VMCS\n"); + vmx_ret = vmcs_clear(vmx_data->vmcs_ptr_phys); + + if (vmx_ret != VMX_SUCCESS) { + PrintError("VMCLEAR failed\n"); + return -1; + } + + PrintDebug("Loading VMCS\n"); + vmx_ret = vmcs_load(vmx_data->vmcs_ptr_phys); + + if (vmx_ret != VMX_SUCCESS) { + PrintError("VMPTRLD failed\n"); + return -1; + } + + + update_vmcs_host_state(info); + + // Setup guest state + // TODO: This is not 32-bit safe! + vmx_ret &= check_vmcs_write(VMCS_GUEST_RIP, info->rip); + + vmx_ret &= vmcs_write_guest_segments(info); + + if (vmx_ret != 0) { + PrintError("Could not initialize VMCS segments\n"); + return -1; + } + + v3_print_vmcs_guest_state(); + + return -1; } -// We set up the global host state that is unlikely to change across processes here -// Segment Descriptors mainly -struct seg_descriptor { -}; +int v3_is_vmx_capable() { + v3_msr_t feature_msr; + addr_t eax = 0, ebx = 0, ecx = 0, edx = 0; -static int setup_base_host_state() { - uint8_t gdt[10]; - + v3_cpuid(0x1, &eax, &ebx, &ecx, &edx); + PrintDebug("ECX: %p\n", (void*)ecx); - vmwrite(HOST_IDTR_BASE, + if (ecx & CPUID_1_ECX_VTXFLAG) { + v3_get_msr(VMX_FEATURE_CONTROL_MSR, &(feature_msr.hi), &(feature_msr.lo)); + + PrintTrace("MSRREGlow: 0x%.8x\n", feature_msr.lo); + + if ((feature_msr.lo & FEATURE_CONTROL_VALID) != FEATURE_CONTROL_VALID) { + PrintDebug("VMX is locked -- enable in the BIOS\n"); + return 0; + } + } else { + PrintDebug("VMX not supported on this cpu\n"); + return 0; + } + return 1; +} + +static int has_vmx_nested_paging() { + return 0; } void v3_init_vmx(struct v3_ctrl_ops * vm_ops) { - v3_msr_t basic_msr; - - // Setup the host state save area - void * host_state = V3_AllocPages(1); + extern v3_cpu_arch_t v3_cpu_type; - v3_get_msr(VMX_BASIC_MSR, &(basic_msr.hi), &(basic_msr.lo)); - *(uint32_t *)host_state = ((struct vmx_basic_msr *)basic_msr.value)->revision; - - PrintDebug("VMX revision: 0x%p\n", host_state); - __asm__ __volatile__ ( - "movl %%cr4, %%ebx; " - "orl %%ebx, 0x00002000; " - "movl %%ebx, %%cr4" + "movq %%cr4, %%rbx; " + "orq $0x00002000,%%rbx; " + "movq %%rbx, %%cr4;" + : + : + : "%rbx" ); // Should check and return Error here.... __asm__ __volatile__ ( - "movl %%cr0, %%ebx; " - "orl %%ebx, 0x00000020; " - "movl %%ebx, %%cr0" + "movq %%cr0, %%rbx; " + "orq $0x00000020,%%rbx; " + "movq %%rbx, %%cr0;" + : + : + : "%rbx" ); + // Setup VMXON Region + vmxon_ptr_phys = allocate_vmcs(); + PrintDebug("VMXON pointer: 0x%p\n", (void*)vmxon_ptr_phys); - if (v3_enable_vmx(host_state) == 0) { - PrintDebug("VMX Enabled\n"); + if (v3_enable_vmx(vmxon_ptr_phys) == VMX_SUCCESS) { + PrintDebug("VMX Enabled\n"); } else { - PrintDebug("VMX initialization failure\n"); + PrintError("VMX initialization failure\n"); + return; } if (has_vmx_nested_paging() == 1) { - v3_cpu_type = V3_VMX_EPT_CPU; + v3_cpu_type = V3_VMX_EPT_CPU; } else { - v3_cpu_type = V3_VMX_CPU; + v3_cpu_type = V3_VMX_CPU; } // Setup the VMX specific vmm operations - vmm_ops->init_guest = &init_vmx_guest; - vmm_ops->start_guest = &start_vmx_guest; - vmm_ops->has_nested_paging = &has_vmx_nested_paging; + vm_ops->init_guest = &init_vmx_guest; + vm_ops->start_guest = &start_vmx_guest; + vm_ops->has_nested_paging = &has_vmx_nested_paging; }