X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=4f8abecfb6e24381e991e4b4a929a5455d72bad3;hb=cfcceed5890430afedcc544bd7dbb69e29dfd65a;hp=93b3c1602385f32cf017dfd261ac0516e76c08bd;hpb=f1d8183ae8c4390dfc74cb2780dd2058c569fc57;p=palacios.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index 93b3c16..4f8abec 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -21,21 +21,24 @@ #include -#include #include +#include #include #include -#include #include +#include #include +#include +#include +#include static addr_t vmxon_ptr_phys; extern int v3_vmx_exit_handler(); -extern int v3_vmx_vmlaunch(struct v3_gprs * vm_regs); +extern int v3_vmx_vmlaunch(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs); -static int inline check_vmcs_write(vmcs_field_t field, addr_t val) -{ +static int inline check_vmcs_write(vmcs_field_t field, addr_t val) { int ret = 0; + ret = vmcs_write(field,val); if (ret != VMX_SUCCESS) { @@ -46,114 +49,6 @@ static int inline check_vmcs_write(vmcs_field_t field, addr_t val) return 0; } -static int update_vmcs_host_state(struct guest_info * info) { - int vmx_ret = 0; - addr_t tmp; - struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data); - struct v3_msr tmp_msr; - - __asm__ __volatile__ ( "movq %%cr0, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp); - - - __asm__ __volatile__ ( "movq %%cr3, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp); - - - __asm__ __volatile__ ( "movq %%cr4, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp); - - - - vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, arch_data->host_state.gdtr.base); - vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base); - vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base); - -#define FS_BASE_MSR 0xc0000100 -#define GS_BASE_MSR 0xc0000101 - - // FS.BASE MSR - v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value); - - // GS.BASE MSR - v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value); - - - - __asm__ __volatile__ ( "movq %%cs, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp); - - __asm__ __volatile__ ( "movq %%ss, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp); - - __asm__ __volatile__ ( "movq %%ds, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp); - - __asm__ __volatile__ ( "movq %%es, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp); - - __asm__ __volatile__ ( "movq %%fs, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp); - - __asm__ __volatile__ ( "movq %%gs, %0; " - : "=q"(tmp) - : - ); - vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp); - - vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, arch_data->host_state.tr.selector); - - -#define SYSENTER_CS_MSR 0x00000174 -#define SYSENTER_ESP_MSR 0x00000175 -#define SYSENTER_EIP_MSR 0x00000176 - - // SYSENTER CS MSR - v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo); - - // SYSENTER_ESP MSR - v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value); - - // SYSENTER_EIP MSR - v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value); - - return vmx_ret; -} - - - - - - #if 0 // For the 32 bit reserved bit fields // MB1s are in the low 32 bits, MBZs are in the high 32 bits of the MSR @@ -195,176 +90,18 @@ static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) { return val; } -static int setup_base_host_state() { - - - - // vmwrite(HOST_IDTR_BASE, - - -} #endif -static void inline translate_segment_access(struct v3_segment * v3_seg, - struct vmcs_segment_access * access) -{ - access->type = v3_seg->type; - access->desc_type = v3_seg->system; - access->dpl = v3_seg->dpl; - access->present = v3_seg->present; - access->avail = v3_seg->avail; - access->long_mode = v3_seg->long_mode; - access->db = v3_seg->db; - access->granularity = v3_seg->granularity; -} - -static int inline vmcs_write_guest_segments(struct guest_info* info) -{ - int ret = 0; - struct vmcs_segment_access access; - - memset(&access, 0, sizeof(access)); - - /* CS Segment */ - translate_segment_access(&(info->segments.cs), &access); - - ret |= check_vmcs_write(VMCS_GUEST_CS_BASE, info->segments.cs.base); - ret |= check_vmcs_write(VMCS_GUEST_CS_SELECTOR, info->segments.cs.selector); - ret |= check_vmcs_write(VMCS_GUEST_CS_LIMIT, info->segments.cs.limit); - ret |= check_vmcs_write(VMCS_GUEST_CS_ACCESS, access.value); - - /* SS Segment */ - translate_segment_access(&(info->segments.ss), &access); - - ret |= check_vmcs_write(VMCS_GUEST_SS_BASE, info->segments.ss.base); - ret |= check_vmcs_write(VMCS_GUEST_SS_SELECTOR, info->segments.ss.selector); - ret |= check_vmcs_write(VMCS_GUEST_SS_LIMIT, info->segments.ss.limit); - ret |= check_vmcs_write(VMCS_GUEST_SS_ACCESS, access.value); - - /* DS Segment */ - translate_segment_access(&(info->segments.ds), &access); - - ret |= check_vmcs_write(VMCS_GUEST_DS_BASE, info->segments.ds.base); - ret |= check_vmcs_write(VMCS_GUEST_DS_SELECTOR, info->segments.ds.selector); - ret |= check_vmcs_write(VMCS_GUEST_DS_LIMIT, info->segments.ds.limit); - ret |= check_vmcs_write(VMCS_GUEST_DS_ACCESS, access.value); - - - /* ES Segment */ - translate_segment_access(&(info->segments.es), &access); - - ret |= check_vmcs_write(VMCS_GUEST_ES_BASE, info->segments.es.base); - ret |= check_vmcs_write(VMCS_GUEST_ES_SELECTOR, info->segments.es.selector); - ret |= check_vmcs_write(VMCS_GUEST_ES_LIMIT, info->segments.es.limit); - ret |= check_vmcs_write(VMCS_GUEST_ES_ACCESS, access.value); - - /* FS Segment */ - translate_segment_access(&(info->segments.fs), &access); - - ret |= check_vmcs_write(VMCS_GUEST_FS_BASE, info->segments.fs.base); - ret |= check_vmcs_write(VMCS_GUEST_FS_SELECTOR, info->segments.fs.selector); - ret |= check_vmcs_write(VMCS_GUEST_FS_LIMIT, info->segments.fs.limit); - ret |= check_vmcs_write(VMCS_GUEST_FS_ACCESS, access.value); - - /* GS Segment */ - translate_segment_access(&(info->segments.gs), &access); - - ret |= check_vmcs_write(VMCS_GUEST_GS_BASE, info->segments.gs.base); - ret |= check_vmcs_write(VMCS_GUEST_GS_SELECTOR, info->segments.gs.selector); - ret |= check_vmcs_write(VMCS_GUEST_GS_LIMIT, info->segments.gs.limit); - ret |= check_vmcs_write(VMCS_GUEST_GS_ACCESS, access.value); - - /* LDTR segment */ - translate_segment_access(&(info->segments.ldtr), &access); - - ret |= check_vmcs_write(VMCS_GUEST_LDTR_BASE, info->segments.ldtr.base); - ret |= check_vmcs_write(VMCS_GUEST_LDTR_SELECTOR, info->segments.ldtr.selector); - ret |= check_vmcs_write(VMCS_GUEST_LDTR_LIMIT, info->segments.ldtr.limit); - ret |= check_vmcs_write(VMCS_GUEST_LDTR_ACCESS, access.value); - - /* TR Segment */ - translate_segment_access(&(info->segments.tr), &access); - - ret |= check_vmcs_write(VMCS_GUEST_TR_BASE, info->segments.tr.base); - ret |= check_vmcs_write(VMCS_GUEST_TR_SELECTOR, info->segments.ldtr.selector); - ret |= check_vmcs_write(VMCS_GUEST_TR_LIMIT, info->segments.tr.limit); - ret |= check_vmcs_write(VMCS_GUEST_TR_ACCESS, access.value); - - /* GDTR Segment */ - - ret |= check_vmcs_write(VMCS_GUEST_GDTR_BASE, info->segments.gdtr.base); - ret |= check_vmcs_write(VMCS_GUEST_GDTR_LIMIT, info->segments.gdtr.limit); - - /* IDTR Segment*/ - ret |= check_vmcs_write(VMCS_GUEST_IDTR_BASE, info->segments.idtr.base); - ret |= check_vmcs_write(VMCS_GUEST_IDTR_LIMIT, info->segments.idtr.limit); - - return ret; -} - -static void setup_v8086_mode_for_boot(struct guest_info * vm_info) -{ - - ((struct vmx_data *)vm_info->vmm_data)->state = VMXASSIST_V8086_BIOS; - ((struct rflags *)&(vm_info->ctrl_regs.rflags))->vm = 1; - ((struct rflags *)&(vm_info->ctrl_regs.rflags))->iopl = 3; - - - vm_info->rip = 0xd0000; - vm_info->vm_regs.rsp = 0x80000; - - vm_info->segments.cs.selector = 0xf000; - vm_info->segments.cs.base = 0xf000 << 4; - vm_info->segments.cs.limit = 0xffff; - vm_info->segments.cs.type = 3; - vm_info->segments.cs.system = 1; - vm_info->segments.cs.dpl = 3; - vm_info->segments.cs.present = 1; - vm_info->segments.cs.granularity = 0; - - int i = 0; - struct v3_segment * seg_ptr = (struct v3_segment *)&(vm_info->segments); - - /* Set values for selectors ds through ss */ - for(i = 1; i < 6 ; i++) { - seg_ptr[i].selector = 0x0000; - seg_ptr[i].base = 0x00000; - seg_ptr[i].type = 3; - seg_ptr[i].system = 1; - seg_ptr[i].dpl = 3; - seg_ptr[i].present = 1; - seg_ptr[i].granularity = 0; - } - - for(i = 6; i < 10; i++) { - seg_ptr[i].base = 0x0; - seg_ptr[i].limit = 0xffff; - } - - vm_info->segments.ldtr.selector = 0x0; - vm_info->segments.ldtr.type = 2; - vm_info->segments.ldtr.system = 0; - vm_info->segments.ldtr.present = 1; - vm_info->segments.ldtr.granularity = 0; - - vm_info->segments.tr.selector = 0x0; - vm_info->segments.tr.type = 3; - vm_info->segments.tr.system = 0; - vm_info->segments.tr.present = 1; - vm_info->segments.tr.granularity = 0; -} - - -static addr_t allocate_vmcs() -{ +static addr_t allocate_vmcs() { reg_ex_t msr; - PrintDebug("Allocating page\n"); - struct vmcs_data * vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1)); + struct vmcs_data * vmcs_page = NULL; + PrintDebug("Allocating page\n"); + vmcs_page = (struct vmcs_data *)V3_VAddr(V3_AllocPages(1)); memset(vmcs_page, 0, 4096); v3_get_msr(VMX_BASIC_MSR, &(msr.e_reg.high), &(msr.e_reg.low)); @@ -376,17 +113,29 @@ static addr_t allocate_vmcs() } -static int init_vmcs_bios(struct guest_info * vm_info) -{ +static int init_vmx_guest(struct guest_info * info, struct v3_vm_config * config_ptr) { + struct vmx_data * vmx_info = NULL; + int vmx_ret = 0; - setup_v8086_mode_for_boot(vm_info); + v3_pre_config_guest(info, config_ptr); + + vmx_info = (struct vmx_data *)V3_Malloc(sizeof(struct vmx_data)); + + PrintDebug("vmx_data pointer: %p\n", (void *)vmx_info); + + PrintDebug("Allocating VMCS\n"); + vmx_info->vmcs_ptr_phys = allocate_vmcs(); + PrintDebug("VMCS pointer: %p\n", (void *)(vmx_info->vmcs_ptr_phys)); + + info->vmm_data = vmx_info; + + PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data); + // TODO: Fix vmcs fields so they're 32-bit - struct vmx_data * vmx_data = (struct vmx_data *)vm_info->vmm_data; - int vmx_ret = 0; - PrintDebug("Clearing VMCS: %p\n",(void*)vmx_data->vmcs_ptr_phys); - vmx_ret = vmcs_clear(vmx_data->vmcs_ptr_phys); + PrintDebug("Clearing VMCS: %p\n", (void *)vmx_info->vmcs_ptr_phys); + vmx_ret = vmcs_clear(vmx_info->vmcs_ptr_phys); if (vmx_ret != VMX_SUCCESS) { PrintError("VMCLEAR failed\n"); @@ -394,44 +143,24 @@ static int init_vmcs_bios(struct guest_info * vm_info) } PrintDebug("Loading VMCS\n"); - vmx_ret = vmcs_load(vmx_data->vmcs_ptr_phys); + vmx_ret = vmcs_load(vmx_info->vmcs_ptr_phys); if (vmx_ret != VMX_SUCCESS) { PrintError("VMPTRLD failed\n"); return -1; } - struct v3_msr tmp_msr; - - /* Write VMX Control Fields */ - v3_get_msr(VMX_PINBASED_CTLS_MSR,&(tmp_msr.hi),&(tmp_msr.lo)); - /* Add NMI exiting */ - tmp_msr.lo |= NMI_EXIT; - check_vmcs_write(VMCS_PIN_CTRLS, tmp_msr.lo); - - v3_get_msr(VMX_PROCBASED_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - /* Add unconditional I/O */ - tmp_msr.lo |= UNCOND_IO_EXIT; - check_vmcs_write(VMCS_PROC_CTRLS, tmp_msr.lo); - - v3_get_msr(VMX_EXIT_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - tmp_msr.lo |= HOST_ADDR_SPACE_SIZE; - check_vmcs_write(VMCS_EXIT_CTRLS, tmp_msr.lo); - v3_get_msr(VMX_ENTRY_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - check_vmcs_write(VMCS_ENTRY_CTRLS, tmp_msr.lo); - - - check_vmcs_write(VMCS_EXCP_BITMAP, 0xffffffff); + /******* Setup Host State **********/ /* Cache GDTR, IDTR, and TR in host struct */ + addr_t gdtr_base; struct { uint16_t selector; addr_t base; } __attribute__((packed)) tmp_seg; - addr_t gdtr_base; __asm__ __volatile__( "sgdt (%0);" @@ -440,7 +169,7 @@ static int init_vmcs_bios(struct guest_info * vm_info) : "memory" ); gdtr_base = tmp_seg.base; - vmx_data->host_state.gdtr.base = gdtr_base; + vmx_info->host_state.gdtr.base = gdtr_base; __asm__ __volatile__( "sidt (%0);" @@ -448,7 +177,7 @@ static int init_vmcs_bios(struct guest_info * vm_info) : "q"(&tmp_seg) : "memory" ); - vmx_data->host_state.idtr.base = tmp_seg.base; + vmx_info->host_state.idtr.base = tmp_seg.base; __asm__ __volatile__( "str (%0);" @@ -456,14 +185,13 @@ static int init_vmcs_bios(struct guest_info * vm_info) : "q"(&tmp_seg) : "memory" ); - vmx_data->host_state.tr.selector = tmp_seg.selector; + vmx_info->host_state.tr.selector = tmp_seg.selector; /* The GDTR *index* is bits 3-15 of the selector. */ - struct tss_descriptor * desc = (struct tss_descriptor *) - (gdtr_base + 8*(tmp_seg.selector>>3)); + struct tss_descriptor * desc = NULL; + desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3))); - tmp_seg.base = ( - (desc->base1) | + tmp_seg.base = ((desc->base1) | (desc->base2 << 16) | (desc->base3 << 24) | #ifdef __V3_64BIT__ @@ -471,71 +199,229 @@ static int init_vmcs_bios(struct guest_info * vm_info) #else (0) #endif - ); + ); - vmx_data->host_state.tr.base = tmp_seg.base; + vmx_info->host_state.tr.base = tmp_seg.base; - if(update_vmcs_host_state(vm_info)) { - PrintError("Could not write host state\n"); - return -1; - } + - // Setup guest state - // TODO: This is not 32-bit safe! - vmx_ret |= check_vmcs_write(VMCS_GUEST_RIP, vm_info->rip); - vmx_ret |= check_vmcs_write(VMCS_GUEST_RSP, vm_info->vm_regs.rsp); - vmx_ret |= check_vmcs_write(VMCS_GUEST_CR0, 0x80000021); + /********** Setup and VMX Control Fields from MSR ***********/ + /* Setup IO map */ + v3_init_vmx_io_map(info); + v3_init_vmx_msr_map(info); - vmx_ret |= vmcs_write_guest_segments(vm_info); + struct v3_msr tmp_msr; - vmx_ret |= check_vmcs_write(VMCS_GUEST_RFLAGS, vm_info->ctrl_regs.rflags); - vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, 0xffffffffffffffff); + v3_get_msr(VMX_PINBASED_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - if (vmx_ret != 0) { - PrintError("Could not initialize VMCS segments\n"); - return -1; + /* Add external interrupts, NMI exiting, and virtual NMI */ + vmx_info->pin_ctrls.value = tmp_msr.lo; + vmx_info->pin_ctrls.nmi_exit = 1; + vmx_info->pin_ctrls.ext_int_exit = 1; + + v3_get_msr(VMX_PROCBASED_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + + vmx_info->pri_proc_ctrls.value = tmp_msr.lo; + vmx_info->pri_proc_ctrls.use_io_bitmap = 1; + vmx_info->pri_proc_ctrls.hlt_exit = 1; + vmx_info->pri_proc_ctrls.invlpg_exit = 1; + vmx_info->pri_proc_ctrls.use_msr_bitmap = 1; + vmx_info->pri_proc_ctrls.pause_exit = 1; + + vmx_ret |= check_vmcs_write(VMCS_IO_BITMAP_A_ADDR, (addr_t)V3_PAddr(info->io_map.arch_data)); + vmx_ret |= check_vmcs_write(VMCS_IO_BITMAP_B_ADDR, + (addr_t)V3_PAddr(info->io_map.arch_data) + PAGE_SIZE_4KB); + + vmx_ret |= check_vmcs_write(VMCS_MSR_BITMAP, (addr_t)V3_PAddr(info->msr_map.arch_data)); + + v3_get_msr(VMX_EXIT_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_info->exit_ctrls.value = tmp_msr.lo; + vmx_info->exit_ctrls.host_64_on = 1; + + if ((vmx_info->exit_ctrls.save_efer == 1) || (vmx_info->exit_ctrls.ld_efer == 1)) { + vmx_info->ia32e_avail = 1; } -#define VMXASSIST_START 0x000d0000 - extern uint8_t vmxassist_start[]; - extern uint8_t vmxassist_end[]; + v3_get_msr(VMX_ENTRY_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_info->entry_ctrls.value = tmp_msr.lo; - addr_t vmxassist_dst = 0; - if(guest_pa_to_host_va(vm_info, VMXASSIST_START, &vmxassist_dst) == -1) { - PrintError("Could not find VMXASSIST destination\n"); - return -1; + { + struct vmx_exception_bitmap excp_bmap; + excp_bmap.value = 0; + + excp_bmap.pf = 1; + + vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, excp_bmap.value); } - memcpy((void*)vmxassist_dst, vmxassist_start, vmxassist_end-vmxassist_start); + /******* Setup VMXAssist guest state ***********/ - v3_print_vmcs_host_state(); - v3_print_vmcs_guest_state(); - return 0; -} + info->rip = 0xd0000; + info->vm_regs.rsp = 0x80000; -static int init_vmx_guest(struct guest_info * info, struct v3_vm_config * config_ptr) { - v3_pre_config_guest(info, config_ptr); + struct rflags * flags = (struct rflags *)&(info->ctrl_regs.rflags); + flags->rsvd1 = 1; - struct vmx_data * data = NULL; + /* Print Control MSRs */ + v3_get_msr(VMX_CR0_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + PrintDebug("CR0 MSR: %p\n", (void *)(addr_t)tmp_msr.value); - data = (struct vmx_data *)V3_Malloc(sizeof(struct vmx_data)); + v3_get_msr(VMX_CR4_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + PrintDebug("CR4 MSR: %p\n", (void *)(addr_t)tmp_msr.value); - PrintDebug("vmx_data pointer: %p\n", (void *)data); - PrintDebug("Allocating VMCS\n"); - data->vmcs_ptr_phys = allocate_vmcs(); +#define GUEST_CR0 0x80000031 +#define GUEST_CR4 0x00002000 + info->ctrl_regs.cr0 = GUEST_CR0; + info->ctrl_regs.cr4 = GUEST_CR4; - PrintDebug("VMCS pointer: %p\n", (void *)(data->vmcs_ptr_phys)); + ((struct cr0_32 *)&(info->shdw_pg_state.guest_cr0))->pe = 1; + + /* Setup paging */ + if (info->shdw_pg_mode == SHADOW_PAGING) { + PrintDebug("Creating initial shadow page table\n"); - info->vmm_data = data; + if (v3_init_passthrough_pts(info) == -1) { + PrintError("Could not initialize passthrough page tables\n"); + return -1; + } + +#define CR0_PE 0x00000001 +#define CR0_PG 0x80000000 - PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data); - if (init_vmcs_bios(info) != 0) { - PrintError("Could not initialize VMCS BIOS\n"); + vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG) ); + vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE); + + info->ctrl_regs.cr3 = info->direct_map_pt; + + // vmx_info->pinbased_ctrls |= NMI_EXIT; + + /* Add CR exits */ + vmx_info->pri_proc_ctrls.cr3_ld_exit = 1; + vmx_info->pri_proc_ctrls.cr3_str_exit = 1; + } + + // Setup segment registers + { + struct v3_segment * seg_reg = (struct v3_segment *)&(info->segments); + + int i; + + for (i = 0; i < 10; i++) { + seg_reg[i].selector = 3 << 3; + seg_reg[i].limit = 0xffff; + seg_reg[i].base = 0x0; + } + + info->segments.cs.selector = 2<<3; + + /* Set only the segment registers */ + for (i = 0; i < 6; i++) { + seg_reg[i].limit = 0xfffff; + seg_reg[i].granularity = 1; + seg_reg[i].type = 3; + seg_reg[i].system = 1; + seg_reg[i].dpl = 0; + seg_reg[i].present = 1; + seg_reg[i].db = 1; + } + + info->segments.cs.type = 0xb; + + info->segments.ldtr.selector = 0x20; + info->segments.ldtr.type = 2; + info->segments.ldtr.system = 0; + info->segments.ldtr.present = 1; + info->segments.ldtr.granularity = 0; + + + /************* Map in GDT and vmxassist *************/ + + uint64_t gdt[] __attribute__ ((aligned(32))) = { + 0x0000000000000000ULL, /* 0x00: reserved */ + 0x0000830000000000ULL, /* 0x08: 32-bit TSS */ + //0x0000890000000000ULL, /* 0x08: 32-bit TSS */ + 0x00CF9b000000FFFFULL, /* 0x10: CS 32-bit */ + 0x00CF93000000FFFFULL, /* 0x18: DS 32-bit */ + 0x000082000000FFFFULL, /* 0x20: LDTR 32-bit */ + }; + +#define VMXASSIST_GDT 0x10000 + addr_t vmxassist_gdt = 0; + + if (guest_pa_to_host_va(info, VMXASSIST_GDT, &vmxassist_gdt) == -1) { + PrintError("Could not find VMXASSIST GDT destination\n"); + return -1; + } + + memcpy((void *)vmxassist_gdt, gdt, sizeof(uint64_t) * 5); + + info->segments.gdtr.base = VMXASSIST_GDT; + +#define VMXASSIST_TSS 0x40000 + uint64_t vmxassist_tss = VMXASSIST_TSS; + gdt[0x08 / sizeof(gdt[0])] |= + ((vmxassist_tss & 0xFF000000) << (56 - 24)) | + ((vmxassist_tss & 0x00FF0000) << (32 - 16)) | + ((vmxassist_tss & 0x0000FFFF) << (16)) | + (8392 - 1); + + info->segments.tr.selector = 0x08; + info->segments.tr.base = vmxassist_tss; + + //info->segments.tr.type = 0x9; + info->segments.tr.type = 0x3; + info->segments.tr.system = 0; + info->segments.tr.present = 1; + info->segments.tr.granularity = 0; + } + + // setup VMXASSIST + { +#define VMXASSIST_START 0x000d0000 + extern uint8_t v3_vmxassist_start[]; + extern uint8_t v3_vmxassist_end[]; + addr_t vmxassist_dst = 0; + + if (guest_pa_to_host_va(info, VMXASSIST_START, &vmxassist_dst) == -1) { + PrintError("Could not find VMXASSIST destination\n"); + return -1; + } + + memcpy((void *)vmxassist_dst, v3_vmxassist_start, v3_vmxassist_end - v3_vmxassist_start); + } + + /*** Write all the info to the VMCS ***/ + +#define DEBUGCTL_MSR 0x1d9 + v3_get_msr(DEBUGCTL_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_GUEST_DBG_CTL, tmp_msr.value); + + info->dbg_regs.dr7 = 0x400; + + vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, (addr_t)0xffffffffffffffffULL); + + if (v3_update_vmcs_ctrl_fields(info)) { + PrintError("Could not write control fields!\n"); + return -1; + } + + if (v3_update_vmcs_host_state(info)) { + PrintError("Could not write host state\n"); return -1; } - //v3_post_config_guest(info, config_ptr); + + if (v3_update_vmcs_guest_state(info) != VMX_SUCCESS) { + PrintError("Writing guest state failed!\n"); + return -1; + } + + v3_print_vmcs(); + + vmx_info->state = VMXASSIST_DISABLED; + + v3_post_config_guest(info, config_ptr); return 0; } @@ -547,24 +433,25 @@ static int start_vmx_guest(struct guest_info* info) { PrintDebug("Attempting VMLAUNCH\n"); - ret = v3_vmx_vmlaunch(&(info->vm_regs)); + info->run_state = VM_RUNNING; + + rdtscll(info->time_state.cached_host_tsc); + + ret = v3_vmx_vmlaunch(&(info->vm_regs), info, &(info->ctrl_regs)); + if (ret != VMX_SUCCESS) { - vmcs_read(VMCS_INSTR_ERR, &error, 4); + vmcs_read(VMCS_INSTR_ERR, &error); PrintError("VMLAUNCH failed: %d\n", error); - v3_print_vmcs_guest_state(); - v3_print_vmcs_host_state(); + v3_print_vmcs(); } - PrintDebug("Returned from VMLAUNCH ret=%d(0x%x)\n", ret, ret); + + PrintDebug("Returned from VMLAUNCH ret=%d\n", ret); return -1; } - - - - int v3_is_vmx_capable() { v3_msr_t feature_msr; addr_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -576,7 +463,7 @@ int v3_is_vmx_capable() { if (ecx & CPUID_1_ECX_VTXFLAG) { v3_get_msr(VMX_FEATURE_CONTROL_MSR, &(feature_msr.hi), &(feature_msr.lo)); - PrintTrace("MSRREGlow: 0x%.8x\n", feature_msr.lo); + PrintDebug("MSRREGlow: 0x%.8x\n", feature_msr.lo); if ((feature_msr.lo & FEATURE_CONTROL_VALID) != FEATURE_CONTROL_VALID) { PrintDebug("VMX is locked -- enable in the BIOS\n"); @@ -599,9 +486,8 @@ static int has_vmx_nested_paging() { void v3_init_vmx(struct v3_ctrl_ops * vm_ops) { extern v3_cpu_arch_t v3_cpu_type; - struct v3_msr tmp_msr; - uint64_t ret=0; + uint64_t ret = 0; v3_get_msr(VMX_CR4_FIXED0_MSR,&(tmp_msr.hi),&(tmp_msr.lo)); @@ -614,7 +500,7 @@ void v3_init_vmx(struct v3_ctrl_ops * vm_ops) { : "%rbx" ); - if((~ret & tmp_msr.value) == 0) { + if ((~ret & tmp_msr.value) == 0) { __asm__ __volatile__ ( "movq %0, %%cr4;" : @@ -624,21 +510,23 @@ void v3_init_vmx(struct v3_ctrl_ops * vm_ops) { PrintError("Invalid CR4 Settings!\n"); return; } - __asm__ __volatile__ ( - "movq %%cr0, %%rbx; " - "orq $0x00000020,%%rbx; " - "movq %%rbx, %%cr0;" - : - : - : "%rbx" - ); - // + + __asm__ __volatile__ ( + "movq %%cr0, %%rbx; " + "orq $0x00000020,%%rbx; " + "movq %%rbx, %%cr0;" + : + : + : "%rbx" + ); + // // Should check and return Error here.... // Setup VMXON Region vmxon_ptr_phys = allocate_vmcs(); - PrintDebug("VMXON pointer: 0x%p\n", (void*)vmxon_ptr_phys); + + PrintDebug("VMXON pointer: 0x%p\n", (void *)vmxon_ptr_phys); if (v3_enable_vmx(vmxon_ptr_phys) == VMX_SUCCESS) { PrintDebug("VMX Enabled\n");