X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmx.c;h=2313abee61ff17fd4da3e52d0396b4809012033c;hb=7e96b622b4b2c3720a2579efccb61f44c62c3278;hp=2d75065cbc48b03381713c41e5b09033adfc9603;hpb=39b4fae9c539fbd848edd786500e60aae17b84a0;p=palacios-OLD.git diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c index 2d75065..2313abe 100644 --- a/palacios/src/palacios/vmx.c +++ b/palacios/src/palacios/vmx.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -41,8 +42,7 @@ static addr_t host_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0}; - - +static addr_t active_vmcs_ptrs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0}; extern int v3_vmx_launch(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs); extern int v3_vmx_resume(struct v3_gprs * vm_regs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs); @@ -50,7 +50,7 @@ extern int v3_vmx_resume(struct v3_gprs * vm_regs, struct guest_info * info, str static int inline check_vmcs_write(vmcs_field_t field, addr_t val) { int ret = 0; - ret = vmcs_write(field,val); + ret = vmcs_write(field, val); if (ret != VMX_SUCCESS) { PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret); @@ -72,52 +72,9 @@ static int inline check_vmcs_read(vmcs_field_t field, void * val) { return ret; } -#if 0 -// For the 32 bit reserved bit fields -// MB1s are in the low 32 bits, MBZs are in the high 32 bits of the MSR -static uint32_t sanitize_bits1(uint32_t msr_num, uint32_t val) { - v3_msr_t mask_msr; - - PrintDebug("sanitize_bits1 (MSR:%x)\n", msr_num); - - v3_get_msr(msr_num, &mask_msr.hi, &mask_msr.lo); - - PrintDebug("MSR %x = %x : %x \n", msr_num, mask_msr.hi, mask_msr.lo); - - val |= mask_msr.lo; - val |= mask_msr.hi; - - return val; -} -static addr_t sanitize_bits2(uint32_t msr_num0, uint32_t msr_num1, addr_t val) { - v3_msr_t msr0, msr1; - addr_t msr0_val, msr1_val; - - PrintDebug("sanitize_bits2 (MSR0=%x, MSR1=%x)\n", msr_num0, msr_num1); - - v3_get_msr(msr_num0, &msr0.hi, &msr0.lo); - v3_get_msr(msr_num1, &msr1.hi, &msr1.lo); - - // This generates a mask that is the natural bit width of the CPU - msr0_val = msr0.value; - msr1_val = msr1.value; - - PrintDebug("MSR %x = %p, %x = %p \n", msr_num0, (void*)msr0_val, msr_num1, (void*)msr1_val); - - val |= msr0_val; - val |= msr1_val; - - return val; -} - - - -#endif - - static addr_t allocate_vmcs() { reg_ex_t msr; struct vmcs_data * vmcs_page = NULL; @@ -140,9 +97,15 @@ static addr_t allocate_vmcs() { static int init_vmcs_bios(struct guest_info * info, struct vmx_data * vmx_state) { int vmx_ret = 0; + struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); + + // disable global interrupts for vm state initialization + v3_disable_ints(); PrintDebug("Loading VMCS\n"); vmx_ret = vmcs_load(vmx_state->vmcs_ptr_phys); + active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys; + vmx_state->state = VMX_UNLAUNCHED; if (vmx_ret != VMX_SUCCESS) { PrintError("VMPTRLD failed\n"); @@ -420,7 +383,12 @@ static int init_vmcs_bios(struct guest_info * info, struct vmx_data * vmx_state) } - vmx_state->state = VMXASSIST_DISABLED; + vmx_state->assist_state = VMXASSIST_DISABLED; + + // reenable global interrupts for vm state initialization now + // that the vm state is initialized. If another VM kicks us off, + // it'll update our vmx state so that we know to reload ourself + v3_enable_ints(); return 0; } @@ -439,6 +407,7 @@ int v3_init_vmx_vmcs(struct guest_info * info, v3_vm_class_t vm_class) { PrintDebug("VMCS pointer: %p\n", (void *)(vmx_state->vmcs_ptr_phys)); info->vmm_data = vmx_state; + vmx_state->state = VMX_UNLAUNCHED; PrintDebug("Initializing VMCS (addr=%p)\n", info->vmm_data); @@ -463,6 +432,18 @@ int v3_init_vmx_vmcs(struct guest_info * info, v3_vm_class_t vm_class) { return 0; } + +int v3_deinit_vmx_vmcs(struct guest_info * core) { + struct vmx_data * vmx_state = core->vmm_data; + + V3_FreePages((void *)(vmx_state->vmcs_ptr_phys), 1); + + V3_Free(vmx_state); + + return 0; +} + + static int update_irq_exit_state(struct guest_info * info) { struct vmx_exit_idt_vec_info idt_vec_info; @@ -646,19 +627,27 @@ int v3_vmx_enter(struct guest_info * info) { int ret = 0; uint32_t tsc_offset_low, tsc_offset_high; struct vmx_exit_info exit_info; + struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data); // Conditionally yield the CPU if the timeslice has expired v3_yield_cond(info); - /* If this guest is frequency-lagged behind host time, wait - * for the appropriate host time before resuming the guest. */ + // Perform any additional yielding needed for time adjustment v3_adjust_time(info); - // v3_print_guest_state(info); + // Update timer devices prior to entering VM. + v3_update_timers(info); // disable global interrupts for vm state transition v3_disable_ints(); + + if (active_vmcs_ptrs[V3_Get_CPU()] != vmx_info->vmcs_ptr_phys) { + vmcs_load(vmx_info->vmcs_ptr_phys); + active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys; + } + + v3_vmx_restore_vmcs(info); @@ -676,20 +665,24 @@ int v3_vmx_enter(struct guest_info * info) { vmcs_write(VMCS_GUEST_CR3, guest_cr3); } - v3_update_timers(info); + // Perform last-minute time bookkeeping prior to entering the VM + v3_time_enter_vm(info); tsc_offset_high = (uint32_t)((v3_tsc_host_offset(&info->time_state) >> 32) & 0xffffffff); tsc_offset_low = (uint32_t)(v3_tsc_host_offset(&info->time_state) & 0xffffffff); check_vmcs_write(VMCS_TSC_OFFSET_HIGH, tsc_offset_high); check_vmcs_write(VMCS_TSC_OFFSET, tsc_offset_low); - if (info->vm_info->run_state == VM_STOPPED) { + + if (vmx_info->state == VMX_UNLAUNCHED) { + vmx_info->state = VMX_LAUNCHED; info->vm_info->run_state = VM_RUNNING; ret = v3_vmx_launch(&(info->vm_regs), info, &(info->ctrl_regs)); } else { + V3_ASSERT(vmx_info->state != VMX_UNLAUNCHED); ret = v3_vmx_resume(&(info->vm_regs), info, &(info->ctrl_regs)); } - + // PrintDebug("VMX Exit: ret=%d\n", ret); if (ret != VMX_SUCCESS) { @@ -701,6 +694,9 @@ int v3_vmx_enter(struct guest_info * info) { return -1; } + // Immediate exit from VM time bookkeeping + v3_time_exit_vm(info); + info->num_exits++; /* Update guest state */ @@ -733,6 +729,17 @@ int v3_vmx_enter(struct guest_info * info) { update_irq_exit_state(info); #endif + if (exit_info.exit_reason == VMEXIT_INTR_WINDOW) { + // This is a special case whose only job is to inject an interrupt + vmcs_read(VMCS_PROC_CTRLS, &(vmx_info->pri_proc_ctrls.value)); + vmx_info->pri_proc_ctrls.int_wndw_exit = 0; + vmcs_write(VMCS_PROC_CTRLS, vmx_info->pri_proc_ctrls.value); + +#ifdef CONFIG_DEBUG_INTERRUPTS + PrintDebug("Interrupts available again! (RIP=%llx)\n", info->rip); +#endif + } + // reenable global interrupts after vm exit v3_enable_ints(); @@ -835,6 +842,12 @@ int v3_is_vmx_capable() { } static int has_vmx_nested_paging() { + /* We assume that both EPT and unrestricted guest mode (Intel's Virtual Real Mode) + * are mutually assured. i.e. We have either both or neither. + */ + + + return 0; } @@ -845,7 +858,8 @@ void v3_init_vmx_cpu(int cpu_id) { struct v3_msr tmp_msr; uint64_t ret = 0; - v3_get_msr(VMX_CR4_FIXED0_MSR,&(tmp_msr.hi),&(tmp_msr.lo)); + v3_get_msr(VMX_CR4_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + #ifdef __V3_64BIT__ __asm__ __volatile__ ( "movq %%cr4, %%rbx;" @@ -932,3 +946,9 @@ void v3_init_vmx_cpu(int cpu_id) { } + +void v3_deinit_vmx_cpu(int cpu_id) { + extern v3_cpu_arch_t v3_cpu_types[]; + v3_cpu_types[cpu_id] = V3_INVALID_CPU; + V3_FreePages((void *)host_vmcs_ptrs[cpu_id], 1); +}