X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_xed.c;h=e6de1e1bb6e8ba6a3cb608de8893de470df32cf6;hb=75aa9d6205930057dc8163238d325558bcb1fd9b;hp=3c39b13840dcfb828bdf736f1292fd21e58e6606;hpb=dc450df7818a872a3e8a3725ec97bdc273756b06;p=palacios.releases.git diff --git a/palacios/src/palacios/vmm_xed.c b/palacios/src/palacios/vmm_xed.c index 3c39b13..e6de1e1 100644 --- a/palacios/src/palacios/vmm_xed.c +++ b/palacios/src/palacios/vmm_xed.c @@ -608,6 +608,8 @@ static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xe static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len) { + // PrintError("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg)); + switch (xed_reg) { case XED_REG_INVALID: *v3_reg = 0; @@ -774,6 +776,146 @@ static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, a return GPR_REGISTER; + + + + case XED_REG_R8: + *v3_reg = (addr_t)&(info->vm_regs.r8); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R8D: + *v3_reg = (addr_t)&(info->vm_regs.r8); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R8W: + *v3_reg = (addr_t)&(info->vm_regs.r8); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R8B: + *v3_reg = (addr_t)&(info->vm_regs.r8); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R9: + *v3_reg = (addr_t)&(info->vm_regs.r9); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R9D: + *v3_reg = (addr_t)&(info->vm_regs.r9); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R9W: + *v3_reg = (addr_t)&(info->vm_regs.r9); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R9B: + *v3_reg = (addr_t)&(info->vm_regs.r9); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R10: + *v3_reg = (addr_t)&(info->vm_regs.r10); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R10D: + *v3_reg = (addr_t)&(info->vm_regs.r10); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R10W: + *v3_reg = (addr_t)&(info->vm_regs.r10); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R10B: + *v3_reg = (addr_t)&(info->vm_regs.r10); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R11: + *v3_reg = (addr_t)&(info->vm_regs.r11); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R11D: + *v3_reg = (addr_t)&(info->vm_regs.r11); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R11W: + *v3_reg = (addr_t)&(info->vm_regs.r11); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R11B: + *v3_reg = (addr_t)&(info->vm_regs.r11); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R12: + *v3_reg = (addr_t)&(info->vm_regs.r12); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R12D: + *v3_reg = (addr_t)&(info->vm_regs.r12); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R12W: + *v3_reg = (addr_t)&(info->vm_regs.r12); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R12B: + *v3_reg = (addr_t)&(info->vm_regs.r12); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R13: + *v3_reg = (addr_t)&(info->vm_regs.r13); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R13D: + *v3_reg = (addr_t)&(info->vm_regs.r13); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R13W: + *v3_reg = (addr_t)&(info->vm_regs.r13); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R13B: + *v3_reg = (addr_t)&(info->vm_regs.r13); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R14: + *v3_reg = (addr_t)&(info->vm_regs.r14); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R14D: + *v3_reg = (addr_t)&(info->vm_regs.r14); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R14W: + *v3_reg = (addr_t)&(info->vm_regs.r14); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R14B: + *v3_reg = (addr_t)&(info->vm_regs.r14); + *reg_len = 1; + return GPR_REGISTER; + + case XED_REG_R15: + *v3_reg = (addr_t)&(info->vm_regs.r15); + *reg_len = 8; + return GPR_REGISTER; + case XED_REG_R15D: + *v3_reg = (addr_t)&(info->vm_regs.r15); + *reg_len = 4; + return GPR_REGISTER; + case XED_REG_R15W: + *v3_reg = (addr_t)&(info->vm_regs.r15); + *reg_len = 2; + return GPR_REGISTER; + case XED_REG_R15B: + *v3_reg = (addr_t)&(info->vm_regs.r15); + *reg_len = 1; + return GPR_REGISTER; + + /* * CTRL REGS */ @@ -894,45 +1036,7 @@ static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, a - case XED_REG_R8: - case XED_REG_R8D: - case XED_REG_R8W: - case XED_REG_R8B: - - case XED_REG_R9: - case XED_REG_R9D: - case XED_REG_R9W: - case XED_REG_R9B: - - case XED_REG_R10: - case XED_REG_R10D: - case XED_REG_R10W: - case XED_REG_R10B: - - case XED_REG_R11: - case XED_REG_R11D: - case XED_REG_R11W: - case XED_REG_R11B: - - case XED_REG_R12: - case XED_REG_R12D: - case XED_REG_R12W: - case XED_REG_R12B: - - case XED_REG_R13: - case XED_REG_R13D: - case XED_REG_R13W: - case XED_REG_R13B: - - case XED_REG_R14: - case XED_REG_R14D: - case XED_REG_R14W: - case XED_REG_R14B: - case XED_REG_R15: - case XED_REG_R15D: - case XED_REG_R15W: - case XED_REG_R15B: case XED_REG_XMM0: case XED_REG_XMM1: @@ -1021,6 +1125,9 @@ static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, a static v3_op_type_t get_opcode(xed_iform_enum_t iform) { switch (iform) { + + /* Control Instructions */ + case XED_IFORM_MOV_CR_GPR64_CR: case XED_IFORM_MOV_CR_GPR32_CR: return V3_OP_MOVCR2; @@ -1038,6 +1145,12 @@ static v3_op_type_t get_opcode(xed_iform_enum_t iform) { case XED_IFORM_CLTS: return V3_OP_CLTS; + case XED_IFORM_INVLPG_MEMb: + return V3_OP_INVLPG; + + + /* Data Instructions */ + case XED_IFORM_ADC_MEMv_GPRv: case XED_IFORM_ADC_MEMv_IMM: case XED_IFORM_ADC_MEMb_GPR8: @@ -1149,6 +1262,7 @@ static v3_op_type_t get_opcode(xed_iform_enum_t iform) { case XED_IFORM_SETZ_MEMb: return V3_OP_SETZ; + case XED_IFORM_MOVSB: case XED_IFORM_MOVSW: case XED_IFORM_MOVSD: