X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_io.c;h=d334c73976cb522f7e7d467c54ab9779c2bc741d;hb=7cdedeb7a01b51c5242cce94924f2ea246008e7d;hp=fa17c536e945497bfc61c16599427d463c16ed82;hpb=4f7c3b759e3889870c5b5e7d09b3ffcc168e5632;p=palacios.git diff --git a/palacios/src/palacios/vmm_io.c b/palacios/src/palacios/vmm_io.c index fa17c53..d334c73 100644 --- a/palacios/src/palacios/vmm_io.c +++ b/palacios/src/palacios/vmm_io.c @@ -1,5 +1,21 @@ -/* Northwestern University */ -/* (c) 2008, Jack Lange */ +/* + * This file is part of the Palacios Virtual Machine Monitor developed + * by the V3VEE Project with funding from the United States National + * Science Foundation and the Department of Energy. + * + * The V3VEE Project is a joint project between Northwestern University + * and the University of New Mexico. You can find out more at + * http://www.v3vee.org + * + * Copyright (c) 2008, Jack Lange + * Copyright (c) 2008, The V3VEE Project + * All rights reserved. + * + * Author: Jack Lange + * + * This is free software. You are permitted to use, + * redistribute, and modify it as specified in the file "V3VEE_LICENSE". + */ #include #include @@ -14,7 +30,11 @@ #endif -void init_vmm_io_map(struct guest_info * info) { +static int default_write(ushort_t port, void *src, uint_t length, void * priv_data); +static int default_read(ushort_t port, void * dst, uint_t length, void * priv_data); + + +void v3_init_vmm_io_map(struct guest_info * info) { struct vmm_io_map * io_map = &(info->io_map); io_map->num_ports = 0; io_map->head = NULL; @@ -89,50 +109,7 @@ static int remove_io_hook(struct vmm_io_map * io_map, struct vmm_io_hook * io_ho -/* FIX ME */ -static int default_write(ushort_t port, void *src, uint_t length, void * priv_data) { - /* - - if (length == 1) { - __asm__ __volatile__ ( - "outb %b0, %w1" - : - : "a" (*dst), "Nd" (port) - ); - } else if (length == 2) { - __asm__ __volatile__ ( - "outw %b0, %w1" - : - : "a" (*dst), "Nd" (port) - ); - } else if (length == 4) { - __asm__ __volatile__ ( - "outw %b0, %w1" - : - : "a" (*dst), "Nd" (port) - ); - } - */ - return 0; -} - -static int default_read(ushort_t port, void * dst, uint_t length, void * priv_data) -{ - - /* - uchar_t value; - - __asm__ __volatile__ ( - "inb %w1, %b0" - : "=a" (value) - : "Nd" (port) - ); - - return value; - */ - return 0; -} int v3_hook_io_port(struct guest_info * info, uint_t port, int (*read)(ushort_t port, void * dst, uint_t length, void * priv_data), @@ -193,7 +170,7 @@ struct vmm_io_hook * v3_get_io_hook(struct vmm_io_map * io_map, uint_t port) { -void PrintDebugIOMap(struct vmm_io_map * io_map) { +void v3_print_io_map(struct vmm_io_map * io_map) { struct vmm_io_hook * iter = io_map->head; PrintDebug("VMM IO Map (Entries=%d)\n", io_map->num_ports); @@ -202,3 +179,130 @@ void PrintDebugIOMap(struct vmm_io_map * io_map) { PrintDebug("IO Port: %hu (Read=%x) (Write=%x)\n", iter->port, iter->read, iter->write); } } + + + +/* + * Write a byte to an I/O port. + */ +void v3_outb(ushort_t port, uchar_t value) { + __asm__ __volatile__ ( + "outb %b0, %w1" + : + : "a" (value), "Nd" (port) + ); +} + +/* + * Read a byte from an I/O port. + */ +uchar_t v3_inb(ushort_t port) { + uchar_t value; + + __asm__ __volatile__ ( + "inb %w1, %b0" + : "=a" (value) + : "Nd" (port) + ); + + return value; +} + +/* + * Write a word to an I/O port. + */ +void v3_outw(ushort_t port, ushort_t value) { + __asm__ __volatile__ ( + "outw %w0, %w1" + : + : "a" (value), "Nd" (port) + ); +} + +/* + * Read a word from an I/O port. + */ +ushort_t v3_inw(ushort_t port) { + ushort_t value; + + __asm__ __volatile__ ( + "inw %w1, %w0" + : "=a" (value) + : "Nd" (port) + ); + + return value; +} + +/* + * Write a double word to an I/O port. + */ +void v3_outdw(ushort_t port, uint_t value) { + __asm__ __volatile__ ( + "outl %0, %1" + : + : "a" (value), "Nd" (port) + ); +} + +/* + * Read a double word from an I/O port. + */ +uint_t v3_indw(ushort_t port) { + uint_t value; + + __asm__ __volatile__ ( + "inl %1, %0" + : "=a" (value) + : "Nd" (port) + ); + + return value; +} + + + + +/* FIX ME */ +static int default_write(ushort_t port, void *src, uint_t length, void * priv_data) { + /* + + if (length == 1) { + __asm__ __volatile__ ( + "outb %b0, %w1" + : + : "a" (*dst), "Nd" (port) + ); + } else if (length == 2) { + __asm__ __volatile__ ( + "outw %b0, %w1" + : + : "a" (*dst), "Nd" (port) + ); + } else if (length == 4) { + __asm__ __volatile__ ( + "outw %b0, %w1" + : + : "a" (*dst), "Nd" (port) + ); + } + */ + return 0; +} + +static int default_read(ushort_t port, void * dst, uint_t length, void * priv_data) { + + /* + uchar_t value; + + __asm__ __volatile__ ( + "inb %w1, %b0" + : "=a" (value) + : "Nd" (port) + ); + + return value; + */ + + return 0; +}