X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_direct_paging_64.h;h=0511754e4143472c21f7e9209a903e5ff82dd085;hb=262c92c9f620f87500f350b4744d2f31b6de7da5;hp=c42499d37ca0054344eeeaa998e80f8ad8f9f9fa;hpb=058a3adde5893927ae056a1d8fbccd5191d2446f;p=palacios.git diff --git a/palacios/src/palacios/vmm_direct_paging_64.h b/palacios/src/palacios/vmm_direct_paging_64.h index c42499d..0511754 100644 --- a/palacios/src/palacios/vmm_direct_paging_64.h +++ b/palacios/src/palacios/vmm_direct_paging_64.h @@ -46,7 +46,7 @@ static inline int handle_passthrough_pagefault_64(struct guest_info * info, - struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr); + struct v3_shadow_region * region = v3_get_shadow_region(info->vm_info, info->cpu_id, fault_addr); if (region == NULL) { PrintError("Invalid region in passthrough page fault 64, addr=%p\n", @@ -54,7 +54,7 @@ static inline int handle_passthrough_pagefault_64(struct guest_info * info, return -1; } - host_addr = v3_get_shadow_addr(region, fault_addr); + host_addr = v3_get_shadow_addr(region, info->cpu_id, fault_addr); // // Lookup the correct PML address based on the PAGING MODE @@ -143,5 +143,59 @@ static inline int handle_passthrough_pagefault_64(struct guest_info * info, return 0; } +static inline int invalidate_addr_64(struct guest_info * info, addr_t inv_addr) { + pml4e64_t * pml = NULL; + pdpe64_t * pdpe = NULL; + pde64_t * pde = NULL; + pte64_t * pte = NULL; + + + // TODO: + // Call INVLPGA + + // clear the page table entry + int pml_index = PML4E64_INDEX(inv_addr); + int pdpe_index = PDPE64_INDEX(inv_addr); + int pde_index = PDE64_INDEX(inv_addr); + int pte_index = PTE64_INDEX(inv_addr); + + + // Lookup the correct PDE address based on the PAGING MODE + if (info->shdw_pg_mode == SHADOW_PAGING) { + pml = CR3_TO_PML4E64_VA(info->ctrl_regs.cr3); + } else { + pml = CR3_TO_PML4E64_VA(info->direct_map_pt); + } + + if (pml[pml_index].present == 0) { + return 0; + } + + pdpe = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pml[pml_index].pdp_base_addr)); + + if (pdpe[pdpe_index].present == 0) { + return 0; + } else if (pdpe[pdpe_index].large_page == 1) { + pdpe[pdpe_index].present = 0; + return 0; + } + + pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr)); + + if (pde[pde_index].present == 0) { + return 0; + } else if (pde[pde_index].large_page == 1) { + pde[pde_index].present = 0; + return 0; + } + + pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr)); + + pte[pte_index].present = 0; + + return 0; +} + + #endif