X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_direct_paging_32pae.h;h=d681969eff96f00666f52520236bdd9009b954bc;hb=058a3adde5893927ae056a1d8fbccd5191d2446f;hp=ff526ed1c5ddf08d7bd12d647dbda32a50145791;hpb=84373a6580ffe1b3370243112e5a12bf273a63e3;p=palacios.git

diff --git a/palacios/src/palacios/vmm_direct_paging_32pae.h b/palacios/src/palacios/vmm_direct_paging_32pae.h
index ff526ed..d681969 100644
--- a/palacios/src/palacios/vmm_direct_paging_32pae.h
+++ b/palacios/src/palacios/vmm_direct_paging_32pae.h
@@ -31,86 +31,92 @@
 static inline int handle_passthrough_pagefault_32pae(struct guest_info * info, 
 						     addr_t fault_addr, 
 						     pf_error_t error_code) {
-  pdpe32pae_t * pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
-  pde32pae_t * pde = NULL;
-  pte32pae_t * pte = NULL;
-  addr_t host_addr = 0;
+    pdpe32pae_t * pdpe = NULL;
+    pde32pae_t * pde = NULL;
+    pte32pae_t * pte = NULL;
+    addr_t host_addr = 0;
 
-  int pdpe_index = PDPE32PAE_INDEX(fault_addr);
-  int pde_index = PDE32PAE_INDEX(fault_addr);
-  int pte_index = PTE32PAE_INDEX(fault_addr);
+    int pdpe_index = PDPE32PAE_INDEX(fault_addr);
+    int pde_index = PDE32PAE_INDEX(fault_addr);
+    int pte_index = PTE32PAE_INDEX(fault_addr);
 
-  struct v3_shadow_region * region =  v3_get_shadow_region(info, fault_addr);
+    struct v3_shadow_region * region =  v3_get_shadow_region(info, fault_addr);
   
-  if ((region == NULL) || 
-      (region->host_type == SHDW_REGION_INVALID)) {
-    PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n", 
-	       (void *)fault_addr);
-    return -1;
-  }
-
-  host_addr = v3_get_shadow_addr(region, fault_addr);
-
-  // Fix up the PDPE entry
-  if (pdpe[pdpe_index].present == 0) {
-    pde = (pde32pae_t *)create_generic_pt_page();
+    if (region == NULL) {
+	PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n", 
+		   (void *)fault_addr);
+	return -1;
+    }
+
+    host_addr = v3_get_shadow_addr(region, fault_addr);
+
+    // Lookup the correct PDPE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+    } else {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->direct_map_pt);
+    }
+
+    // Fix up the PDPE entry
+    if (pdpe[pdpe_index].present == 0) {
+	pde = (pde32pae_t *)create_generic_pt_page();
    
-    pdpe[pdpe_index].present = 1;
-    // Set default PDPE Flags...
-    pdpe[pdpe_index].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));    
-  } else {
-    pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
-  }
+	pdpe[pdpe_index].present = 1;
+	// Set default PDPE Flags...
+	pdpe[pdpe_index].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));    
+    } else {
+	pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
+    }
 
 
-  // Fix up the PDE entry
-  if (pde[pde_index].present == 0) {
-    pte = (pte32pae_t *)create_generic_pt_page();
+    // Fix up the PDE entry
+    if (pde[pde_index].present == 0) {
+	pte = (pte32pae_t *)create_generic_pt_page();
 
-    pde[pde_index].present = 1;
-    pde[pde_index].writable = 1;
-    pde[pde_index].user_page = 1;
+	pde[pde_index].present = 1;
+	pde[pde_index].writable = 1;
+	pde[pde_index].user_page = 1;
 
-    pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
-  } else {
-    pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
-  }
+	pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
+    } else {
+	pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+    }
 
 
-  // Fix up the PTE entry
-  if (pte[pte_index].present == 0) {
-    pte[pte_index].user_page = 1;
+    // Fix up the PTE entry
+    if (pte[pte_index].present == 0) {
+	pte[pte_index].user_page = 1;
 
-    if (region->host_type == SHDW_REGION_ALLOCATED) {
-      // Full access
-      pte[pte_index].present = 1;
-      pte[pte_index].writable = 1;
+	if (region->host_type == SHDW_REGION_ALLOCATED) {
+	    // Full access
+	    pte[pte_index].present = 1;
+	    pte[pte_index].writable = 1;
 
-      pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+	    pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
 
-    } else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
-      // Only trap writes
-     pte[pte_index].present = 1; 
-     pte[pte_index].writable = 0;
+	} else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
+	    // Only trap writes
+	    pte[pte_index].present = 1; 
+	    pte[pte_index].writable = 0;
 
-     pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+	    pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
 
-    } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
-      // trap all accesses
-      return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
+	} else if (region->host_type == SHDW_REGION_FULL_HOOK) {
+	    // trap all accesses
+	    return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
 
-    } else {
-      PrintError("Unknown Region Type...\n");
-      return -1;
+	} else {
+	    PrintError("Unknown Region Type...\n");
+	    return -1;
+	}
     }
-  }
    
-  if ( (region->host_type == SHDW_REGION_WRITE_HOOK) && 
-       (error_code.write == 1) ) {
-    return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
-  }
+    if ( (region->host_type == SHDW_REGION_WRITE_HOOK) && 
+	 (error_code.write == 1) ) {
+	return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
+    }
 
-  return 0;
+    return 0;
 }