X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_direct_paging_32pae.h;h=a2bb71d68cc787a6da10f72f169cb8c30cf238a9;hb=201c3bb9d4fa7606dbd3193baf408f29142381d1;hp=033c69d6dd51ecd7347f71bca57e9c62e6fee57b;hpb=266af4b5b19da7bee8e7445288c7c1cb3ee194c7;p=palacios.git

diff --git a/palacios/src/palacios/vmm_direct_paging_32pae.h b/palacios/src/palacios/vmm_direct_paging_32pae.h
index 033c69d..a2bb71d 100644
--- a/palacios/src/palacios/vmm_direct_paging_32pae.h
+++ b/palacios/src/palacios/vmm_direct_paging_32pae.h
@@ -31,7 +31,7 @@
 static inline int handle_passthrough_pagefault_32pae(struct guest_info * info, 
 						     addr_t fault_addr, 
 						     pf_error_t error_code) {
-    pdpe32pae_t * pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+    pdpe32pae_t * pdpe = NULL;
     pde32pae_t * pde = NULL;
     pte32pae_t * pte = NULL;
     addr_t host_addr = 0;
@@ -40,16 +40,20 @@ static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
     int pde_index = PDE32PAE_INDEX(fault_addr);
     int pte_index = PTE32PAE_INDEX(fault_addr);
 
-    struct v3_shadow_region * region =  v3_get_shadow_region(info, fault_addr);
+    struct v3_mem_region * region =  v3_get_mem_region(info->vm_info, info->cpu_id, fault_addr);
   
-    if ((region == NULL) || 
-	(region->host_type == SHDW_REGION_INVALID)) {
+    if (region == NULL) {
 	PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n", 
 		   (void *)fault_addr);
 	return -1;
     }
 
-    host_addr = v3_get_shadow_addr(region, fault_addr);
+    // Lookup the correct PDPE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+    } else {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->direct_map_pt);
+    }
 
     // Fix up the PDPE entry
     if (pdpe[pdpe_index].present == 0) {
@@ -81,37 +85,77 @@ static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
     if (pte[pte_index].present == 0) {
 	pte[pte_index].user_page = 1;
 
-	if (region->host_type == SHDW_REGION_ALLOCATED) {
-	    // Full access
+	if ((region->flags.alloced == 1) && 
+	    (region->flags.read == 1)) {
+
 	    pte[pte_index].present = 1;
-	    pte[pte_index].writable = 1;
 
-	    pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+	    if (region->flags.write == 1) {
+		pte[pte_index].writable = 1;
+	    } else {
+		pte[pte_index].writable = 0;
+	    }
 
-	} else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
-	    // Only trap writes
-	    pte[pte_index].present = 1; 
-	    pte[pte_index].writable = 0;
+	    if (v3_gpa_to_hpa(info, fault_addr, &host_addr) == -1) {
+		PrintError("Could not translate fault address (%p)\n", (void *)fault_addr);
+		return -1;
+	    }
 
 	    pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
-
-	} else if (region->host_type == SHDW_REGION_FULL_HOOK) {
-	    // trap all accesses
-	    return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
-
 	} else {
-	    PrintError("Unknown Region Type...\n");
-	    return -1;
+	    return region->unhandled(info, fault_addr, fault_addr, region, error_code);
 	}
+    } else {
+	return region->unhandled(info, fault_addr, fault_addr, region, error_code);
     }
-   
-    if ( (region->host_type == SHDW_REGION_WRITE_HOOK) && 
-	 (error_code.write == 1) ) {
-	return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
+
+    return 0;
+}
+
+
+static inline int invalidate_addr_32pae(struct guest_info * info, addr_t inv_addr) {
+    pdpe32pae_t * pdpe = NULL;
+    pde32pae_t * pde = NULL;
+    pte32pae_t * pte = NULL;
+
+
+    // TODO:
+    // Call INVLPGA
+
+    // clear the page table entry
+    int pdpe_index = PDPE32PAE_INDEX(inv_addr);
+    int pde_index = PDE32PAE_INDEX(inv_addr);
+    int pte_index = PTE32PAE_INDEX(inv_addr);
+
+    
+    // Lookup the correct PDE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+    } else {
+	pdpe = CR3_TO_PDPE32PAE_VA(info->direct_map_pt);
+    }    
+
+
+    if (pdpe[pdpe_index].present == 0) {
+	return 0;
     }
 
+    pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
+
+    if (pde[pde_index].present == 0) {
+	return 0;
+    } else if (pde[pde_index].large_page) {
+	pde[pde_index].present = 0;
+	return 0;
+    }
+
+    pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+
+    pte[pte_index].present = 0;
+
     return 0;
 }
 
 
+
 #endif