X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_direct_paging_32.h;h=52f0991ea3a34e64b9591da82af4c09a9cebe327;hb=cfcceed5890430afedcc544bd7dbb69e29dfd65a;hp=6645f86f9943ed5b9c43bf388711199bab12742b;hpb=1fe82881720f7f9f64f789871f763aca93b47a7e;p=palacios.git

diff --git a/palacios/src/palacios/vmm_direct_paging_32.h b/palacios/src/palacios/vmm_direct_paging_32.h
index 6645f86..52f0991 100644
--- a/palacios/src/palacios/vmm_direct_paging_32.h
+++ b/palacios/src/palacios/vmm_direct_paging_32.h
@@ -18,7 +18,6 @@
  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  */
 
-
 #ifndef __VMM_DIRECT_PAGING_32_H__
 #define __VMM_DIRECT_PAGING_32_H__
 
@@ -41,9 +40,8 @@ static inline int handle_passthrough_pagefault_32(struct guest_info * info,
     int pte_index = PTE32_INDEX(fault_addr);
     
     struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr);
-    
-    if ((region == NULL) || 
-	(region->host_type == SHDW_REGION_INVALID)) {
+
+    if (region == NULL) {
 	PrintError("Invalid region in passthrough page fault 32, addr=%p\n", 
 		   (void *)fault_addr);
 	return -1;
@@ -85,6 +83,7 @@ static inline int handle_passthrough_pagefault_32(struct guest_info * info,
 	    pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
 	} else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
 	    // Only trap writes
+	    PrintDebug("Faulted in a write hook page\n");
 	    pte[pte_index].present = 1;
 	    pte[pte_index].writable = 0;
 	    
@@ -100,6 +99,7 @@ static inline int handle_passthrough_pagefault_32(struct guest_info * info,
     
     if ( (region->host_type == SHDW_REGION_WRITE_HOOK) && 
 	 (error_code.write == 1) ) {
+	PrintDebug("Triggering Direct paging Write hook\n");
 	return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
     }
 
@@ -108,4 +108,40 @@ static inline int handle_passthrough_pagefault_32(struct guest_info * info,
 }
 
 
+
+
+static inline int invalidate_addr_32(struct guest_info * info, addr_t inv_addr) {
+    pde32_t * pde = NULL;
+    pte32_t * pte = NULL;
+
+    // TODO:
+    // Call INVLPGA
+
+    // clear the page table entry
+    int pde_index = PDE32_INDEX(inv_addr);
+    int pte_index = PTE32_INDEX(inv_addr);
+
+    
+    // Lookup the correct PDE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+	pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+    } else {
+	pde = CR3_TO_PDE32_VA(info->direct_map_pt);
+    }    
+
+    if (pde[pde_index].present == 0) {
+	return 0;
+    } else if (pde[pde_index].large_page) {
+	pde[pde_index].present = 0;
+	return 0;
+    }
+
+    pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+
+    pte[pte_index].present = 0;
+
+    return 0;
+}
+
+
 #endif