X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_ctrl_regs.c;h=c80f60594eee113b04ee46dd6baec8021e725107;hb=1c000bda0560742ad6be011722fa226771b656ff;hp=838ce98dd8ad6147b505218ffaaa5e26d49b6b87;hpb=fa05269fd639f61ea0c154e6c4bf1daabeb90459;p=palacios.git diff --git a/palacios/src/palacios/vmm_ctrl_regs.c b/palacios/src/palacios/vmm_ctrl_regs.c index 838ce98..c80f605 100644 --- a/palacios/src/palacios/vmm_ctrl_regs.c +++ b/palacios/src/palacios/vmm_ctrl_regs.c @@ -24,8 +24,9 @@ #include #include #include +#include -#ifndef CONFIG_DEBUG_CTRL_REGS +#ifndef V3_CONFIG_DEBUG_CTRL_REGS #undef PrintDebug #define PrintDebug(fmt, args...) #endif @@ -44,9 +45,9 @@ int v3_handle_cr0_write(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -107,13 +108,18 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in *guest_cr0 = *new_cr0; // This value must always be set to 1 - guest_cr0->et = 1; + guest_cr0->et = 1; // Set the shadow register to catch non-virtualized flags *shadow_cr0 = *guest_cr0; // Paging is always enabled - shadow_cr0->pg = 1; + shadow_cr0->pg = 1; + + if (guest_cr0->pg == 0) { + // If paging is not enabled by the guest, then we always enable write-protect to catch memory hooks + shadow_cr0->wp = 1; + } // Was there a paging transition // Meaning we need to change the page tables @@ -219,9 +225,9 @@ int v3_handle_cr0_read(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } @@ -293,9 +299,9 @@ int v3_handle_cr3_write(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -324,19 +330,13 @@ int v3_handle_cr3_write(struct guest_info * info) { } - - // If Paging is enabled in the guest then we need to change the shadow page tables if (info->mem_mode == VIRTUAL_MEM) { - if (info->shdw_pg_state.prev_guest_cr3 != info->shdw_pg_state.guest_cr3) { - if (v3_activate_shadow_pt(info) == -1) { - PrintError("Failed to activate 32 bit shadow page table\n"); - return -1; - } + if (v3_activate_shadow_pt(info) == -1) { + PrintError("Failed to activate 32 bit shadow page table\n"); + return -1; } } - - info->shdw_pg_state.prev_guest_cr3 = info->shdw_pg_state.guest_cr3; PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n", (void *)(addr_t)(info->ctrl_regs.cr3), @@ -376,9 +376,9 @@ int v3_handle_cr3_read(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -430,7 +430,7 @@ int v3_handle_cr3_read(struct guest_info * info) { // We don't need to virtualize CR4, all we need is to detect the activation of PAE int v3_handle_cr4_read(struct guest_info * info) { - // PrintError("CR4 Read not handled\n"); + PrintError("CR4 Read not handled\n"); // Do nothing... return 0; } @@ -443,9 +443,9 @@ int v3_handle_cr4_write(struct guest_info * info) { v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info); if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -460,6 +460,7 @@ int v3_handle_cr4_write(struct guest_info * info) { // Check to see if we need to flush the tlb + if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) { struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand); struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4); @@ -474,7 +475,7 @@ int v3_handle_cr4_write(struct guest_info * info) { (cr4->pge != new_cr4->pge) || (cr4->pae != new_cr4->pae)) { PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n"); - flush_tlb=1; + flush_tlb = 1; } } @@ -533,49 +534,97 @@ int v3_handle_cr4_write(struct guest_info * info) { return -1; } - - if (flush_tlb) { - PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n"); - if (v3_activate_shadow_pt(info) == -1) { - PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n"); - return -1; + if (info->shdw_pg_mode == SHADOW_PAGING) { + if (flush_tlb) { + PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n"); + if (v3_activate_shadow_pt(info) == -1) { + PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n"); + return -1; + } } } - info->rip += dec_instr.instr_length; return 0; } -int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) { - struct guest_info * info = (struct guest_info *)(priv_data); - PrintDebug("EFER Read HI=%x LO=%x\n", info->shdw_pg_state.guest_efer.hi, info->shdw_pg_state.guest_efer.lo); +int v3_handle_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) { + PrintDebug("EFER Read HI=%x LO=%x\n", core->shdw_pg_state.guest_efer.hi, core->shdw_pg_state.guest_efer.lo); - dst->value = info->shdw_pg_state.guest_efer.value; + dst->value = core->shdw_pg_state.guest_efer.value; return 0; } - -// TODO: this is a disaster we need to clean this up... -int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) { - struct guest_info * info = (struct guest_info *)(priv_data); - //struct efer_64 * new_efer = (struct efer_64 *)&(src.value); - struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer); - struct v3_msr * guest_efer = &(info->shdw_pg_state.guest_efer); - - PrintDebug("EFER Write\n"); - PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo); - //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer)); +int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { + struct v3_msr * vm_efer = &(core->shdw_pg_state.guest_efer); + struct efer_64 * hw_efer = (struct efer_64 *)&(core->ctrl_regs.efer); + struct efer_64 old_hw_efer = *((struct efer_64 *)&core->ctrl_regs.efer); - // We virtualize the guests efer to hide the SVME and LMA bits - guest_efer->value = src.value; - - - // Enable/Disable Syscall - shadow_efer->sce = src.value & 0x1; + PrintDebug("EFER Write HI=%x LO=%x\n", src.hi, src.lo); + + // Set EFER value seen by guest if it reads EFER + vm_efer->value = src.value; + + // Set EFER value seen by hardware while the guest is running + *(uint64_t *)hw_efer = src.value; + + // We have gotten here either because we are using + // shadow paging, or we are using nested paging on SVM + // In the latter case, we don't need to do anything + // like the following + if (core->shdw_pg_mode == SHADOW_PAGING) { + // Catch unsupported features + if ((old_hw_efer.lme == 1) && (hw_efer->lme == 0)) { + PrintError("Disabling long mode once it has been enabled is not supported\n"); + return -1; + } + + // Set LME and LMA bits seen by hardware + if (old_hw_efer.lme == 0) { + // Long mode was not previously enabled, so the lme bit cannot + // be set yet. It will be set later when the guest sets CR0.PG + // to enable paging. + hw_efer->lme = 0; + } else { + // Long mode was previously enabled. Ensure LMA bit is set. + // VMX does not automatically set LMA, and this should not affect SVM. + hw_efer->lma = 1; + } + } + + + PrintDebug("RIP=%p\n", (void *)core->rip); + PrintDebug("New EFER value HW(hi=%p), VM(hi=%p)\n", (void *)*(uint64_t *)hw_efer, (void *)vm_efer->value); + + + return 0; +} + +int v3_handle_vm_cr_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) { + /* tell the guest that the BIOS disabled SVM, that way it doesn't get + * confused by the fact that CPUID reports SVM as available but it still + * cannot be used + */ + dst->value = SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis; + PrintDebug("VM_CR Read HI=%x LO=%x\n", dst->hi, dst->lo); + return 0; +} + +int v3_handle_vm_cr_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { + PrintDebug("VM_CR Write\n"); + PrintDebug("VM_CR Write Values: HI=%x LO=%x\n", src.hi, src.lo); + + /* writes to LOCK and SVMDIS are silently ignored (according to the spec), + * other writes indicate the guest wants to use some feature we haven't + * implemented + */ + if (src.value & ~(SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis)) { + PrintDebug("VM_CR write sets unsupported bits: HI=%x LO=%x\n", src.hi, src.lo); + return -1; + } return 0; }