X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_ctrl_regs.c;h=b27df4ba64d3e23b15162f7385260721d8297b3b;hb=e874305a90a64fc14c06c00c8d57f8019709c19f;hp=ba6e9c5ebeb42589cca5389988d66f983b328707;hpb=82b8b87c344fcd1eab22e3f3be5ad54cbb3f8f68;p=palacios.git diff --git a/palacios/src/palacios/vmm_ctrl_regs.c b/palacios/src/palacios/vmm_ctrl_regs.c index ba6e9c5..b27df4b 100644 --- a/palacios/src/palacios/vmm_ctrl_regs.c +++ b/palacios/src/palacios/vmm_ctrl_regs.c @@ -24,6 +24,7 @@ #include #include #include +#include #ifndef CONFIG_DEBUG_CTRL_REGS #undef PrintDebug @@ -44,9 +45,9 @@ int v3_handle_cr0_write(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -107,13 +108,18 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in *guest_cr0 = *new_cr0; // This value must always be set to 1 - guest_cr0->et = 1; + guest_cr0->et = 1; // Set the shadow register to catch non-virtualized flags *shadow_cr0 = *guest_cr0; // Paging is always enabled - shadow_cr0->pg = 1; + shadow_cr0->pg = 1; + + if (guest_cr0->pg == 0) { + // If paging is not enabled by the guest, then we always enable write-protect to catch memory hooks + shadow_cr0->wp = 1; + } // Was there a paging transition // Meaning we need to change the page tables @@ -141,6 +147,8 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in return -1; } } else { + + shadow_cr0->wp = 1; if (v3_activate_passthrough_pt(info) == -1) { PrintError("Failed to activate passthrough page tables\n"); @@ -217,9 +225,9 @@ int v3_handle_cr0_read(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } @@ -291,9 +299,9 @@ int v3_handle_cr3_write(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -320,14 +328,15 @@ int v3_handle_cr3_write(struct guest_info * info) { struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); *guest_cr3 = *new_cr3; } - + + // If Paging is enabled in the guest then we need to change the shadow page tables if (info->mem_mode == VIRTUAL_MEM) { if (v3_activate_shadow_pt(info) == -1) { PrintError("Failed to activate 32 bit shadow page table\n"); return -1; } - } + } PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n", (void *)(addr_t)(info->ctrl_regs.cr3), @@ -367,9 +376,9 @@ int v3_handle_cr3_read(struct guest_info * info) { struct x86_instr dec_instr; if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -434,9 +443,9 @@ int v3_handle_cr4_write(struct guest_info * info) { v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info); if (info->mem_mode == PHYSICAL_MEM) { - ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } else { - ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); + ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) { @@ -465,7 +474,7 @@ int v3_handle_cr4_write(struct guest_info * info) { (cr4->pge != new_cr4->pge) || (cr4->pae != new_cr4->pae)) { PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n"); - flush_tlb=1; + flush_tlb = 1; } } @@ -539,37 +548,62 @@ int v3_handle_cr4_write(struct guest_info * info) { } -int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) { - struct guest_info * info = (struct guest_info *)(priv_data); - PrintDebug("EFER Read HI=%x LO=%x\n", info->shdw_pg_state.guest_efer.hi, info->shdw_pg_state.guest_efer.lo); +int v3_handle_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) { + PrintDebug("EFER Read HI=%x LO=%x\n", core->shdw_pg_state.guest_efer.hi, core->shdw_pg_state.guest_efer.lo); - dst->value = info->shdw_pg_state.guest_efer.value; + dst->value = core->shdw_pg_state.guest_efer.value; - info->rip += 2; // WRMSR/RDMSR are two byte operands return 0; } // TODO: this is a disaster we need to clean this up... -int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) { - struct guest_info * info = (struct guest_info *)(priv_data); +int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { //struct efer_64 * new_efer = (struct efer_64 *)&(src.value); - struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer); - struct v3_msr * guest_efer = &(info->shdw_pg_state.guest_efer); + struct efer_64 * shadow_efer = (struct efer_64 *)&(core->ctrl_regs.efer); + struct v3_msr * guest_efer = &(core->shdw_pg_state.guest_efer); PrintDebug("EFER Write\n"); PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo); + //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer)); // We virtualize the guests efer to hide the SVME and LMA bits guest_efer->value = src.value; - - // Enable/Disable Syscall - shadow_efer->sce = src.value & 0x1; - - info->rip += 2; // WRMSR/RDMSR are two byte operands + if (core->shdw_pg_mode == SHADOW_PAGING) { + // Enable/Disable Syscall + shadow_efer->sce = src.value & 0x1; + } else if (core->shdw_pg_mode == NESTED_PAGING) { + *(uint64_t *)shadow_efer = src.value; + shadow_efer->svme = 1; + } + return 0; +} + +int v3_handle_vm_cr_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) { + /* tell the guest that the BIOS disabled SVM, that way it doesn't get + * confused by the fact that CPUID reports SVM as available but it still + * cannot be used + */ + dst->value = SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis; + PrintDebug("VM_CR Read HI=%x LO=%x\n", dst->hi, dst->lo); + return 0; +} + +int v3_handle_vm_cr_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) { + PrintDebug("VM_CR Write\n"); + PrintDebug("VM_CR Write Values: HI=%x LO=%x\n", src.hi, src.lo); + + /* writes to LOCK and SVMDIS are silently ignored (according to the spec), + * other writes indicate the guest wants to use some feature we haven't + * implemented + */ + if (src.value & ~(SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis)) { + PrintDebug("VM_CR write sets unsupported bits: HI=%x LO=%x\n", src.hi, src.lo); + return -1; + } return 0; }