X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_ctrl_regs.c;h=add91ff5ea4842adb3a3ad538877aa00ad32d5a0;hb=c0ecfba627c1d6c3f46d59bd4e5e6f883a494dc4;hp=c80f60594eee113b04ee46dd6baec8021e725107;hpb=7d952ce4fdc0d677e369a6507b4dcfffeeae17a3;p=palacios.git

diff --git a/palacios/src/palacios/vmm_ctrl_regs.c b/palacios/src/palacios/vmm_ctrl_regs.c
index c80f605..add91ff 100644
--- a/palacios/src/palacios/vmm_ctrl_regs.c
+++ b/palacios/src/palacios/vmm_ctrl_regs.c
@@ -49,9 +49,14 @@ int v3_handle_cr0_write(struct guest_info * info) {
     } else { 
 	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
     }
+
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
     
     if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
-	PrintError("Could not decode instruction\n");
+        PrintError(info->vm_info, info, "Could not decode instruction\n");
 	return -1;
     }
 
@@ -69,7 +74,7 @@ int v3_handle_cr0_write(struct guest_info * info) {
 	    return -1;
 	}
     } else {
-	PrintError("Unhandled opcode in handle_cr0_write\n");
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr0_write\n");
 	return -1;
     }
     
@@ -91,12 +96,12 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in
     struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
     uint_t paging_transition = 0;
     
-    PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+    PrintDebug(info->vm_info, info, "MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
     
-    PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
+    PrintDebug(info->vm_info, info, "OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
     
-    PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
-    PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);	
+    PrintDebug(info->vm_info, info, "Old CR0=%x\n", *(uint_t *)shadow_cr0);
+    PrintDebug(info->vm_info, info, "Old Guest CR0=%x\n", *(uint_t *)guest_cr0);	
     
     
     // We detect if this is a paging transition
@@ -131,19 +136,19 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in
 	    
 	    // Check long mode LME to set LME
 	    if (guest_efer->lme == 1) {
-		PrintDebug("Enabing Long Mode\n");
+		PrintDebug(info->vm_info, info, "Enabing Long Mode\n");
 		guest_efer->lma = 1;
 		
 		shadow_efer->lma = 1;
 		shadow_efer->lme = 1;
 		
-		PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
+		PrintDebug(info->vm_info, info, "New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
 	    }
 	    
-	    PrintDebug("Activating Shadow Page Tables\n");
+	    PrintDebug(info->vm_info, info, "Activating Shadow Page Tables\n");
 	    
 	    if (v3_activate_shadow_pt(info) == -1) {
-		PrintError("Failed to activate shadow page tables\n");
+		PrintError(info->vm_info, info, "Failed to activate shadow page tables\n");
 		return -1;
 	    }
 	} else {
@@ -151,15 +156,15 @@ static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_in
 	    shadow_cr0->wp = 1;
 	    
 	    if (v3_activate_passthrough_pt(info) == -1) {
-		PrintError("Failed to activate passthrough page tables\n");
+		PrintError(info->vm_info, info, "Failed to activate passthrough page tables\n");
 		return -1;
 	    }
 	}
     }
     
     
-    PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);  
-    PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
+    PrintDebug(info->vm_info, info, "New Guest CR0=%x\n",*(uint_t *)guest_cr0);  
+    PrintDebug(info->vm_info, info, "New CR0=%x\n", *(uint_t *)shadow_cr0);
     
     return 0;
 }
@@ -187,28 +192,28 @@ static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
     struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->dst_operand.operand);	
     uchar_t new_cr0_val;
     
-    PrintDebug("LMSW\n");
+    PrintDebug(info->vm_info, info, "LMSW\n");
     
     new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
     
-    PrintDebug("OperandVal = %x\n", new_cr0_val);
+    PrintDebug(info->vm_info, info, "OperandVal = %x\n", new_cr0_val);
     
     // We can just copy the new value through
     // we don't need to virtualize the lower 4 bits
-    PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);	
+    PrintDebug(info->vm_info, info, "Old CR0=%x\n", *(uint_t *)real_cr0);	
     *(uchar_t*)real_cr0 &= 0xf0;
     *(uchar_t*)real_cr0 |= new_cr0_val;
-    PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);	
+    PrintDebug(info->vm_info, info, "New CR0=%x\n", *(uint_t *)real_cr0);	
     
     
     // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
     if (info->shdw_pg_mode == SHADOW_PAGING) {
 	struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
 	
-	PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);	
+	PrintDebug(info->vm_info, info, "Old Guest CR0=%x\n", *(uint_t *)guest_cr0);	
 	*(uchar_t*)guest_cr0 &= 0xf0;
 	*(uchar_t*)guest_cr0 |= new_cr0_val;
-	PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);	
+	PrintDebug(info->vm_info, info, "New Guest CR0=%x\n", *(uint_t *)guest_cr0);	
     }
     return 0;
 }
@@ -229,15 +234,19 @@ int v3_handle_cr0_read(struct guest_info * info) {
     } else { 
 	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
     }
-    
+
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
     
     if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
-	PrintError("Could not decode instruction\n");
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
 	return -1;
     }
     
     if (dec_instr.op_type == V3_OP_MOVCR2) {
-	PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+	PrintDebug(info->vm_info, info, "MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
 
 	if ((v3_get_vm_cpu_mode(info) == LONG) || 
 	    (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
@@ -251,7 +260,7 @@ int v3_handle_cr0_read(struct guest_info * info) {
 		*dst_reg = *shadow_cr0;
 	    }
 
-	    PrintDebug("returned CR0: %p\n", (void *)*(addr_t *)dst_reg);
+	    PrintDebug(info->vm_info, info, "returned CR0: %p\n", (void *)*(addr_t *)dst_reg);
 	} else {
 	    struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
 	
@@ -263,7 +272,7 @@ int v3_handle_cr0_read(struct guest_info * info) {
 		*dst_reg = *shadow_cr0;
 	    }
 
-	    PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
+	    PrintDebug(info->vm_info, info, "returned CR0: %x\n", *(uint_t*)dst_reg);
 	}
 
     } else if (dec_instr.op_type == V3_OP_SMSW) {
@@ -271,7 +280,7 @@ int v3_handle_cr0_read(struct guest_info * info) {
 	struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
 	char cr0_val = *(char*)shadow_cr0 & 0x0f;
 	
-	PrintDebug("SMSW\n");
+	PrintDebug(info->vm_info, info, "SMSW\n");
 	
 	// The lower 4 bits of the guest/shadow CR0 are mapped through
 	// We can treat nested and shadow paging the same here
@@ -279,7 +288,7 @@ int v3_handle_cr0_read(struct guest_info * info) {
 	*(char *)dst_reg |= cr0_val;
 	
     } else {
-	PrintError("Unhandled opcode in handle_cr0_read\n");
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr0_read\n");
 	return -1;
     }
     
@@ -304,16 +313,21 @@ int v3_handle_cr3_write(struct guest_info * info) {
 	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
     }
     
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
     if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
-	PrintError("Could not decode instruction\n");
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
 	return -1;
     }
     
     if (dec_instr.op_type == V3_OP_MOV2CR) {
-	PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+	PrintDebug(info->vm_info, info, "MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
 	
 	if (info->shdw_pg_mode == SHADOW_PAGING) {
-	    PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n", 
+	    PrintDebug(info->vm_info, info, "Old Shadow CR3=%p; Old Guest CR3=%p\n", 
 		       (void *)(addr_t)(info->ctrl_regs.cr3), 
 		       (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
 	    
@@ -333,12 +347,12 @@ int v3_handle_cr3_write(struct guest_info * info) {
 	    // If Paging is enabled in the guest then we need to change the shadow page tables
 	    if (info->mem_mode == VIRTUAL_MEM) {
 		if (v3_activate_shadow_pt(info) == -1) {
-		    PrintError("Failed to activate 32 bit shadow page table\n");
+		    PrintError(info->vm_info, info, "Failed to activate 32 bit shadow page table\n");
 		    return -1;
 		}
 	    }
 	    
-	    PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n", 
+	    PrintDebug(info->vm_info, info, "New Shadow CR3=%p; New Guest CR3=%p\n", 
 		       (void *)(addr_t)(info->ctrl_regs.cr3), 
 		       (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
 	    
@@ -357,7 +371,7 @@ int v3_handle_cr3_write(struct guest_info * info) {
 	    
 	}
     } else {
-	PrintError("Unhandled opcode in handle_cr3_write\n");
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr3_write\n");
 	return -1;
     }
     
@@ -381,13 +395,18 @@ int v3_handle_cr3_read(struct guest_info * info) {
 	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
     }
     
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
     if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
-	PrintError("Could not decode instruction\n");
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
 	return -1;
     }
     
     if (dec_instr.op_type == V3_OP_MOVCR2) {
-	PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+	PrintDebug(info->vm_info, info, "MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
 	
 	if (info->shdw_pg_mode == SHADOW_PAGING) {
 	    
@@ -418,7 +437,7 @@ int v3_handle_cr3_read(struct guest_info * info) {
 	}
 	
     } else {
-	PrintError("Unhandled opcode in handle_cr3_read\n");
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr3_read\n");
 	return -1;
     }
     
@@ -428,13 +447,66 @@ int v3_handle_cr3_read(struct guest_info * info) {
 }
 
 
-// We don't need to virtualize CR4, all we need is to detect the activation of PAE
+//return guest cr4 - shadow PAE is always on
 int v3_handle_cr4_read(struct guest_info * info) {
-    PrintError("CR4 Read not handled\n");
-    // Do nothing...
+    uchar_t instr[15];
+    int ret;
+    struct x86_instr dec_instr;
+    
+    if (info->mem_mode == PHYSICAL_MEM) { 
+	ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    } else { 
+	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    }
+    
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
+    if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
+	return -1;
+    }
+    if (dec_instr.op_type != V3_OP_MOVCR2) {
+	PrintError(info->vm_info, info, "Invalid opcode in read CR4\n");
+	return -1;
+    }
+	
+	if (info->shdw_pg_mode == SHADOW_PAGING) {
+	    
+	    if ((v3_get_vm_cpu_mode(info) == LONG) || 
+		(v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
+		struct cr4_64 * dst_reg = (struct cr4_64 *)(dec_instr.dst_operand.operand);
+		struct cr4_64 * guest_cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
+		*dst_reg = *guest_cr4;
+	    } 
+	    else {
+		struct cr4_32 * dst_reg = (struct cr4_32 *)(dec_instr.dst_operand.operand);
+		struct cr4_32 * guest_cr4 = (struct cr4_32 *)&(info->shdw_pg_state.guest_cr4);
+		*dst_reg = *guest_cr4;
+	    }
+	    
+	} else if (info->shdw_pg_mode == NESTED_PAGING) {
+	    
+	    
+	    if ((v3_get_vm_cpu_mode(info) == LONG) || 
+		(v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
+		struct cr4_64 * dst_reg = (struct cr4_64 *)(dec_instr.dst_operand.operand);
+		struct cr4_64 * guest_cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
+		*dst_reg = *guest_cr4;
+	    } else {
+		struct cr4_32 * dst_reg = (struct cr4_32 *)(dec_instr.dst_operand.operand);
+		struct cr4_32 * guest_cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+		*dst_reg = *guest_cr4;
+	    }
+	}
+	
+	info->rip += dec_instr.instr_length;
     return 0;
 }
 
+
 int v3_handle_cr4_write(struct guest_info * info) {
     uchar_t instr[15];
     int ret;
@@ -448,13 +520,19 @@ int v3_handle_cr4_write(struct guest_info * info) {
 	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
     }
     
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
+
     if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
-	PrintError("Could not decode instruction\n");
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
 	return -1;
     }
     
     if (dec_instr.op_type != V3_OP_MOV2CR) {
-	PrintError("Invalid opcode in write to CR4\n");
+	PrintError(info->vm_info, info, "Invalid opcode in write to CR4\n");
 	return -1;
     }
     
@@ -463,7 +541,7 @@ int v3_handle_cr4_write(struct guest_info * info) {
 
     if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) { 
 	struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
-	struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+	struct cr4_32 * cr4 = (struct cr4_32 *)&(info->shdw_pg_state.guest_cr4);
 	
 	// if pse, pge, or pae have changed while PG (in any mode) is on
 	// the side effect is a TLB flush, which means we need to
@@ -474,7 +552,7 @@ int v3_handle_cr4_write(struct guest_info * info) {
 	if ((cr4->pse != new_cr4->pse) || 
 	    (cr4->pge != new_cr4->pge) || 
 	    (cr4->pae != new_cr4->pae)) { 
-	    PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
+	    PrintDebug(info->vm_info, info, "Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
 	    flush_tlb = 1;
 	    
 	}
@@ -483,62 +561,64 @@ int v3_handle_cr4_write(struct guest_info * info) {
 
     if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
 	struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
-	struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
-	
-	PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
-	PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
+	struct cr4_32 * shadow_cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+	struct cr4_32 * guest_cr4 = (struct cr4_32 *)&(info->shdw_pg_state.guest_cr4);
+	PrintDebug(info->vm_info, info, "OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
+	PrintDebug(info->vm_info, info, "Old guest CR4=%x\n", *(uint_t *)guest_cr4);
 	
 	if ((info->shdw_pg_mode == SHADOW_PAGING)) { 
 	    if (v3_get_vm_mem_mode(info) == PHYSICAL_MEM) {
 		
-		if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
-		    PrintDebug("Creating PAE passthrough tables\n");
+		if ((guest_cr4->pae == 0) && (new_cr4->pae == 1)) {
+		    PrintDebug(info->vm_info, info, "Creating PAE passthrough tables\n");
 		    
 		    // create 32 bit PAE direct map page table
 		    if (v3_reset_passthrough_pts(info) == -1) {
-			PrintError("Could not create 32 bit PAE passthrough pages tables\n");
+			PrintError(info->vm_info, info, "Could not create 32 bit PAE passthrough pages tables\n");
 			return -1;
 		    }
 
 		    // reset cr3 to new page tables
 		    info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
 		    
-		} else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
+		} else if ((guest_cr4->pae == 1) && (new_cr4->pae == 0)) {
 		    // Create passthrough standard 32bit pagetables
-		    PrintError("Switching From PAE to Protected mode not supported\n");
+		    PrintError(info->vm_info, info, "Switching From PAE to Protected mode not supported\n");
 		    return -1;
 		} 
 	    }
 	}
 	
-	*cr4 = *new_cr4;
-	PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
+	*guest_cr4 = *new_cr4;
+	*shadow_cr4 = *guest_cr4;
+	shadow_cr4->pae = 1;   // always on for the shadow pager
+	PrintDebug(info->vm_info, info, "New guest CR4=%x and shadow CR4=%x\n", *(uint_t *)guest_cr4,*(uint_t*)shadow_cr4);
 	
     } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
 	struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
 	struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
 	
-	PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
-	PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
+	PrintDebug(info->vm_info, info, "Old CR4=%p\n", (void *)*(addr_t *)cr4);
+	PrintDebug(info->vm_info, info, "New CR4=%p\n", (void *)*(addr_t *)new_cr4);
 	
 	if (new_cr4->pae == 0) {
 	    // cannot turn off PAE in long mode GPF the guest
-	    PrintError("Cannot disable PAE in long mode, should send GPF\n");
+	    PrintError(info->vm_info, info, "Cannot disable PAE in long mode, should send GPF\n");
 	    return -1;
 	}
 	
 	*cr4 = *new_cr4;
 	
     } else {
-	PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
+	PrintError(info->vm_info, info, "CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
 	return -1;
     }
     
     if (info->shdw_pg_mode == SHADOW_PAGING) {
 	if (flush_tlb) {
-	    PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
+	    PrintDebug(info->vm_info, info, "Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
 	    if (v3_activate_shadow_pt(info) == -1) {
-		PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
+		PrintError(info->vm_info, info, "Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
 		return -1;
 	    }
 	}
@@ -549,8 +629,131 @@ int v3_handle_cr4_write(struct guest_info * info) {
 }
 
 
+/*
+  The CR8 and APIC TPR interaction are kind of crazy.
+
+  CR8 mandates that the priority class is in bits 3:0
+
+  The interaction of CR8 and an actual APIC is somewhat implementation dependent, but
+  a basic current APIC has the priority class at 7:4 and the *subclass* at 3:0
+
+  The APIC TPR (both fields) can be written as the APIC register
+  A write to CR8 sets the priority class field, and should zero the subclass
+  A read from CR8 gets just the priority class field
+
+  In the apic_tpr storage location, we have:
+
+     zeros [class] [subclass]
+
+  Because of this, an APIC implementation should use apic_tpr to store its TPR
+  In fact, it *should* do this, otherwise its TPR may get out of sync with the architected TPR
+
+  On a CR8 read, we return just 
+
+     zeros 0000  [class]
+
+  On a CR8 write, we set the register to
+
+     zeros [class] 0000
+
+*/
+
+int v3_handle_cr8_write(struct guest_info * info) {
+    int ret;
+    uchar_t instr[15];
+    struct x86_instr dec_instr;
+    
+    if (info->mem_mode == PHYSICAL_MEM) { 
+	ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    } else { 
+	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    }
+    
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
+    if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
+	return -1;
+    }
+    
+    if (dec_instr.op_type == V3_OP_MOV2CR) {
+	PrintDebug(info->vm_info, info, "MOV2CR8 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+	
+	if ((info->cpu_mode == LONG) ||
+	    (info->cpu_mode == LONG_32_COMPAT)) {
+	    uint64_t *val = (uint64_t *)(dec_instr.src_operand.operand);
+
+	    info->ctrl_regs.apic_tpr = (*val & 0xf) << 4;
+
+	    V3_Print(info->vm_info, info, "Write of CR8 sets apic_tpr to 0x%llx\n",info->ctrl_regs.apic_tpr);
+
+	}  else {
+	    // probably should raise exception here
+	}
+    } else {
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr8_write\n");
+	return -1;
+    }
+    
+    info->rip += dec_instr.instr_length;
+    
+    return 0;
+}
+
+
+
+int v3_handle_cr8_read(struct guest_info * info) {
+    uchar_t instr[15];
+    int ret;
+    struct x86_instr dec_instr;
+    
+    if (info->mem_mode == PHYSICAL_MEM) { 
+	ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    } else { 
+	ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+    }
+    
+    if (ret!=15) { 
+	PrintError(info->vm_info, info, "Could not read instruction\n");
+	return -1;
+    }
+    
+    if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+	PrintError(info->vm_info, info, "Could not decode instruction\n");
+	return -1;
+    }
+    
+    if (dec_instr.op_type == V3_OP_MOVCR2) {
+	PrintDebug(info->vm_info, info, "MOVCR82 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+	
+	if ((info->cpu_mode == LONG) || 
+	    (info->cpu_mode == LONG_32_COMPAT)) {
+	    uint64_t *dst_reg = (uint64_t *)(dec_instr.dst_operand.operand);
+
+	    *dst_reg = (info->ctrl_regs.apic_tpr >> 4) & 0xf;
+
+	    V3_Print(info->vm_info, info, "Read of CR8 (apic_tpr) returns 0x%llx\n",*dst_reg);
+
+	} else {
+	    // probably should raise exception
+	}
+	    
+    } else {
+	PrintError(info->vm_info, info, "Unhandled opcode in handle_cr8_read\n");
+	return -1;
+    }
+    
+    info->rip += dec_instr.instr_length;
+    
+    return 0;
+}
+
+
 int v3_handle_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) {
-    PrintDebug("EFER Read HI=%x LO=%x\n", core->shdw_pg_state.guest_efer.hi, core->shdw_pg_state.guest_efer.lo);
+    PrintDebug(core->vm_info, core, "EFER Read HI=%x LO=%x\n", core->shdw_pg_state.guest_efer.hi, core->shdw_pg_state.guest_efer.lo);
     
     dst->value = core->shdw_pg_state.guest_efer.value;
     
@@ -563,7 +766,7 @@ int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src
     struct efer_64 * hw_efer     = (struct efer_64 *)&(core->ctrl_regs.efer);
     struct efer_64   old_hw_efer = *((struct efer_64 *)&core->ctrl_regs.efer);
     
-    PrintDebug("EFER Write HI=%x LO=%x\n", src.hi, src.lo);
+    PrintDebug(core->vm_info, core, "EFER Write HI=%x LO=%x\n", src.hi, src.lo);
 
     // Set EFER value seen by guest if it reads EFER
     vm_efer->value = src.value;
@@ -578,7 +781,7 @@ int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src
     if (core->shdw_pg_mode == SHADOW_PAGING) { 
       // Catch unsupported features
       if ((old_hw_efer.lme == 1) && (hw_efer->lme == 0)) {
-	PrintError("Disabling long mode once it has been enabled is not supported\n");
+	PrintError(core->vm_info, core, "Disabling long mode once it has been enabled is not supported\n");
 	return -1;
       }
       
@@ -596,8 +799,8 @@ int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src
     }
       
       
-    PrintDebug("RIP=%p\n", (void *)core->rip);
-    PrintDebug("New EFER value HW(hi=%p), VM(hi=%p)\n", (void *)*(uint64_t *)hw_efer, (void *)vm_efer->value); 
+    PrintDebug(core->vm_info, core, "RIP=%p\n", (void *)core->rip);
+    PrintDebug(core->vm_info, core, "New EFER value HW(hi=%p), VM(hi=%p)\n", (void *)*(uint64_t *)hw_efer, (void *)vm_efer->value); 
 
 
     return 0;
@@ -609,20 +812,20 @@ int v3_handle_vm_cr_read(struct guest_info * core, uint_t msr, struct v3_msr * d
      * cannot be used 
      */
     dst->value = SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis;
-    PrintDebug("VM_CR Read HI=%x LO=%x\n", dst->hi, dst->lo);
+    PrintDebug(core->vm_info, core, "VM_CR Read HI=%x LO=%x\n", dst->hi, dst->lo);
     return 0;
 }
 
 int v3_handle_vm_cr_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) {
-    PrintDebug("VM_CR Write\n");
-    PrintDebug("VM_CR Write Values: HI=%x LO=%x\n", src.hi, src.lo);
+    PrintDebug(core->vm_info, core, "VM_CR Write\n");
+    PrintDebug(core->vm_info, core, "VM_CR Write Values: HI=%x LO=%x\n", src.hi, src.lo);
 
     /* writes to LOCK and SVMDIS are silently ignored (according to the spec), 
      * other writes indicate the guest wants to use some feature we haven't
      * implemented
      */
     if (src.value & ~(SVM_VM_CR_MSR_lock | SVM_VM_CR_MSR_svmdis)) {
-	PrintDebug("VM_CR write sets unsupported bits: HI=%x LO=%x\n", src.hi, src.lo);
+	PrintDebug(core->vm_info, core, "VM_CR write sets unsupported bits: HI=%x LO=%x\n", src.hi, src.lo);
 	return -1;
     }