X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_ctrl_regs.c;h=931fc87316504a38df9a7e0e5ce2c7f34214f331;hb=08a79dd2e3c75109539bdce50c049303b1fb0912;hp=58d0465be264a8546130acd5e9f938c9edbdb75a;hpb=684409c4ad29c0f06167bebf2bb51e21374a6840;p=palacios-OLD.git diff --git a/palacios/src/palacios/vmm_ctrl_regs.c b/palacios/src/palacios/vmm_ctrl_regs.c index 58d0465..931fc87 100644 --- a/palacios/src/palacios/vmm_ctrl_regs.c +++ b/palacios/src/palacios/vmm_ctrl_regs.c @@ -9,6 +9,81 @@ extern void SerialMemDump(unsigned char *start, int n); + +#if VMM_DEBUG +void PrintCtrlRegs(struct guest_info *info) +{ + struct cr0_32 cr0 = *((struct cr0_32 *) &(info->ctrl_regs.cr0)); + struct cr2_32 cr2 = *((struct cr2_32 *) &(info->ctrl_regs.cr2)); + struct cr3_32 cr3 = *((struct cr3_32 *) &(info->ctrl_regs.cr3)); + struct cr4_32 cr4 = *((struct cr4_32 *) &(info->ctrl_regs.cr4)); + struct rflags rflags = *((struct rflags *) &(info->ctrl_regs.rflags)); + + PrintDebug("CR0: pe 0x%x\n",cr0.pe); + PrintDebug("CR0: mp 0x%x\n",cr0.mp); + PrintDebug("CR0: em 0x%x\n",cr0.em); + PrintDebug("CR0: ts 0x%x\n",cr0.ts); + PrintDebug("CR0: et 0x%x\n",cr0.et); + PrintDebug("CR0: ne 0x%x\n",cr0.ne); + PrintDebug("CR0: rsvd1 0x%x\n",cr0.rsvd1); + PrintDebug("CR0: wp 0x%x\n",cr0.wp); + PrintDebug("CR0: rsvd2 0x%x\n",cr0.rsvd2); + PrintDebug("CR0: am 0x%x\n",cr0.am); + PrintDebug("CR0: rsvd3 0x%x\n",cr0.rsvd3); + PrintDebug("CR0: nw 0x%x\n",cr0.nw); + PrintDebug("CR0: cd 0x%x\n",cr0.cd); + PrintDebug("CR0: pg 0x%x\n",cr0.pg); + + PrintDebug("CR2: pfadd 0x%x\n",cr2.pf_vaddr); + + PrintDebug("CR3: rsvd1 0x%x\n",cr3.rsvd1); + PrintDebug("CR3: pwt 0x%x\n",cr3.pwt); + PrintDebug("CR3: pcd 0x%x\n",cr3.pcd); + PrintDebug("CR3: rsvd2 0x%x\n",cr3.rsvd2); + PrintDebug("CR3: pdt 0x%x\n",cr3.pdt_base_addr); + + PrintDebug("CR4: vme 0x%x\n",cr4.vme); + PrintDebug("CR4: pvi 0x%x\n",cr4.pvi); + PrintDebug("CR4: tsd 0x%x\n",cr4.tsd); + PrintDebug("CR4: de 0x%x\n",cr4.de); + PrintDebug("CR4: pse 0x%x\n",cr4.pse); + PrintDebug("CR4: pae 0x%x\n",cr4.pae); + PrintDebug("CR4: mce 0x%x\n",cr4.mce); + PrintDebug("CR4: pge 0x%x\n",cr4.pge); + PrintDebug("CR4: pce 0x%x\n",cr4.pce); + PrintDebug("CR4: osfx 0x%x\n",cr4.osf_xsr); + PrintDebug("CR4: osx 0x%x\n",cr4.osx); + PrintDebug("CR4: rsvd1 0x%x\n",cr4.rsvd1); + + PrintDebug("RFLAGS: cf 0x%x\n",rflags.cf); + PrintDebug("RFLAGS: rsvd1 0x%x\n",rflags.rsvd1); + PrintDebug("RFLAGS: pf 0x%x\n",rflags.pf); + PrintDebug("RFLAGS: rsvd2 0x%x\n",rflags.rsvd2); + PrintDebug("RFLAGS: af 0x%x\n",rflags.af); + PrintDebug("RFLAGS: rsvd3 0x%x\n",rflags.rsvd3); + PrintDebug("RFLAGS: zf 0x%x\n",rflags.zf); + PrintDebug("RFLAGS: sf 0x%x\n",rflags.sf); + PrintDebug("RFLAGS: tf 0x%x\n",rflags.tf); + PrintDebug("RFLAGS: intr 0x%x\n",rflags.intr); + PrintDebug("RFLAGS: df 0x%x\n",rflags.df); + PrintDebug("RFLAGS: of 0x%x\n",rflags.of); + PrintDebug("RFLAGS: iopl 0x%x\n",rflags.iopl); + PrintDebug("RFLAGS: nt 0x%x\n",rflags.nt); + PrintDebug("RFLAGS: rsvd4 0x%x\n",rflags.rsvd4); + PrintDebug("RFLAGS: rf 0x%x\n",rflags.rf); + PrintDebug("RFLAGS: vm 0x%x\n",rflags.vm); + PrintDebug("RFLAGS: ac 0x%x\n",rflags.ac); + PrintDebug("RFLAGS: vif 0x%x\n",rflags.vif); + PrintDebug("RFLAGS: id 0x%x\n",rflags.id); + PrintDebug("RFLAGS: rsvd5 0x%x\n",rflags.rsvd5); + PrintDebug("RFLAGS: rsvd6 0x%x\n",rflags.rsvd6); + +} +#else +void PrintCtrlRegs(struct guest_info *info) +{} +#endif + /* Segmentation is a problem here... * * When we get a memory operand, presumably we use the default segment (which is?) @@ -146,6 +221,12 @@ int handle_cr0_write(struct guest_info * info) { info->cpu_mode = PROTECTED; } + if (new_cr0->pe == 0) { + PrintDebug("Entering Real Mode\n"); + info->cpu_mode = REAL; + } + + if (new_cr0->pg == 1) { PrintDebug("Paging is already turned on in switch to protected mode in CR0 write\n"); @@ -201,6 +282,7 @@ int handle_cr0_write(struct guest_info * info) { ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } + if (ret != 15) { // I think we should inject a GPF into the guest PrintDebug("Could not read instruction (ret=%d)\n", ret); @@ -280,8 +362,8 @@ int handle_cr0_write(struct guest_info * info) { (instr[index + 1] == 0x06)) { // CLTS instruction PrintDebug("CLTS instruction - clearing TS flag of real and shadow CR0\n"); - shadow_cr0->ts=0; - real_cr0->ts=0; + shadow_cr0->ts = 0; + real_cr0->ts = 0; index+=2; @@ -483,6 +565,11 @@ int handle_cr0_read(struct guest_info * info) { if (info->shdw_pg_mode == SHADOW_PAGING) { *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0); + + if (info->mem_mode == PHYSICAL_MEM) { + virt_cr0->pg = 0; // clear the pg bit because guest doesn't think it's on + } + } else { *virt_cr0 = *real_cr0; } @@ -526,10 +613,14 @@ int handle_cr3_write(struct guest_info * info) { int ret; char instr[15]; + PrintDebug("Protected %s mode write to CR3 at %s 0x%x\n", + info->cpu_mode==PROTECTED ? "" : "Paged", + info->cpu_mode==PROTECTED ? "guest physical" : "guest virtual", + get_addr_linear(info,info->rip,&(info->segments.cs))); // We need to read the instruction, which is at CS:IP, but that // linear address is guest physical without PG and guest virtual with PG - if (info->cpu_mode == PHYSICAL_MEM) { + if (info->mem_mode == PHYSICAL_MEM) { // The real rip address is actually a combination of the rip + CS base PrintDebug("Writing Guest CR3 Write (Physical Address)\n"); ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); @@ -539,7 +630,6 @@ int handle_cr3_write(struct guest_info * info) { ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr); } - if (ret != 15) { PrintDebug("Could not read instruction (ret=%d)\n", ret); return -1; @@ -575,11 +665,16 @@ int handle_cr3_write(struct guest_info * info) { struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3); + if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) { + PrintDebug("Shadow Page Table\n"); + PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3)); + } + /* Delete the current Page Tables */ delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3)); PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n", - info->shdw_pg_state.shadow_cr3, info->shdw_pg_state.guest_cr3); + *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3); *guest_cr3 = *new_cr3; @@ -593,12 +688,21 @@ int handle_cr3_write(struct guest_info * info) { /* Copy Various flags */ *shadow_cr3 = *new_cr3; + { + addr_t tmp_addr; + guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr); + PrintDebug("Guest PD\n"); + PrintPD32((pde32_t *)tmp_addr); + + } + shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt); PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n", - info->shdw_pg_state.shadow_cr3, info->shdw_pg_state.guest_cr3); + *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3); + if (info->mem_mode == VIRTUAL_MEM) { @@ -611,10 +715,11 @@ int handle_cr3_write(struct guest_info * info) { } else { PrintDebug("Unknown Instruction\n"); + SerialMemDump(instr,15); return -1; } } else { - PrintDebug("Invalid operating Mode\n"); + PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode); return -1; } @@ -625,7 +730,7 @@ int handle_cr3_write(struct guest_info * info) { int handle_cr3_read(struct guest_info * info) { - if (info->cpu_mode == PROTECTED) { + if (info->cpu_mode == PROTECTED ) { int index = 0; int ret; char instr[15]; @@ -678,10 +783,12 @@ int handle_cr3_read(struct guest_info * info) { info->rip += index; } else { PrintDebug("Unknown Instruction\n"); + SerialMemDump(instr,15); return -1; } } else { - PrintDebug("Invalid operating Mode\n"); + PrintDebug("Invalid operating Mode (0x%x), control registers follow\n", info->cpu_mode); + PrintCtrlRegs(info); return -1; }