X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmm_config_class.h;h=7b867926ddc53f3e3ec0cecd7c876f67f13d8e22;hb=6fa605075d1944da0a88a389122ea24bbc583329;hp=36fee9b526f85723597f4b2061819b32e9f7f470;hpb=123a1ba27ea09c8fa77a1b36ce625b43d7c48b14;p=palacios.git diff --git a/palacios/src/palacios/vmm_config_class.h b/palacios/src/palacios/vmm_config_class.h index 36fee9b..7b86792 100644 --- a/palacios/src/palacios/vmm_config_class.h +++ b/palacios/src/palacios/vmm_config_class.h @@ -17,11 +17,11 @@ * redistribute, and modify it as specified in the file "V3VEE_LICENSE". */ +#include -static int post_config_pc(struct guest_info * info, struct v3_config * config_ptr) { +static int pre_config_pc_core(struct guest_info * info, v3_cfg_tree_t * cfg) { - info->cpu_mode = REAL; info->mem_mode = PHYSICAL_MEM; @@ -34,29 +34,66 @@ static int post_config_pc(struct guest_info * info, struct v3_config * config_pt info->vm_regs.rcx = 0; info->vm_regs.rax = 0; + return 0; +} + +static int post_config_pc_core(struct guest_info * info, v3_cfg_tree_t * cfg) { + + v3_print_mem_map(info->vm_info); + return 0; +} + +static int post_config_pc(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) { + + +#if defined(V3_CONFIG_SEABIOS) || defined(V3_CONFIG_BOCHSBIOS) #define VGABIOS_START 0x000c0000 -#define ROMBIOS_START 0x000f0000 - /* layout vgabios */ { extern uint8_t v3_vgabios_start[]; extern uint8_t v3_vgabios_end[]; - - addr_t vgabios_dst = v3_get_shadow_addr(&(info->mem_map.base_region), VGABIOS_START); - memcpy(V3_VAddr((void *)vgabios_dst), v3_vgabios_start, v3_vgabios_end - v3_vgabios_start); + void * vgabios_dst = 0; + + if (v3_gpa_to_hva(&(vm->cores[0]), VGABIOS_START, (addr_t *)&vgabios_dst) == -1) { + PrintError(vm, VCORE_NONE, "Could not find VGABIOS destination address\n"); + return -1; + } + + V3_Print(vm,VCORE_NONE,"Mapping VGA BIOS of %llu bytes at address %p\n", (uint64_t)(v3_vgabios_end-v3_vgabios_start), (void*)VGABIOS_START); + memcpy(vgabios_dst, v3_vgabios_start, v3_vgabios_end - v3_vgabios_start); } +#endif + + /* layout rombios */ { extern uint8_t v3_rombios_start[]; extern uint8_t v3_rombios_end[]; + void * rombios_dst = 0; + + if (v3_gpa_to_hva(&(vm->cores[0]), V3_CONFIG_BIOS_START, (addr_t *)&rombios_dst) == -1) { + PrintError(vm, VCORE_NONE, "Could not find ROMBIOS destination address\n"); + return -1; + } + + V3_Print(vm,VCORE_NONE,"Mapping BIOS of %llu bytes at address %p\n", (uint64_t)(v3_rombios_end-v3_rombios_start), (void*)V3_CONFIG_BIOS_START); + memcpy(rombios_dst, v3_rombios_start, v3_rombios_end - v3_rombios_start); + +#ifdef V3_CONFIG_SEABIOS + // SEABIOS is also mapped into end of 4GB region + if (v3_add_shadow_mem(vm, V3_MEM_CORE_ANY, + 0xfffe0000, 0xffffffff, + (addr_t)V3_PAddr(rombios_dst)) == -1) { + PrintError(vm, VCORE_NONE, "Error mapping SEABIOS to end of memory\n"); + return -1; + } + V3_Print(vm,VCORE_NONE,"Additionally mapping SEABIOS of %llu bytes at address %p\n", (uint64_t)(v3_rombios_end-v3_rombios_start), (void*)0xfffe0000); +#endif - addr_t rombios_dst = v3_get_shadow_addr(&(info->mem_map.base_region), ROMBIOS_START); - memcpy(V3_VAddr((void *)rombios_dst), v3_rombios_start, v3_rombios_end - v3_rombios_start); } - v3_print_mem_map(info); return 0; }