X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fvmcs.c;h=2d36a3ff0def5b95a32f0b6ac61bb74b55adae50;hb=33bf43b34feba36dcbfa47f8f559e5862f531393;hp=b4412f66642d29a7f32f342e16c9718fd83122f6;hpb=9b4f278713b808ff34241b21630b1639e5ae0937;p=palacios.releases.git diff --git a/palacios/src/palacios/vmcs.c b/palacios/src/palacios/vmcs.c index b4412f6..2d36a3f 100644 --- a/palacios/src/palacios/vmcs.c +++ b/palacios/src/palacios/vmcs.c @@ -202,6 +202,11 @@ int v3_update_vmcs_ctrl_fields(struct guest_info * info) { vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value); vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value); + vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value); + + if (info->shdw_pg_mode == NESTED_PAGING) { + vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt); + } return vmx_ret; } @@ -226,17 +231,11 @@ int v3_vmx_save_vmcs(struct guest_info * info) { check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7)); check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags)); - if (((struct vmx_data *)info->vmm_data)->ia32e_avail) { + #ifdef __V3_64BIT__ - check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer)); -#else - uint32_t hi, lo; - check_vmcs_read(VMCS_GUEST_EFER, &hi); - check_vmcs_read(VMCS_GUEST_EFER_HIGH, &lo); - info->ctrl_regs.efer = ((uint64_t) hi << 32) | lo; + check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer)); #endif - } - + error = v3_read_vmcs_segments(&(info->segments)); return error; @@ -259,9 +258,13 @@ int v3_vmx_restore_vmcs(struct guest_info * info) { check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags); - if (((struct vmx_data *)info->vmm_data)->ia32e_avail) { - check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer); - } +#ifdef __V3_64BIT__ + check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer); + check_vmcs_write(VMCS_ENTRY_CTRLS, vmx_info->entry_ctrls.value); +#endif + + + error = v3_write_vmcs_segments(&(info->segments)); @@ -324,16 +327,6 @@ int v3_update_vmcs_host_state(struct guest_info * info) { vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base); vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base); -#define FS_BASE_MSR 0xc0000100 -#define GS_BASE_MSR 0xc0000101 - - // FS.BASE MSR - v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value); - - // GS.BASE MSR - v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); - vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value); @@ -421,6 +414,10 @@ int v3_update_vmcs_host_state(struct guest_info * info) { #define SYSENTER_CS_MSR 0x00000174 #define SYSENTER_ESP_MSR 0x00000175 #define SYSENTER_EIP_MSR 0x00000176 +#define FS_BASE_MSR 0xc0000100 +#define GS_BASE_MSR 0xc0000101 +#define EFER_MSR 0xc0000080 + // SYSENTER CS MSR v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); @@ -434,6 +431,33 @@ int v3_update_vmcs_host_state(struct guest_info * info) { v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value); + + // FS.BASE MSR + v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value); + + // GS.BASE MSR + v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value); + + + // EFER + v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo)); + vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value); + + // PERF GLOBAL CONTROL + + // PAT + + + // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area + + + + + + + return vmx_ret; } @@ -541,6 +565,12 @@ static void print_guest_state() print_vmcs_field(VMCS_GUEST_CR4); print_vmcs_field(VMCS_GUEST_DR7); + // if save IA32_EFER + print_vmcs_field(VMCS_GUEST_EFER); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_EFER_HIGH); +#endif + PrintDebug("\n"); @@ -556,6 +586,14 @@ static void print_guest_state() print_vmcs_field(VMCS_GUEST_SYSENTER_ESP); print_vmcs_field(VMCS_GUEST_SYSENTER_EIP); + + // if save IA32_PAT + print_vmcs_field(VMCS_GUEST_PAT); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PAT_HIGH); +#endif + + //if load IA32_PERF_GLOBAL_CTRL print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL); #ifdef __V3_32BIT__ print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH); @@ -564,12 +602,17 @@ static void print_guest_state() print_vmcs_field(VMCS_GUEST_SMBASE); + + PrintDebug("GUEST_NON_REGISTER_STATE\n"); print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE); print_vmcs_field(VMCS_GUEST_INT_STATE); print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP); + // if VMX preempt timer + print_vmcs_field(VMCS_PREEMPT_TIMER); + } static void print_host_state() @@ -582,6 +625,15 @@ static void print_host_state() print_vmcs_field(VMCS_HOST_CR3); print_vmcs_field(VMCS_HOST_CR4); + + + // if load IA32_EFER + print_vmcs_field(VMCS_HOST_EFER); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_HOST_EFER_HIGH); +#endif + + PrintDebug("\n"); print_vmcs_field(VMCS_HOST_CS_SELECTOR); print_vmcs_field(VMCS_HOST_SS_SELECTOR); @@ -603,6 +655,14 @@ static void print_host_state() print_vmcs_field(VMCS_HOST_SYSENTER_ESP); print_vmcs_field(VMCS_HOST_SYSENTER_EIP); + + // if load IA32_PAT + print_vmcs_field(VMCS_HOST_PAT); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_HOST_PAT_HIGH); +#endif + + // if load IA32_PERF_GLOBAL_CTRL print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL); #ifdef __V3_32BIT__ print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH); @@ -614,6 +674,8 @@ static void print_exec_ctrls() { PrintDebug("VMCS_EXEC_CTRL_FIELDS\n"); print_vmcs_field(VMCS_PIN_CTRLS); print_vmcs_field(VMCS_PROC_CTRLS); + + // if activate secondary controls print_vmcs_field(VMCS_SEC_PROC_CTRLS); print_vmcs_field(VMCS_EXCP_BITMAP); @@ -648,20 +710,28 @@ static void print_exec_ctrls() { print_vmcs_field(VMCS_CR3_TGT_VAL_2); print_vmcs_field(VMCS_CR3_TGT_VAL_3); + // Check max number of CR3 targets... may continue... + + PrintDebug("\n"); + // if virtualize apic accesses print_vmcs_field(VMCS_APIC_ACCESS_ADDR); #ifdef __V3_32BIT__ print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH); #endif + // if use tpr shadow print_vmcs_field(VMCS_VAPIC_ADDR); #ifdef __V3_32BIT__ print_vmcs_field(VMCS_VAPIC_ADDR_HIGH); #endif + // if use tpr shadow print_vmcs_field(VMCS_TPR_THRESHOLD); + + // if use MSR bitmaps print_vmcs_field(VMCS_MSR_BITMAP); #ifdef __V3_32BIT__ print_vmcs_field(VMCS_MSR_BITMAP_HIGH); @@ -671,6 +741,50 @@ static void print_exec_ctrls() { #ifdef __V3_32BIT__ print_vmcs_field(VMCS_EXEC_PTR_HIGH); #endif + + +} + +static void print_ept_state() { + V3_Print("VMCS EPT INFO\n"); + + // if enable vpid + print_vmcs_field(VMCS_VPID); + + print_vmcs_field(VMCS_EPT_PTR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_EPT_PTR_HIGH); +#endif + + print_vmcs_field(VMCS_GUEST_PHYS_ADDR); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH); +#endif + + + + print_vmcs_field(VMCS_GUEST_PDPTE0); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH); +#endif + + print_vmcs_field(VMCS_GUEST_PDPTE1); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH); +#endif + + print_vmcs_field(VMCS_GUEST_PDPTE2); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH); +#endif + + print_vmcs_field(VMCS_GUEST_PDPTE3); +#ifdef __V3_32BIT__ + print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH); +#endif + + + } @@ -692,6 +806,11 @@ static void print_exit_ctrls() { print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH); #endif + + // if pause loop exiting + print_vmcs_field(VMCS_PLE_GAP); + print_vmcs_field(VMCS_PLE_WINDOW); + } @@ -750,6 +869,8 @@ void v3_print_vmcs() { print_guest_state(); print_host_state(); + print_ept_state(); + print_exec_ctrls(); print_exit_ctrls(); print_entry_ctrls();