X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fpalacios%2Fsvm.c;h=05fd183b5e55ffb8ff185be054fad77b6661e7d1;hb=60ad6a41c6d0ee08ed689e8505eb0c3df0c2a289;hp=2621fcb55302893fa4abf603c8db7cfa3a5d31d8;hpb=2bfd0e9c8aa5d520e4207fd6cf50a5f50993e3ca;p=palacios.git diff --git a/palacios/src/palacios/svm.c b/palacios/src/palacios/svm.c index 2621fcb..05fd183 100644 --- a/palacios/src/palacios/svm.c +++ b/palacios/src/palacios/svm.c @@ -19,8 +19,6 @@ - - #include #include @@ -38,609 +36,1108 @@ #include #include +#include +#include -#include +#include -extern void v3_stgi(); -extern void v3_clgi(); -extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs); - +#ifdef V3_CONFIG_CHECKPOINT +#include +#endif +#include +#include +#include -static vmcb_t * Allocate_VMCB() { - vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1)); +#include - memset(vmcb_page, 0, 4096); +#ifdef V3_CONFIG_MEM_TRACK +#include +#endif - return vmcb_page; -} +#ifdef V3_CONFIG_TM_FUNC +#include +#endif +#ifndef V3_CONFIG_DEBUG_SVM +#undef PrintDebug +#define PrintDebug(fmt, args...) +#endif -#include -static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) { - vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb); - vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb); - uint_t i; +uint32_t v3_last_exit; +// This is a global pointer to the host's VMCB +static addr_t host_vmcbs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0}; - guest_state->rsp = vm_info->vm_regs.rsp; - // guest_state->rip = vm_info->rip; - guest_state->rip = 0xfff0; - guest_state->cpl = 0; - //ctrl_area->instrs.instrs.CR0 = 1; - ctrl_area->cr_reads.cr0 = 1; - ctrl_area->cr_writes.cr0 = 1; - //ctrl_area->cr_reads.cr4 = 1; - ctrl_area->cr_writes.cr4 = 1; +extern void v3_stgi(); +extern void v3_clgi(); +//extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs); +extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb); - /* Set up the efer to enable 64 bit page tables */ - /* - { - struct efer_64 * efer = (struct efer_64 *)&(guest_state->efer); - struct cr4_32 * cr4 = (struct cr4_32 *)&(guest_state->cr4); - efer->lma = 1; - efer->lme = 1; +static vmcb_t * Allocate_VMCB() { + vmcb_t * vmcb_page = NULL; + addr_t vmcb_pa = (addr_t)V3_AllocPages(1); // need not be shadow safe, not exposed to guest - cr4->pae = 1; - } - */ + if ((void *)vmcb_pa == NULL) { + PrintError(VM_NONE, VCORE_NONE, "Error allocating VMCB\n"); + return NULL; + } - guest_state->efer |= EFER_MSR_svm_enable; - vm_info->guest_efer.value = 0x0LL; + vmcb_page = (vmcb_t *)V3_VAddr((void *)vmcb_pa); - v3_hook_msr(vm_info, EFER_MSR, - &v3_handle_efer_read, - &v3_handle_efer_write, - vm_info); + memset(vmcb_page, 0, 4096); + return vmcb_page; +} - guest_state->rflags = 0x00000002; // The reserved bit is always 1 - ctrl_area->svm_instrs.VMRUN = 1; - ctrl_area->svm_instrs.VMMCALL = 1; - ctrl_area->svm_instrs.VMLOAD = 1; - ctrl_area->svm_instrs.VMSAVE = 1; - ctrl_area->svm_instrs.STGI = 1; - ctrl_area->svm_instrs.CLGI = 1; - ctrl_area->svm_instrs.SKINIT = 1; - ctrl_area->svm_instrs.RDTSCP = 1; - ctrl_area->svm_instrs.ICEBP = 1; - ctrl_area->svm_instrs.WBINVD = 1; - ctrl_area->svm_instrs.MONITOR = 1; - ctrl_area->svm_instrs.MWAIT_always = 1; - ctrl_area->svm_instrs.MWAIT_if_armed = 1; - - - ctrl_area->instrs.HLT = 1; - // guest_state->cr0 = 0x00000001; // PE - ctrl_area->guest_ASID = 1; +static int v3_svm_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) +{ + int status; - - /* - ctrl_area->exceptions.de = 1; - ctrl_area->exceptions.df = 1; - - ctrl_area->exceptions.ts = 1; - ctrl_area->exceptions.ss = 1; - ctrl_area->exceptions.ac = 1; - ctrl_area->exceptions.mc = 1; - ctrl_area->exceptions.gp = 1; - ctrl_area->exceptions.ud = 1; - ctrl_area->exceptions.np = 1; - ctrl_area->exceptions.of = 1; - - ctrl_area->exceptions.nmi = 1; - */ + // Call arch-independent handler + if ((status = v3_handle_efer_write(core, msr, src, priv_data)) != 0) { + return status; + } + // SVM-specific code + { + // Ensure that hardware visible EFER.SVME bit is set (SVM Enable) + struct efer_64 * hw_efer = (struct efer_64 *)&(core->ctrl_regs.efer); + hw_efer->svme = 1; + } - // Debug of boot on physical machines - 7/14/08 - ctrl_area->instrs.NMI=1; - ctrl_area->instrs.SMI=1; - ctrl_area->instrs.INIT=1; - ctrl_area->instrs.PAUSE=1; - ctrl_area->instrs.shutdown_evts=1; + return 0; +} - vm_info->vm_regs.rdx = 0x00000f00; - guest_state->cr0 = 0x60000010; +static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) { + vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb); + vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb); + uint_t i; + + + // + ctrl_area->svm_instrs.VMRUN = 1; + ctrl_area->svm_instrs.VMMCALL = 1; + ctrl_area->svm_instrs.VMLOAD = 1; + ctrl_area->svm_instrs.VMSAVE = 1; + ctrl_area->svm_instrs.STGI = 1; + ctrl_area->svm_instrs.CLGI = 1; + ctrl_area->svm_instrs.SKINIT = 1; + ctrl_area->svm_instrs.ICEBP = 1; + ctrl_area->svm_instrs.WBINVD = 1; + ctrl_area->svm_instrs.MONITOR = 1; + ctrl_area->svm_instrs.MWAIT_always = 1; + ctrl_area->svm_instrs.MWAIT_if_armed = 1; + ctrl_area->instrs.INVLPGA = 1; + ctrl_area->instrs.CPUID = 1; + ctrl_area->instrs.HLT = 1; - guest_state->cs.selector = 0xf000; - guest_state->cs.limit=0xffff; - guest_state->cs.base = 0x0000000f0000LL; - guest_state->cs.attrib.raw = 0xf3; + /* Set at VMM launch as needed */ + ctrl_area->instrs.RDTSC = 0; + ctrl_area->svm_instrs.RDTSCP = 0; + // guest_state->cr0 = 0x00000001; // PE - /* DEBUG FOR RETURN CODE */ - ctrl_area->exit_code = 1; - + /* + ctrl_area->exceptions.de = 1; + ctrl_area->exceptions.df = 1; + + ctrl_area->exceptions.ts = 1; + ctrl_area->exceptions.ss = 1; + ctrl_area->exceptions.ac = 1; + ctrl_area->exceptions.mc = 1; + ctrl_area->exceptions.gp = 1; + ctrl_area->exceptions.ud = 1; + ctrl_area->exceptions.np = 1; + ctrl_area->exceptions.of = 1; + + ctrl_area->exceptions.nmi = 1; + */ - struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL}; - for ( i = 0; segregs[i] != NULL; i++) { - struct vmcb_selector * seg = segregs[i]; +#ifdef V3_CONFIG_TM_FUNC + v3_tm_set_excp_intercepts(ctrl_area); +#endif - seg->selector = 0x0000; - // seg->base = seg->selector << 4; - seg->base = 0x00000000; - seg->attrib.raw = 0xf3; - seg->limit = ~0u; - } - - guest_state->gdtr.limit = 0x0000ffff; - guest_state->gdtr.base = 0x0000000000000000LL; - guest_state->idtr.limit = 0x0000ffff; - guest_state->idtr.base = 0x0000000000000000LL; - guest_state->ldtr.selector = 0x0000; - guest_state->ldtr.limit = 0x0000ffff; - guest_state->ldtr.base = 0x0000000000000000LL; - guest_state->tr.selector = 0x0000; - guest_state->tr.limit = 0x0000ffff; - guest_state->tr.base = 0x0000000000000000LL; + ctrl_area->instrs.NMI = 1; + ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest + ctrl_area->instrs.INIT = 1; + // ctrl_area->instrs.PAUSE = 1; + ctrl_area->instrs.shutdown_evts = 1; - guest_state->dr6 = 0x00000000ffff0ff0LL; - guest_state->dr7 = 0x0000000000000400LL; + /* DEBUG FOR RETURN CODE */ + ctrl_area->exit_code = 1; - - + /* Setup Guest Machine state */ + core->vm_regs.rsp = 0x00; + core->rip = 0xfff0; - if ( !RB_EMPTY_ROOT(&(vm_info->io_map)) ) { - struct v3_io_hook * iter; - struct rb_node * io_node = v3_rb_first(&(vm_info->io_map)); - addr_t io_port_bitmap; - int i = 0; + core->vm_regs.rdx = 0x00000f00; - io_port_bitmap = (addr_t)V3_VAddr(V3_AllocPages(3)); - memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3); - - ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr((void *)io_port_bitmap); - //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap); + core->cpl = 0; - do { - iter = rb_entry(io_node, struct v3_io_hook, tree_node); + core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1 + core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode + core->ctrl_regs.efer |= EFER_MSR_svm_enable; - ushort_t port = iter->port; - uchar_t * bitmap = (uchar_t *)io_port_bitmap; - PrintDebug("%d: Hooking Port %d\n", i, port); - bitmap += (port / 8); - // PrintDebug("Setting Bit for port 0x%x\n", port); - *bitmap |= 1 << (port % 8); - i++; - } while ((io_node = v3_rb_next(io_node))); - //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2); + core->segments.cs.selector = 0xf000; + core->segments.cs.limit = 0xffff; + core->segments.cs.base = 0x0000000f0000LL; - ctrl_area->instrs.IOIO_PROT = 1; - } - + // (raw attributes = 0xf3) + core->segments.cs.type = 0x3; + core->segments.cs.system = 0x1; + core->segments.cs.dpl = 0x3; + core->segments.cs.present = 1; - PrintDebug("Exiting on interrupts\n"); - ctrl_area->guest_ctrl.V_INTR_MASKING = 1; - ctrl_area->instrs.INTR = 1; - if (vm_info->shdw_pg_mode == SHADOW_PAGING) { - PrintDebug("Creating initial shadow page table\n"); + struct v3_segment * segregs [] = {&(core->segments.ss), &(core->segments.ds), + &(core->segments.es), &(core->segments.fs), + &(core->segments.gs), NULL}; + for ( i = 0; segregs[i] != NULL; i++) { + struct v3_segment * seg = segregs[i]; + + seg->selector = 0x0000; + // seg->base = seg->selector << 4; + seg->base = 0x00000000; + seg->limit = ~0u; + // (raw attributes = 0xf3) + seg->type = 0x3; + seg->system = 0x1; + seg->dpl = 0x3; + seg->present = 1; + } - /* Testing 64 bit page tables for long paged real mode guests */ - // vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(vm_info)); - vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32(vm_info)); - /* End Test */ + core->segments.gdtr.limit = 0x0000ffff; + core->segments.gdtr.base = 0x0000000000000000LL; + core->segments.idtr.limit = 0x0000ffff; + core->segments.idtr.base = 0x0000000000000000LL; - vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL; - PrintDebug("Created\n"); + core->segments.ldtr.selector = 0x0000; + core->segments.ldtr.limit = 0x0000ffff; + core->segments.ldtr.base = 0x0000000000000000LL; + core->segments.tr.selector = 0x0000; + core->segments.tr.limit = 0x0000ffff; + core->segments.tr.base = 0x0000000000000000LL; - guest_state->cr3 = vm_info->direct_map_pt; + core->dbg_regs.dr6 = 0x00000000ffff0ff0LL; + core->dbg_regs.dr7 = 0x0000000000000400LL; - //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low)); + ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->io_map.arch_data); + ctrl_area->instrs.IOIO_PROT = 1; + + ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->msr_map.arch_data); + ctrl_area->instrs.MSR_PROT = 1; - ctrl_area->cr_reads.cr3 = 1; - ctrl_area->cr_writes.cr3 = 1; + PrintDebug(core->vm_info, core, "Exiting on interrupts\n"); + ctrl_area->guest_ctrl.V_INTR_MASKING = 1; + ctrl_area->instrs.INTR = 1; + // The above also assures the TPR changes (CR8) are only virtual - ctrl_area->instrs.INVLPG = 1; - ctrl_area->instrs.INVLPGA = 1; - ctrl_area->exceptions.pf = 1; + // However, we need to see TPR writes since they will + // affect the virtual apic + // we reflect out cr8 to ctrl_regs->apic_tpr + ctrl_area->cr_reads.cr8 = 1; + ctrl_area->cr_writes.cr8 = 1; + // We will do all TPR comparisons in the virtual apic + // We also do not want the V_TPR to be able to mask the PIC + ctrl_area->guest_ctrl.V_IGN_TPR = 1; - /* JRL: This is a performance killer, and a simplistic solution */ - /* We need to fix this */ - ctrl_area->TLB_CONTROL = 1; - guest_state->g_pat = 0x7040600070406ULL; + v3_hook_msr(core->vm_info, EFER_MSR, + &v3_handle_efer_read, + &v3_svm_handle_efer_write, + core); - guest_state->cr0 |= 0x80000000; + if (core->shdw_pg_mode == SHADOW_PAGING) { + PrintDebug(core->vm_info, core, "Creating initial shadow page table\n"); + + /* JRL: This is a performance killer, and a simplistic solution */ + /* We need to fix this */ + ctrl_area->TLB_CONTROL = 1; + ctrl_area->guest_ASID = 1; + + + if (v3_init_passthrough_pts(core) == -1) { + PrintError(core->vm_info, core, "Could not initialize passthrough page tables\n"); + return ; + } - } else if (vm_info->shdw_pg_mode == NESTED_PAGING) { - // Flush the TLB on entries/exits - ctrl_area->TLB_CONTROL = 1; - // Enable Nested Paging - ctrl_area->NP_ENABLE = 1; + core->shdw_pg_state.guest_cr0 = 0x0000000000000010LL; + PrintDebug(core->vm_info, core, "Created\n"); + + core->ctrl_regs.cr0 |= 0x80000000; - PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE)); + v3_activate_passthrough_pt(core); - // Set the Nested Page Table pointer - vm_info->direct_map_pt = ((addr_t)create_passthrough_pts_32(vm_info) & ~0xfff); - ctrl_area->N_CR3 = vm_info->direct_map_pt; + ctrl_area->cr_reads.cr0 = 1; + ctrl_area->cr_writes.cr0 = 1; + //intercept cr4 read so shadow pager can use PAE independently of guest + ctrl_area->cr_reads.cr4 = 1; + ctrl_area->cr_writes.cr4 = 1; + ctrl_area->cr_reads.cr3 = 1; + ctrl_area->cr_writes.cr3 = 1; - // ctrl_area->N_CR3 = Get_CR3(); - // guest_state->cr3 |= (Get_CR3() & 0xfffff000); - guest_state->g_pat = 0x7040600070406ULL; - } + ctrl_area->instrs.INVLPG = 1; + ctrl_area->exceptions.pf = 1; - if (vm_info->msr_map.num_hooks > 0) { - PrintDebug("Hooking %d msrs\n", vm_info->msr_map.num_hooks); - ctrl_area->MSRPM_BASE_PA = v3_init_svm_msr_map(vm_info); - ctrl_area->instrs.MSR_PROT = 1; + guest_state->g_pat = 0x7040600070406ULL; - } + } else if (core->shdw_pg_mode == NESTED_PAGING) { + // Flush the TLB on entries/exits + ctrl_area->TLB_CONTROL = 1; + ctrl_area->guest_ASID = 1; + // Enable Nested Paging + ctrl_area->NP_ENABLE = 1; -} + PrintDebug(core->vm_info, core, "NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE)); + // Set the Nested Page Table pointer + if (v3_init_passthrough_pts(core) == -1) { + PrintError(core->vm_info, core, "Could not initialize Nested page tables\n"); + return ; + } -static int init_svm_guest(struct guest_info *info) { - - PrintDebug("Allocating VMCB\n"); - info->vmm_data = (void*)Allocate_VMCB(); + ctrl_area->N_CR3 = core->direct_map_pt; + guest_state->g_pat = 0x7040600070406ULL; + } + + /* tell the guest that we don't support SVM */ + v3_hook_msr(core->vm_info, SVM_VM_CR_MSR, + &v3_handle_vm_cr_read, + &v3_handle_vm_cr_write, + core); - //PrintDebug("Generating Guest nested page tables\n"); - // info->page_tables = NULL; - //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list)); - //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list)); - // PrintDebugPageTables(info->page_tables); + { +#define INT_PENDING_AMD_MSR 0xc0010055 - PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data); - Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info); - + v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL); - info->run_state = VM_STOPPED; + v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL); - // info->rip = 0; - info->vm_regs.rdi = 0; - info->vm_regs.rsi = 0; - info->vm_regs.rbp = 0; - info->vm_regs.rsp = 0; - info->vm_regs.rbx = 0; - info->vm_regs.rdx = 0; - info->vm_regs.rcx = 0; - info->vm_regs.rax = 0; - - return 0; + v3_hook_msr(core->vm_info, FS_BASE_MSR, NULL, NULL, NULL); + v3_hook_msr(core->vm_info, GS_BASE_MSR, NULL, NULL, NULL); + + // Passthrough read operations are ok. + v3_hook_msr(core->vm_info, INT_PENDING_AMD_MSR, NULL, v3_msr_unhandled_write, NULL); + } } +int v3_init_svm_vmcb(struct guest_info * core, v3_vm_class_t vm_class) { -// can we start a kernel thread here... -static int start_svm_guest(struct guest_info *info) { - vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data)); - vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); - uint_t num_exits = 0; + PrintDebug(core->vm_info, core, "Allocating VMCB\n"); + core->vmm_data = (void *)Allocate_VMCB(); + + if (core->vmm_data == NULL) { + PrintError(core->vm_info, core, "Could not allocate VMCB, Exiting...\n"); + return -1; + } + if (vm_class == V3_PC_VM) { + PrintDebug(core->vm_info, core, "Initializing VMCB (addr=%p)\n", (void *)core->vmm_data); + Init_VMCB_BIOS((vmcb_t*)(core->vmm_data), core); + } else { + PrintError(core->vm_info, core, "Invalid VM class\n"); + return -1; + } + core->core_run_state = CORE_STOPPED; - PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data); - //PrintDebugVMCB((vmcb_t*)(info->vmm_data)); + return 0; +} - info->run_state = VM_RUNNING; - while (1) { - ullong_t tmp_tsc; - uint_t vm_cr_low = 0, vm_cr_high = 0; +int v3_deinit_svm_vmcb(struct guest_info * core) { + V3_FreePages(V3_PAddr(core->vmm_data), 1); + return 0; +} - v3_enable_ints(); - v3_clgi(); +#ifdef V3_CONFIG_CHECKPOINT +int v3_svm_save_core(struct guest_info * core, void * ctx){ - /* - PrintDebug("SVM Entry to CS=%p rip=%p...\n", - (void *)(addr_t)info->segments.cs.base, - (void *)(addr_t)info->rip); - */ + vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(core->vmm_data); - v3_get_msr(0xc0000101, &vm_cr_high, &vm_cr_low); + // Special case saves of data we need immediate access to + // in some cases + V3_CHKPT_SAVE(ctx, "CPL", core->cpl, failout); + V3_CHKPT_SAVE(ctx,"STAR", guest_area->star, failout); + V3_CHKPT_SAVE(ctx,"CSTAR", guest_area->cstar, failout); + V3_CHKPT_SAVE(ctx,"LSTAR", guest_area->lstar, failout); + V3_CHKPT_SAVE(ctx,"SFMASK", guest_area->sfmask, failout); + V3_CHKPT_SAVE(ctx,"KERNELGSBASE", guest_area->KernelGsBase, failout); + V3_CHKPT_SAVE(ctx,"SYSENTER_CS", guest_area->sysenter_cs, failout); + V3_CHKPT_SAVE(ctx,"SYSENTER_ESP", guest_area->sysenter_esp, failout); + V3_CHKPT_SAVE(ctx,"SYSENTER_EIP", guest_area->sysenter_eip, failout); + +// and then we save the whole enchilada + if (v3_chkpt_save(ctx, "VMCB_DATA", PAGE_SIZE, core->vmm_data)) { + PrintError(core->vm_info, core, "Could not save SVM vmcb\n"); + goto failout; + } + + return 0; + + failout: + PrintError(core->vm_info, core, "Failed to save SVM state for core\n"); + return -1; - rdtscll(info->time_state.cached_host_tsc); +} - guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc; +int v3_svm_load_core(struct guest_info * core, void * ctx){ + - v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs)); - rdtscll(tmp_tsc); + vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(core->vmm_data); + + // Reload what we special cased, which we will overwrite in a minute + V3_CHKPT_LOAD(ctx, "CPL", core->cpl, failout); + V3_CHKPT_LOAD(ctx,"STAR", guest_area->star, failout); + V3_CHKPT_LOAD(ctx,"CSTAR", guest_area->cstar, failout); + V3_CHKPT_LOAD(ctx,"LSTAR", guest_area->lstar, failout); + V3_CHKPT_LOAD(ctx,"SFMASK", guest_area->sfmask, failout); + V3_CHKPT_LOAD(ctx,"KERNELGSBASE", guest_area->KernelGsBase, failout); + V3_CHKPT_LOAD(ctx,"SYSENTER_CS", guest_area->sysenter_cs, failout); + V3_CHKPT_LOAD(ctx,"SYSENTER_ESP", guest_area->sysenter_esp, failout); + V3_CHKPT_LOAD(ctx,"SYSENTER_EIP", guest_area->sysenter_eip, failout); + + // and then we load the whole enchilada + if (v3_chkpt_load(ctx, "VMCB_DATA", PAGE_SIZE, core->vmm_data)) { + PrintError(core->vm_info, core, "Could not load SVM vmcb\n"); + goto failout; + } + + return 0; - v3_set_msr(0xc0000101, vm_cr_high, vm_cr_low); - //PrintDebug("SVM Returned\n"); + failout: + PrintError(core->vm_info, core, "Failed to save SVM state for core\n"); + return -1; +} +#endif +static int update_irq_exit_state(struct guest_info * info) { + vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); - v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc); - num_exits++; + // Fix for QEMU bug using EVENTINJ as an internal cache + guest_ctrl->EVENTINJ.valid = 0; - //PrintDebug("Turning on global interrupts\n"); - v3_stgi(); + if ((info->intr_core_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) { + +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "INTAK cycle completed for irq %d\n", info->intr_core_state.irq_vector); +#endif + info->intr_core_state.irq_started = 1; + info->intr_core_state.irq_pending = 0; - if ((num_exits % 5000) == 0) { - PrintDebug("SVM Exit number %d\n", num_exits); - v3_print_profile(info); + v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ); } + if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) { +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "Interrupt %d taken by guest\n", info->intr_core_state.irq_vector); +#endif - - if (v3_handle_svm_exit(info) != 0) { - vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); - addr_t host_addr; - addr_t linear_addr = 0; - - info->run_state = VM_ERROR; + // Interrupt was taken fully vectored + info->intr_core_state.irq_started = 0; - PrintDebug("SVM ERROR!!\n"); - - PrintDebug("RIP: %p\n", (void *)(addr_t)(guest_state->rip)); + } else if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 1)) { +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector); +#endif + } + return 0; +} - linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs)); +static int update_irq_entry_state(struct guest_info * info) { + vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); - PrintDebug("RIP Linear: %p\n", (void *)linear_addr); - v3_print_segments(info); - v3_print_ctrl_regs(info); - if (info->shdw_pg_mode == SHADOW_PAGING) { - PrintDebug("Shadow Paging Guest Registers:\n"); - PrintDebug("\tGuest CR0=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr0)); - PrintDebug("\tGuest CR3=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr3)); - // efer - // CR4 - } - v3_print_GPRs(info); - PrintDebug("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code); - - PrintDebug("exit_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1)); - PrintDebug("exit_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4)); - - PrintDebug("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2)); - PrintDebug("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4)); - - if (info->mem_mode == PHYSICAL_MEM) { - guest_pa_to_host_va(info, linear_addr, &host_addr); - } else if (info->mem_mode == VIRTUAL_MEM) { - guest_va_to_host_va(info, linear_addr, &host_addr); - } + if (info->intr_core_state.irq_pending == 0) { + guest_ctrl->guest_ctrl.V_IRQ = 0; + guest_ctrl->guest_ctrl.V_INTR_VECTOR = 0; + } + + if (v3_excp_pending(info)) { + uint_t excp = v3_get_excp_number(info); + + guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION; + + if (info->excp_state.excp_error_code_valid) { + guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code; + guest_ctrl->EVENTINJ.ev = 1; +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code); +#endif + } + + guest_ctrl->EVENTINJ.vector = excp; + + guest_ctrl->EVENTINJ.valid = 1; + +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n", + (int)info->num_exits, + guest_ctrl->EVENTINJ.vector, + (void *)(addr_t)info->ctrl_regs.cr2, + (void *)(addr_t)info->rip); +#endif + v3_injecting_excp(info, excp); + } else if (info->intr_core_state.irq_started == 1) { +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "IRQ pending from previous injection\n"); +#endif + guest_ctrl->guest_ctrl.V_IRQ = 1; + guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_core_state.irq_vector; - PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr); + // We ignore the virtual TPR on this injection + // TPR/PPR tests have already been done in the APIC. + guest_ctrl->guest_ctrl.V_IGN_TPR = 1; + guest_ctrl->guest_ctrl.V_INTR_PRIO = info->intr_core_state.irq_vector >> 4 ; // 0xf; - PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr); - PrintTraceMemDump((uchar_t *)host_addr, 15); + } else { + switch (v3_intr_pending(info)) { + case V3_EXTERNAL_IRQ: { + int irq = v3_get_intr(info); + + if (irq<0) { + break; + } + + guest_ctrl->guest_ctrl.V_IRQ = 1; + guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq; + + // We ignore the virtual TPR on this injection + // TPR/PPR tests have already been done in the APIC. + guest_ctrl->guest_ctrl.V_IGN_TPR = 1; + guest_ctrl->guest_ctrl.V_INTR_PRIO = info->intr_core_state.irq_vector >> 4 ; // 0xf; + +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "Injecting Interrupt %d (EIP=%p)\n", + guest_ctrl->guest_ctrl.V_INTR_VECTOR, + (void *)(addr_t)info->rip); +#endif - break; + info->intr_core_state.irq_pending = 1; + info->intr_core_state.irq_vector = irq; + + break; + } + case V3_NMI: + guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI; + break; + case V3_SOFTWARE_INTR: + guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR; + +#ifdef V3_CONFIG_DEBUG_INTERRUPTS + PrintDebug(info->vm_info, info, "Injecting software interrupt -- type: %d, vector: %d\n", + SVM_INJECTION_SOFT_INTR, info->intr_core_state.swintr_vector); +#endif + guest_ctrl->EVENTINJ.vector = info->intr_core_state.swintr_vector; + guest_ctrl->EVENTINJ.valid = 1; + + /* reset swintr state */ + info->intr_core_state.swintr_posted = 0; + info->intr_core_state.swintr_vector = 0; + + break; + case V3_VIRTUAL_IRQ: + guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ; + break; + + case V3_INVALID_INTR: + default: + break; + } + } - } - return 0; + return 0; } +int +v3_svm_config_tsc_virtualization(struct guest_info * info) { + vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); + if (info->time_state.flags & VM_TIME_TRAP_RDTSC) { + ctrl_area->instrs.RDTSC = 1; + ctrl_area->svm_instrs.RDTSCP = 1; + } else { + ctrl_area->instrs.RDTSC = 0; + ctrl_area->svm_instrs.RDTSCP = 0; + + if (info->time_state.flags & VM_TIME_TSC_PASSTHROUGH) { + ctrl_area->TSC_OFFSET = 0; + } else { + ctrl_area->TSC_OFFSET = v3_tsc_host_offset(&info->time_state); + } + } + return 0; +} +/* + * CAUTION and DANGER!!! + * + * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function + * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies + * on its contents will cause things to break. The contents at the time of the exit WILL + * change before the exit handler is executed. + */ +int v3_svm_enter(struct guest_info * info) { + vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); + vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data)); + addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0; + uint64_t guest_cycles = 0; -/* Checks machine SVM capability */ -/* Implemented from: AMD Arch Manual 3, sect 15.4 */ -int v3_is_svm_capable() { + // Conditionally yield the CPU if the timeslice has expired + v3_schedule(info); -#if 1 - // Dinda - uint_t vm_cr_low = 0, vm_cr_high = 0; - addr_t eax = 0, ebx = 0, ecx = 0, edx = 0; +#ifdef V3_CONFIG_MEM_TRACK + v3_mem_track_entry(info); +#endif - v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - - PrintDebug("CPUID_FEATURE_IDS_ecx=0x%p\n", (void *)ecx); + // Update timer devices after being in the VM before doing + // IRQ updates, so that any interrupts they raise get seen + // immediately. + v3_advance_time(info, NULL); + v3_update_timers(info); - if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) { - PrintDebug("SVM Not Available\n"); - return 0; - } else { - v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low); + + // disable global interrupts for vm state transition + v3_clgi(); + + // Synchronize the guest state to the VMCB + guest_state->cr0 = info->ctrl_regs.cr0; + guest_state->cr2 = info->ctrl_regs.cr2; + guest_state->cr3 = info->ctrl_regs.cr3; + guest_state->cr4 = info->ctrl_regs.cr4; + guest_state->dr6 = info->dbg_regs.dr6; + guest_state->dr7 = info->dbg_regs.dr7; + + // CR8 is now updated by read/writes and it contains the APIC TPR + // the V_TPR should be just the class part of that. + // This update is here just for completeness. We currently + // are ignoring V_TPR on all injections and doing the priority logivc + // in the APIC. + // guest_ctrl->guest_ctrl.V_TPR = ((info->ctrl_regs.apic_tpr) >> 4) & 0xf; + + //guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff; + // - PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low); + guest_state->rflags = info->ctrl_regs.rflags; + guest_state->efer = info->ctrl_regs.efer; - if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) { - PrintDebug("SVM is available but is disabled.\n"); + /* Synchronize MSRs */ + guest_state->star = info->msrs.star; + guest_state->lstar = info->msrs.lstar; + guest_state->sfmask = info->msrs.sfmask; + guest_state->KernelGsBase = info->msrs.kern_gs_base; - v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - - PrintDebug("CPUID_FEATURE_IDS_edx=0x%p\n", (void *)edx); - - if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) { - PrintDebug("SVM BIOS Disabled, not unlockable\n"); - } else { - PrintDebug("SVM is locked with a key\n"); - } - return 0; + guest_state->cpl = info->cpl; - } else { - PrintDebug("SVM is available and enabled.\n"); + v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments)); - v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - - PrintDebug("CPUID_FEATURE_IDS_edx=0x%p\n", (void *)edx); + guest_state->rax = info->vm_regs.rax; + guest_state->rip = info->rip; + guest_state->rsp = info->vm_regs.rsp; - if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) { - PrintDebug("SVM Nested Paging not supported\n"); - } else { - PrintDebug("SVM Nested Paging supported\n"); - } - - return 1; - + V3_FP_ENTRY_RESTORE(info); + +#ifdef V3_CONFIG_SYMCALL + if (info->sym_core_state.symcall_state.sym_call_active == 0) { + update_irq_entry_state(info); } - } +#else + update_irq_entry_state(info); +#endif -#else - uint_t eax = 0, ebx = 0, ecx = 0, edx = 0; - addr_t vm_cr_low = 0, vm_cr_high = 0; +#ifdef V3_CONFIG_TM_FUNC + v3_tm_check_intr_state(info, guest_ctrl, guest_state); +#endif - v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) { - PrintDebug("SVM Not Available\n"); - return 0; - } + /* ** */ - v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low); + /* + PrintDebug(info->vm_info, info, "SVM Entry to CS=%p rip=%p...\n", + (void *)(addr_t)info->segments.cs.base, + (void *)(addr_t)info->rip); + */ - PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low); +#ifdef V3_CONFIG_SYMCALL + if (info->sym_core_state.symcall_state.sym_call_active == 1) { + if (guest_ctrl->guest_ctrl.V_IRQ == 1) { + V3_Print(info->vm_info, info, "!!! Injecting Interrupt during Sym call !!!\n"); + } + } +#endif + v3_svm_config_tsc_virtualization(info); - // this part is clearly wrong, since the np bit is in - // edx, not ecx - if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) { - PrintDebug("Nested Paging not supported\n"); - } else { - PrintDebug("Nested Paging supported\n"); - } + //V3_Print(info->vm_info, info, "Calling v3_svm_launch\n"); + { + uint64_t entry_tsc = 0; + uint64_t exit_tsc = 0; + +#ifdef V3_CONFIG_PWRSTAT_TELEMETRY + v3_pwrstat_telemetry_enter(info); +#endif - if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) { - PrintDebug("SVM is disabled.\n"); - return 1; - } +#ifdef V3_CONFIG_PMU_TELEMETRY + v3_pmu_telemetry_enter(info); +#endif - v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) { - PrintDebug("SVM BIOS Disabled, not unlockable\n"); - } else { - PrintDebug("SVM is locked with a key\n"); - } + rdtscll(entry_tsc); - return 0; + v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[V3_Get_CPU()]); + rdtscll(exit_tsc); + +#ifdef V3_CONFIG_PMU_TELEMETRY + v3_pmu_telemetry_exit(info); #endif -} +#ifdef V3_CONFIG_PWRSTAT_TELEMETRY + v3_pwrstat_telemetry_exit(info); +#endif -static int has_svm_nested_paging() { - addr_t eax = 0, ebx = 0, ecx = 0, edx = 0; + guest_cycles = exit_tsc - entry_tsc; + } - v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); - - //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx); - - if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) { - PrintDebug("SVM Nested Paging not supported\n"); - return 0; - } else { - PrintDebug("SVM Nested Paging supported\n"); - return 1; - } -} + //V3_Print(info->vm_info, info, "SVM Returned: Exit Code: %x, guest_rip=%lx\n", (uint32_t)(guest_ctrl->exit_code), (unsigned long)guest_state->rip); + v3_last_exit = (uint32_t)(guest_ctrl->exit_code); + v3_advance_time(info, &guest_cycles); -void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) { - reg_ex_t msr; - void * host_state; + info->num_exits++; + V3_FP_EXIT_SAVE(info); - // Enable SVM on the CPU - v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low)); - msr.e_reg.low |= EFER_MSR_svm_enable; - v3_set_msr(EFER_MSR, 0, msr.e_reg.low); - - PrintDebug("SVM Enabled\n"); + // Save Guest state from VMCB + info->rip = guest_state->rip; + info->vm_regs.rsp = guest_state->rsp; + info->vm_regs.rax = guest_state->rax; + info->cpl = guest_state->cpl; - // Setup the host state save area - host_state = V3_AllocPages(4); - + info->ctrl_regs.cr0 = guest_state->cr0; + info->ctrl_regs.cr2 = guest_state->cr2; + info->ctrl_regs.cr3 = guest_state->cr3; + info->ctrl_regs.cr4 = guest_state->cr4; + info->dbg_regs.dr6 = guest_state->dr6; + info->dbg_regs.dr7 = guest_state->dr7; + // + // We do not track this anymore + // V_TPR is ignored and we do the logic in the APIC + //info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR; + // + info->ctrl_regs.rflags = guest_state->rflags; + info->ctrl_regs.efer = guest_state->efer; + + /* Synchronize MSRs */ + info->msrs.star = guest_state->star; + info->msrs.lstar = guest_state->lstar; + info->msrs.sfmask = guest_state->sfmask; + info->msrs.kern_gs_base = guest_state->KernelGsBase; + + v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments)); + info->cpu_mode = v3_get_vm_cpu_mode(info); + info->mem_mode = v3_get_vm_mem_mode(info); + /* ** */ + + // save exit info here + exit_code = guest_ctrl->exit_code; + exit_info1 = guest_ctrl->exit_info1; + exit_info2 = guest_ctrl->exit_info2; - /* 64-BIT-ISSUE */ - // msr.e_reg.high = 0; - //msr.e_reg.low = (uint_t)host_state; - msr.r_reg = (addr_t)host_state; +#ifdef V3_CONFIG_SYMCALL + if (info->sym_core_state.symcall_state.sym_call_active == 0) { + update_irq_exit_state(info); + } +#else + update_irq_exit_state(info); +#endif - PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_state); - v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low); + // reenable global interrupts after vm exit + v3_stgi(); + + + // Conditionally yield the CPU if the timeslice has expired + v3_schedule(info); + + // This update timers is for time-dependent handlers + // if we're slaved to host time + v3_advance_time(info, NULL); + v3_update_timers(info); + + + { + int ret = v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2); + + if (ret != 0) { + PrintError(info->vm_info, info, "Error in SVM exit handler (ret=%d)\n", ret); + PrintError(info->vm_info, info, " last Exit was %d (exit code=0x%llx)\n", v3_last_exit, (uint64_t) exit_code); + return -1; + } + } + if (info->timeouts.timeout_active) { + /* Check to see if any timeouts have expired */ + v3_handle_timeouts(info, guest_cycles); + } +#ifdef V3_CONFIG_MEM_TRACK + v3_mem_track_exit(info); +#endif - // Setup the SVM specific vmm operations - vmm_ops->init_guest = &init_svm_guest; - vmm_ops->start_guest = &start_svm_guest; - vmm_ops->has_nested_paging = &has_svm_nested_paging; - return; + return 0; } +int v3_start_svm_guest(struct guest_info * info) { + // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data)); + // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); + PrintDebug(info->vm_info, info, "Starting SVM core %u (on logical core %u)\n", info->vcpu_id, info->pcpu_id); +#ifdef V3_CONFIG_HVM + if (v3_setup_hvm_hrt_core_for_boot(info)) { + PrintError(info->vm_info, info, "Failed to setup HRT core...\n"); + return -1; + } +#endif + + + + + while (1) { + + if (info->core_run_state == CORE_STOPPED) { + + if (info->vcpu_id == 0) { + info->core_run_state = CORE_RUNNING; + } else { + PrintDebug(info->vm_info, info, "SVM core %u (on %u): Waiting for core initialization\n", info->vcpu_id, info->pcpu_id); + + V3_NO_WORK(info); + + while (info->core_run_state == CORE_STOPPED) { + + if (info->vm_info->run_state == VM_STOPPED) { + // The VM was stopped before this core was initialized. + return 0; + } + + V3_STILL_NO_WORK(info); + + //PrintDebug(info->vm_info, info, "SVM core %u: still waiting for INIT\n", info->vcpu_id); + } + + V3_HAVE_WORK_AGAIN(info); + + PrintDebug(info->vm_info, info, "SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id); + + // We'll be paranoid about race conditions here + v3_wait_at_barrier(info); + } + + PrintDebug(info->vm_info, info, "SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x), RIP=0x%p\n", + info->vcpu_id, info->pcpu_id, + info->segments.cs.selector, (void *)(info->segments.cs.base), + info->segments.cs.limit, (void *)(info->rip)); + + + + PrintDebug(info->vm_info, info, "SVM core %u: Launching SVM VM (vmcb=%p) (on cpu %u)\n", + info->vcpu_id, (void *)info->vmm_data, info->pcpu_id); + //PrintDebugVMCB((vmcb_t*)(info->vmm_data)); + + v3_start_time(info); + } + + if (info->vm_info->run_state == VM_STOPPED) { + info->core_run_state = CORE_STOPPED; + break; + } + +#ifdef V3_CONFIG_PMU_TELEMETRY + v3_pmu_telemetry_start(info); +#endif + +#ifdef V3_CONFIG_PWRSTAT_TELEMETRY + v3_pwrstat_telemetry_start(info); +#endif + + if (v3_svm_enter(info) == -1) { + vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data)); + addr_t host_addr; + addr_t linear_addr = 0; + + info->vm_info->run_state = VM_ERROR; + + V3_Print(info->vm_info, info, "SVM core %u: SVM ERROR!!\n", info->vcpu_id); + + v3_print_guest_state(info); + + V3_Print(info->vm_info, info, "SVM core %u: SVM Exit Code: %p\n", info->vcpu_id, (void *)(addr_t)guest_ctrl->exit_code); + + V3_Print(info->vm_info, info, "SVM core %u: exit_info1 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info1)); + V3_Print(info->vm_info, info, "SVM core %u: exit_info1 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4)); + + V3_Print(info->vm_info, info, "SVM core %u: exit_info2 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info2)); + V3_Print(info->vm_info, info, "SVM core %u: exit_info2 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4)); + + linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs)); + + if (info->mem_mode == PHYSICAL_MEM) { + v3_gpa_to_hva(info, linear_addr, &host_addr); + } else if (info->mem_mode == VIRTUAL_MEM) { + v3_gva_to_hva(info, linear_addr, &host_addr); + } + + V3_Print(info->vm_info, info, "SVM core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr); + + V3_Print(info->vm_info, info, "SVM core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr); + v3_dump_mem((uint8_t *)host_addr, 15); + + v3_print_stack(info); + + break; + } + + v3_wait_at_barrier(info); + + + if (info->vm_info->run_state == VM_STOPPED) { + info->core_run_state = CORE_STOPPED; + break; + } + + + +/* + if ((info->num_exits % 50000) == 0) { + V3_Print(info->vm_info, info, "SVM Exit number %d\n", (uint32_t)info->num_exits); + v3_print_guest_state(info); + } +*/ + + } +#ifdef V3_CONFIG_PMU_TELEMETRY + v3_pmu_telemetry_end(info); +#endif +#ifdef V3_CONFIG_PWRSTAT_TELEMETRY + v3_pwrstat_telemetry_end(info); +#endif + // Need to take down the other cores on error... + return 0; +} +int v3_reset_svm_vm_core(struct guest_info * core, addr_t rip) { + // init vmcb_bios + // Write the RIP, CS, and descriptor + // assume the rest is already good to go + // + // vector VV -> rip at 0 + // CS = VV00 + // This means we start executing at linear address VV000 + // + // So the selector needs to be VV00 + // and the base needs to be VV000 + // + core->rip = 0; + core->segments.cs.selector = rip << 8; + core->segments.cs.limit = 0xffff; + core->segments.cs.base = rip << 12; + return 0; +} +/* Checks machine SVM capability */ +/* Implemented from: AMD Arch Manual 3, sect 15.4 */ +int v3_is_svm_capable() { + uint_t vm_cr_low = 0, vm_cr_high = 0; + uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; + v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx); + + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx); + if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) { + V3_Print(VM_NONE, VCORE_NONE, "SVM Not Available\n"); + return 0; + } else { + v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low); + + PrintDebug(VM_NONE, VCORE_NONE, "SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low); + + if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) { + V3_Print(VM_NONE, VCORE_NONE, "SVM is available but is disabled.\n"); + + v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); + + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx); + + if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) { + V3_Print(VM_NONE, VCORE_NONE, "SVM BIOS Disabled, not unlockable\n"); + } else { + V3_Print(VM_NONE, VCORE_NONE, "SVM is locked with a key\n"); + } + return 0; + + } else { + V3_Print(VM_NONE, VCORE_NONE, "SVM is available and enabled.\n"); + + v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax); + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx); + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx); + PrintDebug(VM_NONE, VCORE_NONE, "CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx); + + return 1; + } + } +} +static int has_svm_nested_paging() { + uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; + + v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx); + + //PrintDebug(VM_NONE, VCORE_NONE, "CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx); + + if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) { + V3_Print(VM_NONE, VCORE_NONE, "SVM Nested Paging not supported\n"); + return 0; + } else { + V3_Print(VM_NONE, VCORE_NONE, "SVM Nested Paging supported\n"); + return 1; + } + } + +void v3_init_svm_cpu(int cpu_id) { + reg_ex_t msr; + extern v3_cpu_arch_t v3_cpu_types[]; + // Enable SVM on the CPU + v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low)); + msr.e_reg.low |= EFER_MSR_svm_enable; + v3_set_msr(EFER_MSR, 0, msr.e_reg.low); + V3_Print(VM_NONE, VCORE_NONE, "SVM Enabled\n"); + // Setup the host state save area + host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4); // need not be shadow-safe, not exposed to guest + if (!host_vmcbs[cpu_id]) { + PrintError(VM_NONE, VCORE_NONE, "Failed to allocate VMCB\n"); + return; + } + /* 64-BIT-ISSUE */ + // msr.e_reg.high = 0; + //msr.e_reg.low = (uint_t)host_vmcb; + msr.r_reg = host_vmcbs[cpu_id]; + PrintDebug(VM_NONE, VCORE_NONE, "Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]); + v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low); + if (has_svm_nested_paging() == 1) { + v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU; + } else { + v3_cpu_types[cpu_id] = V3_SVM_CPU; + } +} +void v3_deinit_svm_cpu(int cpu_id) { + reg_ex_t msr; + extern v3_cpu_arch_t v3_cpu_types[]; + // reset SVM_VM_HSAVE_PA_MSR + // Does setting it to NULL disable?? + msr.r_reg = 0; + v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low); + // Disable SVM? + v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low)); + msr.e_reg.low &= ~EFER_MSR_svm_enable; + v3_set_msr(EFER_MSR, 0, msr.e_reg.low); + v3_cpu_types[cpu_id] = V3_INVALID_CPU; + V3_FreePages((void *)host_vmcbs[cpu_id], 4); + V3_Print(VM_NONE, VCORE_NONE, "Host CPU %d host area freed, and SVM disabled\n", cpu_id); + return; +} @@ -651,126 +1148,103 @@ void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) { -/*static void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) { - vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb); - vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb); - uint_t i; - guest_state->rsp = vm_info.vm_regs.rsp; - guest_state->rip = vm_info.rip; - //ctrl_area->instrs.instrs.CR0 = 1; - ctrl_area->cr_reads.cr0 = 1; - ctrl_area->cr_writes.cr0 = 1; - guest_state->efer |= EFER_MSR_svm_enable; - guest_state->rflags = 0x00000002; // The reserved bit is always 1 - ctrl_area->svm_instrs.VMRUN = 1; - // guest_state->cr0 = 0x00000001; // PE - ctrl_area->guest_ASID = 1; - ctrl_area->exceptions.de = 1; - ctrl_area->exceptions.df = 1; - ctrl_area->exceptions.pf = 1; - ctrl_area->exceptions.ts = 1; - ctrl_area->exceptions.ss = 1; - ctrl_area->exceptions.ac = 1; - ctrl_area->exceptions.mc = 1; - ctrl_area->exceptions.gp = 1; - ctrl_area->exceptions.ud = 1; - ctrl_area->exceptions.np = 1; - ctrl_area->exceptions.of = 1; - ctrl_area->exceptions.nmi = 1; - guest_state->cs.selector = 0x0000; - guest_state->cs.limit=~0u; - guest_state->cs.base = guest_state->cs.selector<<4; - guest_state->cs.attrib.raw = 0xf3; - - struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL}; - for ( i = 0; segregs[i] != NULL; i++) { - struct vmcb_selector * seg = segregs[i]; - - seg->selector = 0x0000; - seg->base = seg->selector << 4; - seg->attrib.raw = 0xf3; - seg->limit = ~0u; - } - - if (vm_info.io_map.num_ports > 0) { - struct vmm_io_hook * iter; - addr_t io_port_bitmap; - - io_port_bitmap = (addr_t)V3_AllocPages(3); - memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3); - - ctrl_area->IOPM_BASE_PA = io_port_bitmap; - //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap); - FOREACH_IO_HOOK(vm_info.io_map, iter) { - ushort_t port = iter->port; - uchar_t * bitmap = (uchar_t *)io_port_bitmap; - bitmap += (port / 8); - PrintDebug("Setting Bit in block %x\n", bitmap); - *bitmap |= 1 << (port % 8); - } - //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2); - ctrl_area->instrs.IOIO_PROT = 1; - } - ctrl_area->instrs.INTR = 1; - if (vm_info.page_mode == SHADOW_PAGING) { - PrintDebug("Creating initial shadow page table\n"); - vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pts_32(&vm_info) & ~0xfff); - PrintDebug("Created\n"); - guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3; - ctrl_area->cr_reads.cr3 = 1; - ctrl_area->cr_writes.cr3 = 1; - ctrl_area->instrs.INVLPG = 1; - ctrl_area->instrs.INVLPGA = 1; - guest_state->g_pat = 0x7040600070406ULL; - guest_state->cr0 |= 0x80000000; - } else if (vm_info.page_mode == NESTED_PAGING) { - // Flush the TLB on entries/exits - //ctrl_area->TLB_CONTROL = 1; - // Enable Nested Paging - //ctrl_area->NP_ENABLE = 1; - //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE)); - // Set the Nested Page Table pointer - // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables); - // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables); - // ctrl_area->N_CR3 = Get_CR3(); - // guest_state->cr3 |= (Get_CR3() & 0xfffff000); - // guest_state->g_pat = 0x7040600070406ULL; - } -} -*/ + + + + + + + +#if 0 +/* + * Test VMSAVE/VMLOAD Latency + */ +#define vmsave ".byte 0x0F,0x01,0xDB ; " +#define vmload ".byte 0x0F,0x01,0xDA ; " +{ + uint32_t start_lo, start_hi; + uint32_t end_lo, end_hi; + uint64_t start, end; + + __asm__ __volatile__ ( + "rdtsc ; " + "movl %%eax, %%esi ; " + "movl %%edx, %%edi ; " + "movq %%rcx, %%rax ; " + vmsave + "rdtsc ; " + : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi) + : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0) + ); + + start = start_hi; + start <<= 32; + start += start_lo; + + end = end_hi; + end <<= 32; + end += end_lo; + + PrintDebug(core->vm_info, core, "VMSave Cycle Latency: %d\n", (uint32_t)(end - start)); + + __asm__ __volatile__ ( + "rdtsc ; " + "movl %%eax, %%esi ; " + "movl %%edx, %%edi ; " + "movq %%rcx, %%rax ; " + vmload + "rdtsc ; " + : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi) + : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0) + ); + + start = start_hi; + start <<= 32; + start += start_lo; + + end = end_hi; + end <<= 32; + end += end_lo; + + + PrintDebug(core->vm_info, core, "VMLoad Cycle Latency: %d\n", (uint32_t)(end - start)); + } + /* End Latency Test */ + +#endif @@ -863,7 +1337,12 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) { ctrl_area->instrs.IOIO_PROT = 1; - ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3); + ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3); // need not be shadow-safe, not exposed to guest + + if (!ctrl_area->IOPM_BASE_PA) { + PrintError(core->vm_info, core, "Cannot allocate IO bitmap\n"); + return; + } { reg_ex_t tmp_reg; @@ -888,12 +1367,12 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) { GetGDTR(gdt_buf); gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff; gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff; - PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit); + PrintDebug(core->vm_info, core, "GDT: base: %x, limit: %x\n", gdt_base, gdt_limit); GetIDTR(idt_buf); idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff; idt_limit = *(ushort_t*)(idt_buf) & 0xffff; - PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit); + PrintDebug(core->vm_info, core, "IDT: base: %x, limit: %x\n",idt_base, idt_limit); // gdt_base -= 0x2000; @@ -918,7 +1397,7 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) { // Enable Nested Paging ctrl_area->NP_ENABLE = 1; - PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE)); + PrintDebug(core->vm_info, core, "NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE)); // Set the Nested Page Table pointer ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000); @@ -929,8 +1408,8 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) { guest_state->g_pat = 0x7040600070406ULL; - PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4)); - PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4)); + PrintDebug(core->vm_info, core, "Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4)); + PrintDebug(core->vm_info, core, "Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4)); // Enable Paging // guest_state->cr0 |= 0x80000000; }