X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fextensions%2Fext_trans_mem.c;h=9042e5522714af811cf056fc217342118aaec642;hb=e42b257e5364f8ddba2c86668631013859cb2e46;hp=82c89eebe0daf2a50bad44cf9eaf9afe83c44705;hpb=541bd219aaa76d3b00de8060affbc62a5692162a;p=palacios.git

diff --git a/palacios/src/extensions/ext_trans_mem.c b/palacios/src/extensions/ext_trans_mem.c
index 82c89ee..9042e55 100644
--- a/palacios/src/extensions/ext_trans_mem.c
+++ b/palacios/src/extensions/ext_trans_mem.c
@@ -1508,6 +1508,34 @@ tm_record_access (struct  v3_trans_mem * tm,
 }
 
 
+static void
+tm_prepare_cpuid (struct v3_vm_info * vm)
+{
+
+    V3_Print(vm, VCORE_NONE, "TM INIT | enabling RTM cap in CPUID\n");
+
+    /* increase max CPUID function to 7 (extended feature flags enumeration) */
+    v3_cpuid_add_fields(vm,0x0,    
+            0xf, 0x7,      
+            0, 0,
+            0, 0,
+            0, 0);
+
+
+    /* do the same for AMD */
+    v3_cpuid_add_fields(vm,0x80000000, 
+            0xffffffff, 0x80000007,   
+            0, 0,
+            0, 0,
+            0, 0);
+
+
+    /* enable RTM (CPUID.07H.EBX.RTM = 1) */
+    v3_cpuid_add_fields(vm, 0x07, 0, 0, (1<<11), 0, 0, 0, 0, 0);
+    v3_cpuid_add_fields(vm, 0x80000007, 0, 0, (1<<11), 0, 0, 0, 0, 0);
+}
+
+
 static int 
 init_trans_mem (struct v3_vm_info * vm, 
                 v3_cfg_tree_t * cfg, 
@@ -1553,6 +1581,8 @@ init_trans_mem (struct v3_vm_info * vm,
     *priv_data = tms;
     tm_global_state = tms;
 
+    tm_prepare_cpuid(vm);
+
     return 0;
 
 out_err1:
@@ -2283,3 +2313,4 @@ v3_tm_decode_rtm_instrs (struct guest_info * info,
     return 0;
 }
 
+