X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fvga_regs.h;h=f29a81246c6912af52025ec30071d9c450e5ba0c;hb=7e1ce44438e3ba765e1a8ec2d67c03af12c841e7;hp=91ded67ae5b18977b37577538a4e522507817e44;hpb=14e8d7e88362f4f7c3c558bbdcb31d72011c10f5;p=palacios.git diff --git a/palacios/src/devices/vga_regs.h b/palacios/src/devices/vga_regs.h index 91ded67..f29a812 100644 --- a/palacios/src/devices/vga_regs.h +++ b/palacios/src/devices/vga_regs.h @@ -199,6 +199,7 @@ struct vga_mem_mode_reg { uint8_t extended_memory:1; // 1=>256K RAM, 0=>64K uint8_t odd_even:1; // 0 => even addresses go to BOTH banks 0 and 2, odd 1 and 3 + // or flip between 0/1 for CGA compat // 1 => address bank sequentially, map mask selects bank uint8_t chain4:1; // 0 => map mask register used to select bank @@ -630,10 +631,11 @@ page 2-88). // 0 = read gets bits from selected map uint8_t odd_even:1; // 1 = odd/even addressing as in CGMA + // 0 = NOT odd/even + // notice that this is the OPPOSITE of the bit in the sequencer! uint8_t shift_reg_mode:1; // 1 = shift regs get odd bits from odd maps and even/even - uint8_t c256:1; - // 1 = 256 color mode + uint8_t c256:1; // 1 = 256 color mode // 0 = shift_reg_mode controls shift regs uint8_t reserved2:1; } __attribute__((packed)); @@ -667,7 +669,7 @@ struct vga_misc_reg { /* Index 7 */ // Color don't care -struct vga_color_dont_care__reg { +struct vga_color_dont_care_reg { union { uint8_t val; struct { @@ -713,7 +715,7 @@ struct vga_attribute_controller_address_reg { uint8_t val; struct { uint8_t index:5; // actual address - uint8_t internal_palette_address_srouce:1; + uint8_t internal_palette_address_source:1; // 0 => use the internal color palette (load the regs) // 1 => use the external color palette uint8_t reserved:2; @@ -752,7 +754,7 @@ struct vga_attribute_mode_control_reg { uint8_t enable_line_graphics_char_code:1; // 1 => enable special line graphics characters // and force 9th dot to be same as 8th dot of char - uint8_t enable_blink; + uint8_t enable_blink:1; // 1 => MSB of the attribute means blink (8 colors + blink) // 0 => MSB of the attribute means intensity (16 colors) uint8_t reserved:1; @@ -817,4 +819,67 @@ struct vga_color_select_reg { } __attribute__((packed)) ; +/* + DAC registers + + Used to derive the ultimate pixel colors that are rendered on the display + + There are 256 palette registers + We can change any one or read any one +*/ + +// +// The palette register that will returned on a data write +// 0x3c8 +typedef uint8_t vga_dac_write_addr_reg; + +// +// The palette register that will returned on a data read +// 0x3c7 +typedef uint8_t vga_dac_read_addr_reg; + +// +// Read or write of a palette register +// 0x3c9 +// Successive references to this register increment +// the palette register index (for reads and writes separately) +// Three SUCCESSIVE WRITES ARE EXPECTED to set the 18 bit register +// Three SUCCESSIVE READS ARE EXPECTED to read out the register +// reads or writes are in order RED GREEN BLUE +// ADDRESS REG WRITE always resets +typedef uint8_t vga_dac_data_reg; + +// +// Pixel Mask +// 0x3c6 +typedef uint8_t vga_dac_pixel_mask_reg; + +// Palette register (256 of these) +// strictly speaking, each of these is 18 bits wide, 6 bits per channel +// We will provide reg&0x3f, reg>>8 & 0x3f, etc +// This is red, green, blue +typedef uint32_t vga_palette_reg; + + +// +// What attribute bytes mean in text mode +// +struct vga_attribute_byte { + union { + uint8_t val; + struct { + uint8_t fore:3; //foreground color + uint8_t foreground_intensity_or_font_select:1; // depends on char map select reg + // character map selection is effected + // when memory_mode.extended meomory=1 + // and the two character map enteries on character_map_select are + // different + uint8_t back:3; //background color + uint8_t blinking_or_bg_intensity:1; + // attribute mode control.enableblink = 1 => blink + // =0 => intensity (16 colors of bg) + } __attribute__((packed)); + } __attribute__((packed)); +} __attribute__((packed)); + #endif