X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fpiix3.c;h=e1709d63602ef62bb34426f7b20209fa8e4c4ea8;hb=a34275476494aeabed460b284a70cfc9b66a9896;hp=487a821a9d467b68f25be5c3638e3ea7f91d35ad;hpb=e2964f7234daa3429275c039769a313f0870c212;p=palacios.git

diff --git a/palacios/src/devices/piix3.c b/palacios/src/devices/piix3.c
index 487a821..e1709d6 100644
--- a/palacios/src/devices/piix3.c
+++ b/palacios/src/devices/piix3.c
@@ -74,7 +74,7 @@ struct top_of_mem_reg {
 	uint8_t value;
 	struct {
 	    uint8_t rsvd1                    : 1;
-	    uint8_t isadma_reg_fwd_en        : 1;
+    uint8_t isadma_reg_fwd_en        : 1;
 	    uint8_t piix_rsvd                : 1;
 	    uint8_t isadma_lo_bios_fwd_en    : 1;
 	    uint8_t top_of_mem               : 4;
@@ -361,47 +361,98 @@ static int reset_piix3(struct v3_southbridge * piix3) {
 }
 
 
-//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0x3
+//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0xf
+/*
+struct pirq_rc_reg {
+       uint8_t irq         : 4;
+       uint8_t rsvd        : 3;
+       uint8_t disabled    : 1; // (1=disabled, 0=enabled)
+}
+*/
+
 
-static int raise_pci_irq(struct pci_device * pci_dev, void * dev_data) {
+static int raise_pci_irq(struct pci_device * pci_dev, void * dev_data, struct v3_irq * vec) {
     struct v3_southbridge * piix3 = dev_data;
     struct pci_device * piix3_pci = piix3->southbridge_pci;
     struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(piix3_pci->config_data);
     int intr_pin = pci_dev->config_header.intr_pin - 1;
     int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3;
+    struct v3_irq irq; // Make a copy of the irq state because we will switch the irq number
+
+    irq.ack = vec->ack;
+    irq.private_data = vec->private_data;
+
+    /*
+    PrintError(info->vm_info, info, "Raising PCI dev %d intr %d via IOAPIC as IRQ %d and via PIRQ as IRQ %d on VM %p\n", 
+	       pci_dev->dev_num, pci_dev->config_header.intr_pin, 
+	       16+irq_index,
+	       piix3_cfg->pirq_rc[irq_index], piix3->vm);
+    */
+
+    // deliver first by PIRQ, if it exists
+    //
+    if (piix3_cfg->pirq_rc[irq_index] < 16) {
+	irq.irq = piix3_cfg->pirq_rc[irq_index] & 0xf;
+
+	//	V3_Print(info->vm_info, info, "Raising PIIX IRQ %d\n", irq.irq);
+	v3_raise_acked_irq(piix3->vm, irq);
+    } else {
+      // not an error
+    }
+
+    // deliver next via the PCI0 to ioapic mapping defined in the 
+    // mptable (ioapic, pins 16->19 are used for PCI0)
+    // ideally this would check to verify that an ioapic is actually available
+    irq.irq = (irq_index + 1) + 16;
+    //    V3_Print(info->vm_info, info, "Raising PIIX IRQ (#2) %d\n", irq.irq);
+    v3_raise_acked_irq(piix3->vm, irq);
     
-    //        PrintError("Raising PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]);
-    
-    v3_raise_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index]);
 
     return 0;
 }
 
 
 
-static int lower_pci_irq(struct pci_device * pci_dev, void * dev_data) {
+static int lower_pci_irq(struct pci_device * pci_dev, void * dev_data, struct v3_irq * vec) {
     struct v3_southbridge * piix3 = dev_data;
     struct pci_device * piix3_pci = piix3->southbridge_pci;
     struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(piix3_pci->config_data);
     int intr_pin = pci_dev->config_header.intr_pin - 1;
     int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3;
+    struct v3_irq irq; // Make a copy of the irq state because we will switch the irq number
+
+    irq.ack = vec->ack;
+    irq.private_data = vec->private_data;
+    //    PrintError(info->vm_info, info, "Lowering PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]);
+
+    // First, lower the pin on the ioapic
+    irq.irq = (irq_index + 1) + 16;
+    v3_lower_acked_irq(piix3->vm, irq);
     
-    //    PrintError("Lowering PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]);
-    
-    v3_lower_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index]);
+    // Next, lower whatever we asserted by the PIRQs
+    if (piix3_cfg->pirq_rc[irq_index] < 16) {
+	irq.irq = piix3_cfg->pirq_rc[irq_index] & 0xf;
+	v3_lower_acked_irq(piix3->vm, irq);
+    } else {
+      // not an error
+    }
 
     return 0;
 }
 
 
 
-static int piix_free(struct vm_device * dev) {
+static int piix_free(struct v3_southbridge * piix3) {
+
+    // unregister pci
+
+    V3_Free(piix3);
     return 0;
 }
 
 
 static struct v3_device_ops dev_ops = {
-    .free = piix_free,
+    .free = (int (*)(void *))piix_free,
 };
 
 
@@ -420,9 +471,9 @@ static int setup_pci(struct v3_southbridge * piix3) {
     pci_dev = v3_pci_register_device(piix3->pci_bus, PCI_MULTIFUNCTION, 
 				     bus_num, -1, 0, 
 				     "PIIX3", bars, 
-				     NULL, NULL, NULL, piix3);
+				     NULL, NULL, NULL, NULL, piix3);
     if (pci_dev == NULL) {
-	PrintError("Could not register PCI Device for PIIX3\n");
+	PrintError(VM_NONE, VCORE_NONE, "Could not register PCI Device for PIIX3\n");
 	return -1;
     }
 
@@ -446,24 +497,36 @@ static int piix3_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
     struct vm_device * pci = v3_find_dev(vm, v3_cfg_val(cfg, "bus"));
     char * dev_id = v3_cfg_val(cfg, "ID");
 
+    if (!piix3) {
+	PrintError(vm, VCORE_NONE, "Cannot allocate in init\n");
+	return -1;
+    }
+
     if (!pci) {
-	PrintError("Could not find PCI device\n");
+	PrintError(vm, VCORE_NONE, "Could not find PCI device\n");
 	return -1;
     }
 
     piix3->pci_bus = pci;
     piix3->type = V3_SB_PIIX3;
+    piix3->vm = vm;
     
-    dev = v3_allocate_device(dev_id, &dev_ops, piix3);
+    dev = v3_add_device(vm, dev_id, &dev_ops, piix3);
 
-    if (v3_attach_device(vm, dev) == -1) {
-	PrintError("Could not attach device %s\n", dev_id);
+    if (dev == NULL) {
+	PrintError(vm, VCORE_NONE, "Could not attach device %s\n", dev_id);
+	V3_Free(piix3);
 	return -1;
     }
 
-    PrintDebug("Created PIIX3\n");
+    PrintDebug(vm, VCORE_NONE, "Created PIIX3\n");
 
-    return setup_pci(piix3);
+    if (setup_pci(piix3) == -1) {
+	v3_remove_device(dev);
+	return -1;
+    }
+
+    return 0;
 }