X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fpiix3.c;h=b482b488e59576fdb46a2cf893b0448f5b62e1a2;hb=eb2dd607efd35a1521ae6a707e0a2178dd1f74ee;hp=487a821a9d467b68f25be5c3638e3ea7f91d35ad;hpb=e2964f7234daa3429275c039769a313f0870c212;p=palacios.git diff --git a/palacios/src/devices/piix3.c b/palacios/src/devices/piix3.c index 487a821..b482b48 100644 --- a/palacios/src/devices/piix3.c +++ b/palacios/src/devices/piix3.c @@ -74,7 +74,7 @@ struct top_of_mem_reg { uint8_t value; struct { uint8_t rsvd1 : 1; - uint8_t isadma_reg_fwd_en : 1; + uint8_t isadma_reg_fwd_en : 1; uint8_t piix_rsvd : 1; uint8_t isadma_lo_bios_fwd_en : 1; uint8_t top_of_mem : 4; @@ -361,7 +361,15 @@ static int reset_piix3(struct v3_southbridge * piix3) { } -//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0x3 +//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0xf +/* +struct pirq_rc_reg { + uint8_t irq : 4; + uint8_t rsvd : 3; + uint8_t disabled : 1; // (1=disabled, 0=enabled) +} +*/ + static int raise_pci_irq(struct pci_device * pci_dev, void * dev_data) { struct v3_southbridge * piix3 = dev_data; @@ -369,10 +377,27 @@ static int raise_pci_irq(struct pci_device * pci_dev, void * dev_data) { struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(piix3_pci->config_data); int intr_pin = pci_dev->config_header.intr_pin - 1; int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3; + + /* + PrintError("Raising PCI dev %d intr %d via IOAPIC as IRQ %d and via PIRQ as IRQ %d on VM %p\n", + pci_dev->dev_num, pci_dev->config_header.intr_pin, + 16+irq_index, + piix3_cfg->pirq_rc[irq_index], piix3->vm); + */ + + // deliver first by PIRQ, if it exists + // + if (piix3_cfg->pirq_rc[irq_index] < 16) { + v3_raise_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index] & 0xf); + } else { + // not an error + } + + // deliver next via the PCI0 to ioapic mapping defined in the + // mptable (ioapic, pins 16->19 are used for PCI0) + // ideally this would check to verify that an ioapic is actually available + v3_raise_irq(piix3->vm, 16+irq_index); - // PrintError("Raising PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]); - - v3_raise_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index]); return 0; } @@ -387,21 +412,33 @@ static int lower_pci_irq(struct pci_device * pci_dev, void * dev_data) { int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3; // PrintError("Lowering PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]); + + // First, lower the pin on the ioapic + v3_lower_irq(piix3->vm, irq_index+16); - v3_lower_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index]); + // Next, lower whatever we asserted by the PIRQs + if (piix3_cfg->pirq_rc[irq_index] < 16) { + v3_lower_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index] & 0xf); + } else { + // not an error + } return 0; } -static int piix_free(struct vm_device * dev) { +static int piix_free(struct v3_southbridge * piix3) { + + // unregister pci + + V3_Free(piix3); return 0; } static struct v3_device_ops dev_ops = { - .free = piix_free, + .free = (int (*)(void *))piix_free, }; @@ -453,17 +490,24 @@ static int piix3_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) { piix3->pci_bus = pci; piix3->type = V3_SB_PIIX3; + piix3->vm = vm; - dev = v3_allocate_device(dev_id, &dev_ops, piix3); + dev = v3_add_device(vm, dev_id, &dev_ops, piix3); - if (v3_attach_device(vm, dev) == -1) { + if (dev == NULL) { PrintError("Could not attach device %s\n", dev_id); + V3_Free(piix3); return -1; } PrintDebug("Created PIIX3\n"); - return setup_pci(piix3); + if (setup_pci(piix3) == -1) { + v3_remove_device(dev); + return -1; + } + + return 0; }