X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fpci.c;h=ab85aea13f10ca7bbe19c5a98557666e8963db5d;hb=4eb8163fe76127f9748caa43f8ffad1e4d739bb8;hp=19eb21da7b6cc7b8299d17859107ca17f607366a;hpb=deff53b15d1de2f4371a22fb99fafd145de51ce4;p=palacios.git diff --git a/palacios/src/devices/pci.c b/palacios/src/devices/pci.c index 19eb21d..ab85aea 100644 --- a/palacios/src/devices/pci.c +++ b/palacios/src/devices/pci.c @@ -74,6 +74,10 @@ struct pci_bus { // Bitmap of the allocated device numbers uint8_t dev_map[MAX_BUS_DEVICES / 8]; + + int (*raise_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev); + int (*lower_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev); + struct vm_device * irq_bridge_dev; }; @@ -121,11 +125,13 @@ static int get_free_dev_num(struct pci_bus * bus) { int i, j; for (i = 0; i < sizeof(bus->dev_map); i++) { + PrintDebug("i=%d\n", i); if (bus->dev_map[i] != 0xff) { // availability for (j = 0; j < 8; j++) { + PrintDebug("\tj=%d\n", j); if (!(bus->dev_map[i] & (0x1 << j))) { - return i * 8 + j; + return ((i * 8) + j); } } } @@ -135,7 +141,7 @@ static int get_free_dev_num(struct pci_bus * bus) { } static void allocate_dev_num(struct pci_bus * bus, int dev_num) { - int major = dev_num / 8; + int major = (dev_num / 8); int minor = dev_num % 8; bus->dev_map[major] |= (0x1 << minor); @@ -154,9 +160,9 @@ struct pci_device * __add_device_to_bus(struct pci_bus * bus, struct pci_device parent = *p; tmp_dev = rb_entry(parent, struct pci_device, dev_tree_node); - if (dev->dev_num < tmp_dev->dev_num) { + if (dev->devfn < tmp_dev->devfn) { p = &(*p)->rb_left; - } else if (dev->dev_num > tmp_dev->dev_num) { + } else if (dev->devfn > tmp_dev->devfn) { p = &(*p)->rb_right; } else { return tmp_dev; @@ -186,16 +192,17 @@ struct pci_device * add_device_to_bus(struct pci_bus * bus, struct pci_device * } -static struct pci_device * get_device(struct pci_bus * bus, int dev_num) { +static struct pci_device * get_device(struct pci_bus * bus, uint8_t dev_num, uint8_t fn_num) { struct rb_node * n = bus->devices.rb_node; struct pci_device * dev = NULL; + uint8_t devfn = ((dev_num & 0x1f) << 3) | (fn_num & 0x7); while (n) { dev = rb_entry(n, struct pci_device, dev_tree_node); - if (dev_num < dev->dev_num) { + if (devfn < dev->devfn) { n = n->rb_left; - } else if (dev_num > dev->dev_num) { + } else if (devfn > dev->devfn) { n = n->rb_right; } else { return dev; @@ -216,7 +223,7 @@ static int addr_port_read(ushort_t port, void * dst, uint_t length, struct vm_de int reg_offset = port & 0x3; uint8_t * reg_addr = ((uint8_t *)&(pci_state->addr_reg.val)) + reg_offset; - PrintDebug("Reading PCI Address Port (%x): %x\n", port, pci_state->addr_reg.val); + PrintDebug("Reading PCI Address Port (%x): %x len=%d\n", port, pci_state->addr_reg.val, length); if (length == 4) { if (reg_offset != 0) { @@ -276,38 +283,47 @@ static int addr_port_write(ushort_t port, void * src, uint_t length, struct vm_d PrintDebug("Writing PCI Address Port(%x): %x\n", port, pci_state->addr_reg.val); - return length; } static int data_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * vmdev) { - struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data;; + struct pci_internal * pci_state = (struct pci_internal *)(vmdev->private_data); struct pci_device * pci_dev = NULL; - uint_t reg_num = pci_state->addr_reg.reg_num + (port & 0x3); + uint_t reg_num = (pci_state->addr_reg.reg_num << 2) + (port & 0x3); int i; + if (pci_state->addr_reg.bus_num != 0) { + int i = 0; + for (i = 0; i < length; i++) { + *((uint8_t *)dst + i) = 0xff; + } + + return length; + } + PrintDebug("Reading PCI Data register. bus = %d, dev = %d, reg = %d (%x), cfg_reg = %x\n", pci_state->addr_reg.bus_num, pci_state->addr_reg.dev_num, reg_num, reg_num, pci_state->addr_reg.val); - - pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num); + pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num, pci_state->addr_reg.fn_num); if (pci_dev == NULL) { for (i = 0; i < length; i++) { - *((uint8_t *)dst + i) = 0xff; + *(uint8_t *)((uint8_t *)dst + i) = 0xff; } return length; } for (i = 0; i < length; i++) { - *((uint8_t *)dst + i) = pci_dev->config_space[reg_num + i]; + *(uint8_t *)((uint8_t *)dst + i) = pci_dev->config_space[reg_num + i]; } - + + PrintDebug("\tVal=%x, len=%d\n", *(uint32_t *)dst, length); + return length; } @@ -331,6 +347,24 @@ static inline int is_cfg_reg_writable(uchar_t header_type, int reg_num) { return 1; } + } else if (header_type == 0x80) { + switch (reg_num) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + case 0x3d: + return 0; + + default: + return 1; + + } } else { // PCI to PCI Bridge = 0x01 // CardBus Bridge = 0x02 @@ -343,20 +377,83 @@ static inline int is_cfg_reg_writable(uchar_t header_type, int reg_num) { } +static int bar_update(struct pci_device * pci, int bar_num, uint32_t new_val) { + struct v3_pci_bar * bar = &(pci->bar[bar_num]); + + PrintDebug("Updating BAR Register (Dev=%s) (bar=%d) (old_val=%x) (new_val=%x)\n", + pci->name, bar_num, bar->val, new_val); + + switch (bar->type) { + case PCI_BAR_IO: { + int i = 0; + + PrintDebug("\tRehooking %d IO ports from base %x to %x\n", + bar->num_ports, PCI_IO_BASE(bar->val), PCI_IO_BASE(new_val)); + + // only do this if pci device is enabled.... + for (i = 0; i < bar->num_ports; i++) { + + v3_dev_unhook_io(pci->vm_dev, PCI_IO_BASE(bar->val) + i); + + v3_dev_hook_io(pci->vm_dev, PCI_IO_BASE(new_val) + i, + bar->io_read, bar->io_write); + } + + bar->val = new_val; + + break; + } + case PCI_BAR_MEM32: { + v3_unhook_mem(pci->vm_dev->vm, (addr_t)(bar->val)); + + if (bar->mem_read) { + v3_hook_full_mem(pci->vm_dev->vm, PCI_MEM32_BASE(new_val), + PCI_MEM32_BASE(new_val) + (bar->num_pages * PAGE_SIZE_4KB), + bar->mem_read, bar->mem_write, pci->vm_dev); + } else { + PrintError("Write hooks not supported for PCI\n"); + return -1; + } + + bar->val = new_val; + + break; + } + case PCI_BAR_NONE: { + PrintDebug("Reprogramming an unsupported BAR register (Dev=%s) (bar=%d) (val=%x)\n", + pci->name, bar_num, new_val); + break; + } + default: + PrintError("Invalid Bar Reg updated (bar=%d)\n", bar_num); + return -1; + } + + return 0; +} + + static int data_port_write(ushort_t port, void * src, uint_t length, struct vm_device * vmdev) { struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data; struct pci_device * pci_dev = NULL; - uint_t reg_num = pci_state->addr_reg.reg_num + (port & 0x3); + uint_t reg_num = (pci_state->addr_reg.reg_num << 2) + (port & 0x3); int i; - PrintDebug("Writing PCI Data register. bus = %d, dev = %d, reg = %d (%x) addr_reg = %x\n", + + if (pci_state->addr_reg.bus_num != 0) { + return length; + } + + PrintDebug("Writing PCI Data register. bus = %d, dev = %d, fn = %d, reg = %d (%x) addr_reg = %x (val=%x, len=%d)\n", pci_state->addr_reg.bus_num, pci_state->addr_reg.dev_num, + pci_state->addr_reg.fn_num, reg_num, reg_num, - pci_state->addr_reg.val); + pci_state->addr_reg.val, + *(uint32_t *)src, length); - pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num); + pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num, pci_state->addr_reg.fn_num); if (pci_dev == NULL) { PrintError("Writing configuration space for non-present device (dev_num=%d)\n", @@ -367,35 +464,49 @@ static int data_port_write(ushort_t port, void * src, uint_t length, struct vm_d for (i = 0; i < length; i++) { uint_t cur_reg = reg_num + i; + int writable = is_cfg_reg_writable(pci_dev->config_header.header_type, cur_reg); - if (is_cfg_reg_writable(pci_dev->config_header.header_type, cur_reg)) { - pci_dev->config_space[cur_reg] = *((uint8_t *)src + i); + if (writable == -1) { + PrintError("Invalid PCI configuration space\n"); + return -1; + } + + if (writable) { + pci_dev->config_space[cur_reg] = *(uint8_t *)((uint8_t *)src + i); if ((cur_reg >= 0x10) && (cur_reg < 0x28)) { - // BAR Reg - int bar_reg = (cur_reg & ~0x3) - 0x10; + // BAR Register Update + int bar_reg = ((cur_reg & ~0x3) - 0x10) / 4; + + pci_dev->bar_update_flag = 1; + pci_dev->bar[bar_reg].updated = 1; + + // PrintDebug("Updating BAR register %d\n", bar_reg); - if (pci_dev->bar[bar_reg].bar_update) { - pci_dev->bar_update_flag = 1; - pci_dev->bar[bar_reg].updated = 1; - } } else if ((cur_reg >= 0x30) && (cur_reg < 0x34)) { + // Extension ROM update + pci_dev->ext_rom_update_flag = 1; } else if (cur_reg == 0x04) { - // COMMAND update - uint8_t command = *((uint8_t *)src + i); - - pci_dev->config_space[cur_reg] = command; + // COMMAND update + uint8_t command = *((uint8_t *)src + i); + + PrintError("command update for %s old=%x new=%x\n", + pci_dev->name, + pci_dev->config_space[cur_reg],command); - if (pci_dev->cmd_update) { - pci_dev->cmd_update(pci_dev, (command & 0x01), (command & 0x02)); - } - + pci_dev->config_space[cur_reg] = command; + if (pci_dev->cmd_update) { + pci_dev->cmd_update(pci_dev, (command & 0x01), (command & 0x02)); + } + } else if (cur_reg == 0x0f) { // BIST update pci_dev->config_header.BIST = 0x00; } + } else { + PrintError("PCI Write to read only register %d\n", cur_reg); } } @@ -410,10 +521,14 @@ static int data_port_write(ushort_t port, void * src, uint_t length, struct vm_d int bar_offset = 0x10 + 4 * i; *(uint32_t *)(pci_dev->config_space + bar_offset) &= pci_dev->bar[i].mask; + // check special flags.... - if (pci_dev->bar[i].bar_update) { - pci_dev->bar[i].bar_update(pci_dev, i); + // bar_update + if (bar_update(pci_dev, i, *(uint32_t *)(pci_dev->config_space + bar_offset)) == -1) { + PrintError("PCI Device %s: Bar update Error Bar=%d\n", pci_dev->name, i); + return -1; } + pci_dev->bar[i].updated = 0; } } @@ -450,7 +565,7 @@ static int pci_stop_device(struct vm_device * dev) { -static int pci_deinit_device(struct vm_device * dev) { +static int pci_free(struct vm_device * dev) { int i = 0; for (i = 0; i < 4; i++){ @@ -463,38 +578,6 @@ static int pci_deinit_device(struct vm_device * dev) { - -static int init_i440fx(struct vm_device * dev) { - struct pci_device * pci_dev = NULL; - struct v3_pci_bar bars[6]; - int i; - - for (i = 0; i < 6; i++) { - bars[i].type = PCI_BAR_NONE; - bars[i].mem_hook = 0; - bars[i].num_pages = 0; - bars[i].bar_update = NULL; - } - - pci_dev = v3_pci_register_device(dev, PCI_STD_DEVICE, 0, "i440FX", 0, bars, - NULL, NULL, NULL, NULL); - - if (!pci_dev) { - return -1; - } - - pci_dev->config_header.vendor_id = 0x8086; - pci_dev->config_header.device_id = 0x1237; - pci_dev->config_header.revision = 0x0002; - pci_dev->config_header.subclass = 0x00; // SubClass: host2pci - pci_dev->config_header.class = 0x06; // Class: PCI bridge - - pci_dev->bus_num = 0; - return 0; -} - - - static void init_pci_busses(struct pci_internal * pci_state) { int i; @@ -507,24 +590,35 @@ static void init_pci_busses(struct pci_internal * pci_state) { -static int pci_init_device(struct vm_device * dev) { - struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;; + +static struct v3_device_ops dev_ops = { + .free = pci_free, + .reset = pci_reset_device, + .start = pci_start_device, + .stop = pci_stop_device, +}; + + + + +static int pci_init(struct guest_info * vm, void * cfg_data) { + struct pci_internal * pci_state = V3_Malloc(sizeof(struct pci_internal)); int i = 0; - PrintDebug("pci: init_device\n"); + PrintDebug("PCI internal at %p\n",(void *)pci_state); + + struct vm_device * dev = v3_allocate_device("PCI", &dev_ops, pci_state); + + if (v3_attach_device(vm, dev) == -1) { + PrintError("Could not attach device %s\n", "PCI"); + return -1; + } - // JRL: Fix this.... - // dev->vm->pci = dev; //should be in vmm_config.c pci_state->addr_reg.val = 0; init_pci_busses(pci_state); - - if (init_i440fx(dev) == -1) { - PrintError("Could not intialize i440fx\n"); - return -1; - } - + PrintDebug("Sizeof config header=%d\n", (int)sizeof(struct pci_config_header)); for (i = 0; i < 4; i++) { @@ -536,74 +630,121 @@ static int pci_init_device(struct vm_device * dev) { } -static struct vm_device_ops dev_ops = { - .init = pci_init_device, - .deinit = pci_deinit_device, - .reset = pci_reset_device, - .start = pci_start_device, - .stop = pci_stop_device, -}; - - -struct vm_device * v3_create_pci() { - struct pci_internal * pci_state = V3_Malloc(sizeof(struct pci_internal)); - - PrintDebug("PCI internal at %p\n",(void *)pci_state); - - struct vm_device * device = v3_create_device("PCI", &dev_ops, pci_state); - - return device; -} - +device_register("PCI", pci_init) static inline int init_bars(struct pci_device * pci_dev) { int i = 0; for (i = 0; i < 6; i++) { - int bar_offset = 0x10 + 4 * i; + int bar_offset = 0x10 + (4 * i); if (pci_dev->bar[i].type == PCI_BAR_IO) { - pci_dev->bar[i].mask = 0x0000fffd; - *(uint32_t *)(pci_dev->config_space + bar_offset) = 0x00000001; + int j = 0; + pci_dev->bar[i].mask = (~((pci_dev->bar[i].num_ports) - 1)) | 0x01; + + pci_dev->bar[i].val = pci_dev->bar[i].default_base_port & pci_dev->bar[i].mask; + pci_dev->bar[i].val |= 0x00000001; + + for (j = 0; j < pci_dev->bar[i].num_ports; j++) { + // hook IO + if (pci_dev->bar[i].default_base_port != 0xffff) { + if (v3_dev_hook_io(pci_dev->vm_dev, pci_dev->bar[i].default_base_port + j, + pci_dev->bar[i].io_read, pci_dev->bar[i].io_write) == -1) { + PrintError("Could not hook default io port %x\n", pci_dev->bar[i].default_base_port + j); + return -1; + } + } + } + + *(uint32_t *)(pci_dev->config_space + bar_offset) = pci_dev->bar[i].val; + } else if (pci_dev->bar[i].type == PCI_BAR_MEM32) { pci_dev->bar[i].mask = ~((pci_dev->bar[i].num_pages << 12) - 1); pci_dev->bar[i].mask |= 0xf; // preserve the configuration flags - - *(uint32_t *)(pci_dev->config_space + bar_offset) = 0x00000008; - - if (pci_dev->bar[i].mem_hook) { - // clear the prefetchable flag... - *(uint8_t *)(pci_dev->config_space + bar_offset) &= ~0x00000008; + + pci_dev->bar[i].val = pci_dev->bar[i].default_base_addr & pci_dev->bar[i].mask; + + // hook memory + if (pci_dev->bar[i].mem_read) { + // full hook + v3_hook_full_mem(pci_dev->vm_dev->vm, pci_dev->bar[i].default_base_addr, + pci_dev->bar[i].default_base_addr + (pci_dev->bar[i].num_pages * PAGE_SIZE_4KB), + pci_dev->bar[i].mem_read, pci_dev->bar[i].mem_write, pci_dev->vm_dev); + } else if (pci_dev->bar[i].mem_write) { + // write hook + PrintError("Write hooks not supported for PCI devices\n"); + return -1; + /* + v3_hook_write_mem(pci_dev->vm_dev->vm, pci_dev->bar[i].default_base_addr, + pci_dev->bar[i].default_base_addr + (pci_dev->bar[i].num_pages * PAGE_SIZE_4KB), + pci_dev->bar[i].mem_write, pci_dev->vm_dev); + */ + } else { + // set the prefetchable flag... + pci_dev->bar[i].val |= 0x00000008; } + + + *(uint32_t *)(pci_dev->config_space + bar_offset) = pci_dev->bar[i].val; + } else if (pci_dev->bar[i].type == PCI_BAR_MEM16) { PrintError("16 Bit memory ranges not supported (reg: %d)\n", i); + return -1; } else if (pci_dev->bar[i].type == PCI_BAR_NONE) { - *(uint32_t *)(pci_dev->config_space + bar_offset) = 0x00000000; + pci_dev->bar[i].val = 0x00000000; + pci_dev->bar[i].mask = 0x00000000; // This ensures that all updates will be dropped + *(uint32_t *)(pci_dev->config_space + bar_offset) = pci_dev->bar[i].val; } else { PrintError("Invalid BAR type for bar #%d\n", i); return -1; } - - } return 0; } +int v3_pci_set_irq_bridge(struct vm_device * pci_bus, int bus_num, + int (*raise_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev), + int (*lower_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev), + struct vm_device * bridge_dev) { + struct pci_internal * pci_state = (struct pci_internal *)pci_bus->private_data; + + + pci_state->bus_list[bus_num].raise_pci_irq = raise_pci_irq; + pci_state->bus_list[bus_num].lower_pci_irq = lower_pci_irq; + pci_state->bus_list[bus_num].irq_bridge_dev = bridge_dev; + + return 0; +} + +int v3_pci_raise_irq(struct vm_device * pci_bus, int bus_num, struct pci_device * dev) { + struct pci_internal * pci_state = (struct pci_internal *)pci_bus->private_data; + struct pci_bus * bus = &(pci_state->bus_list[bus_num]); + + return bus->raise_pci_irq(bus->irq_bridge_dev, dev); +} + +int v3_pci_lower_irq(struct vm_device * pci_bus, int bus_num, struct pci_device * dev) { + struct pci_internal * pci_state = (struct pci_internal *)pci_bus->private_data; + struct pci_bus * bus = &(pci_state->bus_list[bus_num]); + + return bus->lower_pci_irq(bus->irq_bridge_dev, dev); +} // if dev_num == -1, auto assign struct pci_device * v3_pci_register_device(struct vm_device * pci, pci_device_type_t dev_type, - uint_t bus_num, - const char * name, + int bus_num, int dev_num, + int fn_num, + const char * name, struct v3_pci_bar * bars, int (*config_update)(struct pci_device * pci_dev, uint_t reg_num, int length), int (*cmd_update)(struct pci_device *pci_dev, uchar_t io_enabled, uchar_t mem_enabled), int (*ext_rom_update)(struct pci_device * pci_dev), - void * private_data) { + struct vm_device * dev) { struct pci_internal * pci_state = (struct pci_internal *)pci->private_data; struct pci_bus * bus = &(pci_state->bus_list[bus_num]); @@ -615,14 +756,17 @@ struct pci_device * v3_pci_register_device(struct vm_device * pci, return NULL; } - if (dev_num == -1) { + if (dev_num == PCI_AUTO_DEV_NUM) { + PrintDebug("Searching for free device number\n"); if ((dev_num = get_free_dev_num(bus)) == -1) { PrintError("No more available PCI slots on bus %d\n", bus->bus_num); return NULL; } } - if (get_device(bus, dev_num) != NULL) { + PrintDebug("Checking for PCI Device\n"); + + if (get_device(bus, dev_num, fn_num) != NULL) { PrintError("PCI Device already registered at slot %d on bus %d\n", dev_num, bus->bus_num); return NULL; @@ -632,16 +776,20 @@ struct pci_device * v3_pci_register_device(struct vm_device * pci, pci_dev = (struct pci_device *)V3_Malloc(sizeof(struct pci_device)); if (pci_dev == NULL) { + PrintError("Could not allocate pci device\n"); return NULL; } memset(pci_dev, 0, sizeof(struct pci_device)); - + switch (dev_type) { case PCI_STD_DEVICE: pci_dev->config_header.header_type = 0x00; break; + case PCI_MULTIFUNCTION: + pci_dev->config_header.header_type = 0x80; + break; default: PrintError("Unhandled PCI Device Type: %d\n", dev_type); return NULL; @@ -649,24 +797,37 @@ struct pci_device * v3_pci_register_device(struct vm_device * pci, pci_dev->bus_num = bus_num; pci_dev->dev_num = dev_num; + pci_dev->fn_num = fn_num; strncpy(pci_dev->name, name, sizeof(pci_dev->name)); - pci_dev->vm_dev = pci; + pci_dev->vm_dev = dev; // register update callbacks pci_dev->config_update = config_update; pci_dev->cmd_update = cmd_update; pci_dev->ext_rom_update = ext_rom_update; - pci_dev->priv_data = private_data; - //copy bars - for (i = 0; i < 6; i ++){ - pci_dev->bar[i].type = bars[i].type; - pci_dev->bar[i].num_pages = bars[i].num_pages; - pci_dev->bar[i].mem_hook = bars[i].mem_hook; - pci_dev->bar[i].bar_update = bars[i].bar_update; + for (i = 0; i < 6; i ++) { + pci_dev->bar[i].type = bars[i].type; + + if (pci_dev->bar[i].type == PCI_BAR_IO) { + pci_dev->bar[i].num_ports = bars[i].num_ports; + pci_dev->bar[i].default_base_port = bars[i].default_base_port; + pci_dev->bar[i].io_read = bars[i].io_read; + pci_dev->bar[i].io_write = bars[i].io_write; + } else if (pci_dev->bar[i].type == PCI_BAR_MEM32) { + pci_dev->bar[i].num_pages = bars[i].num_pages; + pci_dev->bar[i].default_base_addr = bars[i].default_base_addr; + pci_dev->bar[i].mem_read = bars[i].mem_read; + pci_dev->bar[i].mem_write = bars[i].mem_write; + } else { + pci_dev->bar[i].num_pages = 0; + pci_dev->bar[i].default_base_addr = 0; + pci_dev->bar[i].mem_read = NULL; + pci_dev->bar[i].mem_write = NULL; + } } if (init_bars(pci_dev) == -1) { @@ -674,13 +835,9 @@ struct pci_device * v3_pci_register_device(struct vm_device * pci, return NULL; } - pci_dev->cmd_update = cmd_update; - pci_dev->ext_rom_update = ext_rom_update; - // add the device add_device_to_bus(bus, pci_dev); - #ifdef DEBUG_PCI pci_dump_state(pci_state); #endif