X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fnvram.c;h=f15795f22cb90ff663b4217ec1d169c691aa8fbe;hb=32cee4124eb5ac84b2c8990d056fd50f987203a5;hp=1244f90355af20ad5159f61033dfb2c3d0cc197a;hpb=4bc3ee757b44d3e466fd89e348106c47fa5511ee;p=palacios.git diff --git a/palacios/src/devices/nvram.c b/palacios/src/devices/nvram.c index 1244f90..f15795f 100644 --- a/palacios/src/devices/nvram.c +++ b/palacios/src/devices/nvram.c @@ -18,12 +18,19 @@ */ -#include +#include #include #include +#include -#ifndef DEBUG_NVRAM +#include +#include +#include +#include + + +#ifndef V3_CONFIG_DEBUG_NVRAM #undef PrintDebug #define PrintDebug(fmt, args...) #endif @@ -61,6 +68,7 @@ typedef enum {NVRAM_READY, NVRAM_REG_POSTED} nvram_state_t; #define NVRAM_REG_SHUTDOWN_STATUS 0x0f #define NVRAM_IBM_HD_DATA 0x12 +#define NVRAM_IDE_TRANSLATION 0x39 #define NVRAM_REG_FLOPPY_TYPE 0x10 #define NVRAM_REG_EQUIPMENT_BYTE 0x14 @@ -87,64 +95,115 @@ typedef enum {NVRAM_READY, NVRAM_REG_POSTED} nvram_state_t; #define NVRAM_REG_BOOTSEQ_NEW_FIRST 0x3D #define NVRAM_REG_BOOTSEQ_NEW_SECOND 0x38 +#define CHECKSUM_REGION_FIRST_BYTE 0x10 +#define CHECKSUM_REGION_LAST_BYTE 0x2d + +// Following fields are used by SEABIOS +#define NVRAM_REG_HIGHMEM_LOW 0x5b +#define NVRAM_REG_HIGHMEM_MID 0x5c +#define NVRAM_REG_HIGHMEM_HIGH 0x5d +#define NVRAM_REG_SMPCPUS 0x5f + +#define DEFAULT_BOOTSEQ "cd,hd" struct nvram_internal { nvram_state_t dev_state; - uchar_t thereg; - uchar_t mem_state[NVRAM_REG_MAX]; + uint8_t thereg; + uint8_t mem_state[NVRAM_REG_MAX]; + uint8_t reg_map[NVRAM_REG_MAX / 8]; + + struct vm_device * ide; - uint_t us; //microseconds - for clock update - zeroed every second - uint_t pus; //microseconds - for periodic interrupt - cleared every period + struct v3_vm_info * vm; + + struct v3_timer *timer; + + v3_lock_t nvram_lock; + + uint64_t us; //microseconds - for clock update - zeroed every second + uint64_t pus; //microseconds - for periodic interrupt - cleared every period }; struct rtc_stata { - uint_t rate: 4; // clock rate = 65536Hz / 2 rate (0110=1024 Hz) - uint_t basis: 3; // time base, 010 = 32,768 Hz - uint_t uip: 1; // 1=update in progress + uint8_t rate : 4; // clock rate = 65536Hz / 2 rate (0110=1024 Hz) + uint8_t basis : 3; // time base, 010 = 32,768 Hz + uint8_t uip : 1; // 1=update in progress } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ; struct rtc_statb { - uint_t sum: 1; // 1=summer (daylight savings) - uint_t h24: 1; // 1=24h clock - uint_t dm: 1; // 1=date/time is in bcd, 0=binary - uint_t rec: 1; // 1=rectangular signal - uint_t ui: 1; // 1=update interrupt - uint_t ai: 1; // 1=alarm interrupt - uint_t pi: 1; // 1=periodic interrupt - uint_t set: 1; // 1=blocked update + uint8_t sum : 1; // 1=summer (daylight savings) + uint8_t h24 : 1; // 1=24h clock + uint8_t dm : 1; // 0=date/time is in bcd, 1=binary + uint8_t rec : 1; // 1=rectangular signal + uint8_t ui : 1; // 1=update interrupt + uint8_t ai : 1; // 1=alarm interrupt + uint8_t pi : 1; // 1=periodic interrupt + uint8_t set : 1; // 1=blocked update } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ; struct rtc_statc { - uint_t res: 4; // reserved - uint_t uf: 1; // 1=source of interrupt is update - uint_t af: 1; // 1=source of interrupt is alarm interrupt - uint_t pf: 1; // 1=source of interrupt is periodic interrupt - uint_t irq: 1; // 1=interrupt requested + uint8_t res : 4; // reserved + uint8_t uf : 1; // 1=source of interrupt is update + uint8_t af : 1; // 1=source of interrupt is alarm interrupt + uint8_t pf : 1; // 1=source of interrupt is periodic interrupt + uint8_t irq : 1; // 1=interrupt requested } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ; struct rtc_statd { - uint_t res: 7; // reserved - uint_t val: 1; // 1=cmos ram data is OK + uint8_t res : 7; // reserved + uint8_t val : 1; // 1=cmos ram data is OK } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ; struct bcd_num { - uchar_t bot : 4; - uchar_t top : 4; -}; + uint8_t bot : 4; + uint8_t top : 4; +} __attribute__((packed));; + + + +static void set_reg_num(struct nvram_internal * nvram, uint8_t reg_num) { + int major = (reg_num / 8); + int minor = reg_num % 8; + + nvram->reg_map[major] |= (0x1 << minor); +} + +static int is_reg_set(struct nvram_internal * nvram, uint8_t reg_num) { + int major = (reg_num / 8); + int minor = reg_num % 8; + + return (nvram->reg_map[major] & (0x1 << minor)) ? 1 : 0; +} + +static void set_memory(struct nvram_internal * nvram, uint8_t reg, uint8_t val) { + set_reg_num(nvram, reg); + nvram->mem_state[reg] = val; +} + +static int get_memory(struct nvram_internal * nvram, uint8_t reg, uint8_t * val) { + if (!is_reg_set(nvram, reg)) { + *val = 0; + return -1; + } -static uchar_t add_to(uchar_t * left, uchar_t * right, uchar_t bcd) { - uchar_t temp; + *val = nvram->mem_state[reg]; + return 0; +} + + +static uint8_t add_to(uint8_t * left, uint8_t * right, uint8_t bcd) { + uint8_t temp; if (bcd) { struct bcd_num * bl = (struct bcd_num *)left; struct bcd_num * br = (struct bcd_num *)right; - uchar_t carry = 0; + uint8_t carry = 0; bl->bot += br->bot; carry = bl->bot / 0xa; @@ -168,7 +227,7 @@ static uchar_t add_to(uchar_t * left, uchar_t * right, uchar_t bcd) { } -static uchar_t days_in_month(struct vm_device * dev, uchar_t month, uchar_t bcd) { +static uint8_t days_in_month(uint8_t month, uint8_t bcd) { // This completely ignores Julian / Gregorian stuff right now if (bcd) { @@ -226,34 +285,31 @@ static uchar_t days_in_month(struct vm_device * dev, uchar_t month, uchar_t bcd) } -static void update_time(struct vm_device * dev, uint_t period_us) { - struct nvram_internal * data = (struct nvram_internal *) (dev->private_data); - struct rtc_stata * stata = (struct rtc_stata *) &((data->mem_state[NVRAM_REG_STAT_A])); - struct rtc_statb * statb = (struct rtc_statb *) &((data->mem_state[NVRAM_REG_STAT_B])); - struct rtc_statc * statc = (struct rtc_statc *) &((data->mem_state[NVRAM_REG_STAT_C])); +static void update_time(struct nvram_internal * data, uint64_t period_us) { + struct rtc_stata * stata = (struct rtc_stata *)&((data->mem_state[NVRAM_REG_STAT_A])); + struct rtc_statb * statb = (struct rtc_statb *)&((data->mem_state[NVRAM_REG_STAT_B])); + struct rtc_statc * statc = (struct rtc_statc *)&((data->mem_state[NVRAM_REG_STAT_C])); //struct rtc_statd *statd = (struct rtc_statd *) &((data->mem_state[NVRAM_REG_STAT_D])); - uchar_t * sec = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC]); - uchar_t * min = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN]); - uchar_t * hour = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR]); - uchar_t * weekday = (uchar_t *) &(data->mem_state[NVRAM_REG_WEEK_DAY]); - uchar_t * monthday = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH_DAY]); - uchar_t * month = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH]); - uchar_t * year = (uchar_t *) &(data->mem_state[NVRAM_REG_YEAR]); - uchar_t * cent = (uchar_t *) &(data->mem_state[NVRAM_REG_IBM_CENTURY_BYTE]); - uchar_t * seca = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC_ALARM]); - uchar_t * mina = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN_ALARM]); - uchar_t * houra = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR_ALARM]); - uchar_t hour24; - - uchar_t bcd = (statb->dm == 1); - uchar_t carry = 0; - uchar_t nextday = 0; - uint_t periodic_period; - - //PrintDebug("nvram: sizeof(struct rtc_stata)=%d\n", sizeof(struct rtc_stata)); - - - //PrintDebug("nvram: update_time\n",statb->pi); + uint8_t * sec = (uint8_t *)&(data->mem_state[NVRAM_REG_SEC]); + uint8_t * min = (uint8_t *)&(data->mem_state[NVRAM_REG_MIN]); + uint8_t * hour = (uint8_t *)&(data->mem_state[NVRAM_REG_HOUR]); + uint8_t * weekday = (uint8_t *)&(data->mem_state[NVRAM_REG_WEEK_DAY]); + uint8_t * monthday = (uint8_t *)&(data->mem_state[NVRAM_REG_MONTH_DAY]); + uint8_t * month = (uint8_t *)&(data->mem_state[NVRAM_REG_MONTH]); + uint8_t * year = (uint8_t *)&(data->mem_state[NVRAM_REG_YEAR]); + uint8_t * cent = (uint8_t *)&(data->mem_state[NVRAM_REG_IBM_CENTURY_BYTE]); + uint8_t * cent_ps2 = (uint8_t *)&(data->mem_state[NVRAM_REG_IBM_PS2_CENTURY_BYTE]); + uint8_t * seca = (uint8_t *)&(data->mem_state[NVRAM_REG_SEC_ALARM]); + uint8_t * mina = (uint8_t *)&(data->mem_state[NVRAM_REG_MIN_ALARM]); + uint8_t * houra = (uint8_t *)&(data->mem_state[NVRAM_REG_HOUR_ALARM]); + uint8_t hour24; + + uint8_t bcd = (statb->dm == 0); + uint8_t carry = 0; + uint8_t nextday = 0; + uint32_t periodic_period; + + PrintDebug(VM_NONE, VCORE_NONE, "nvram: update_time by %llu microseocnds\n",period_us); // We will set these flags on exit statc->irq = 0; @@ -271,7 +327,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { carry = add_to(sec, &carry, bcd); if (carry) { - PrintDebug("nvram: somehow managed to get a carry in second update\n"); + PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in second update\n"); } if ( (bcd && (*sec == 0x60)) || @@ -282,7 +338,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { carry = 1; carry = add_to(min, &carry, bcd); if (carry) { - PrintDebug("nvram: somehow managed to get a carry in minute update\n"); + PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in minute update\n"); } if ( (bcd && (*min == 0x60)) || @@ -295,7 +351,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { if (hour24 & 0x80) { hour24 &= 0x8f; - uchar_t temp = ((bcd) ? 0x12 : 12); + uint8_t temp = ((bcd) ? 0x12 : 12); add_to(&hour24, &temp, bcd); } } @@ -303,7 +359,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { carry = 1; carry = add_to(&hour24, &carry, bcd); if (carry) { - PrintDebug("nvram: somehow managed to get a carry in hour update\n"); + PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in hour update\n"); } if ( (bcd && (hour24 == 0x24)) || @@ -349,7 +405,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { *weekday %= 0x7; // same regardless of bcd - if ((*monthday) != days_in_month(dev, *month, bcd)) { + if ((*monthday) != days_in_month(*month, bcd)) { add_to(monthday, &carry, bcd); } else { *monthday = 0x1; @@ -369,6 +425,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { *year = 0; carry = 1; add_to(cent, &carry, bcd); + *cent_ps2 = *cent; } } } @@ -382,7 +439,7 @@ static void update_time(struct vm_device * dev, uint_t period_us) { if (statb->ai) { if ((*sec == *seca) && (*min == *mina) && (*hour == *houra)) { statc->af = 1; - PrintDebug("nvram: interrupt on alarm\n"); + PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on alarm\n"); } } } @@ -392,167 +449,304 @@ static void update_time(struct vm_device * dev, uint_t period_us) { if (data->pus >= periodic_period) { statc->pf = 1; data->pus -= periodic_period; - PrintDebug("nvram: interrupt on periodic\n"); + PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on periodic\n"); } } if (statb->ui) { statc->uf = 1; - PrintDebug("nvram: interrupt on update\n"); + PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on update\n"); } statc->irq = (statc->pf || statc->af || statc->uf); - //PrintDebug("nvram: time is now: YMDHMS: 0x%x:0x%x:0x%x:0x%x:0x%x,0x%x bcd=%d\n", *year, *month, *monthday, *hour, *min, *sec,bcd); + PrintDebug(VM_NONE, VCORE_NONE, "nvram: time is now: YMDHMS: 0x%x:0x%x:0x%x:0x%x:0x%x,0x%x bcd=%d\n", *year, *month, *monthday, *hour, *min, *sec,bcd); // Interrupt associated VM, if needed if (statc->irq) { - PrintDebug("nvram: injecting interrupt\n"); - v3_raise_irq(dev->vm, NVRAM_RTC_IRQ); + PrintDebug(VM_NONE, VCORE_NONE, "nvram: injecting interrupt\n"); + v3_raise_irq(data->vm, NVRAM_RTC_IRQ); } } -static int handle_timer_event(struct guest_info * info, - struct v3_timer_event * evt, - void * priv_data) { +static void nvram_update_timer(struct guest_info *vm, + ullong_t cpu_cycles, + ullong_t cpu_freq, + void *priv_data) +{ + struct nvram_internal *nvram_state = (struct nvram_internal *)priv_data; + uint64_t period_us; - struct vm_device * dev = (struct vm_device *)priv_data; + + // cpu freq in khz + period_us = (1000*cpu_cycles/cpu_freq); - if (dev) { - update_time(dev, evt->period_us); - } - - return 0; -} + update_time(nvram_state,period_us); +} static void set_memory_size(struct nvram_internal * nvram, addr_t bytes) { // 1. Conventional Mem: 0-640k in K // 2. Extended Mem: 0-16MB in K // 3. Big Mem: 0-4G in 64K + // 4. High Mem: 4G-... in 64K - if (bytes > 640 * 1024) { - nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = 0x02; - nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = 0x80; - } else { - uint16_t memk = bytes * 1024; - nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = (memk >> 8) & 0x00ff; - nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = memk & 0x00ff; + // at most 640K of conventional memory + { + uint16_t memk = 0; + + if (bytes > (640 * 1024)) { + memk = 640; + } else { + memk = bytes / 1024; + } - return; + set_memory(nvram, NVRAM_REG_BASE_MEMORY_HIGH, (memk >> 8) & 0x00ff); + set_memory(nvram, NVRAM_REG_BASE_MEMORY_LOW, memk & 0x00ff); } - if (bytes > (16 * 1024 * 1024)) { - // Set extended memory to 15 MB - nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = 0x3C; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = 0x00; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= 0x3C; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= 0x00; - } else { - uint16_t memk = bytes * 1024; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = (memk >> 8) & 0x00ff; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = memk & 0x00ff; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= (memk >> 8) & 0x00ff; - nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= memk & 0x00ff; + // set extended memory - first 1 MB is lost to 640K chunk + // extended memory is min(0MB, bytes - 1MB) + { + uint16_t memk = 0; - return; + if (bytes >= (1024 * 1024)) { + memk = (bytes - (1024 * 1024)) / 1024; + } + + set_memory(nvram, NVRAM_REG_EXT_MEMORY_HIGH, (memk >> 8) & 0x00ff); + set_memory(nvram, NVRAM_REG_EXT_MEMORY_LOW, memk & 0x00ff); + set_memory(nvram, NVRAM_REG_EXT_MEMORY_2ND_HIGH, (memk >> 8) & 0x00ff); + set_memory(nvram, NVRAM_REG_EXT_MEMORY_2ND_LOW, memk & 0x00ff); } + // Set the extended memory beyond 16 MB in 64k chunks + // this is min(0, bytes - 16MB) { - // Set the extended memory beyond 16 MB in 64k chunks - uint16_t mem_chunks = (bytes - (1024 * 1024 * 16)) / (1024 * 64); - nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH] = (mem_chunks >> 8) & 0x00ff; - nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW] = mem_chunks & 0x00ff; + uint16_t mem_chunks = 0; + + if (bytes >= (1024 * 1024 * 16)) { + mem_chunks = (bytes - (1024 * 1024 * 16)) / (1024 * 64); + } + + set_memory(nvram, NVRAM_REG_AMI_BIG_MEMORY_HIGH, (mem_chunks >> 8) & 0x00ff); + set_memory(nvram, NVRAM_REG_AMI_BIG_MEMORY_LOW, mem_chunks & 0x00ff); + } + + // Set high (>4GB) memory size + { + + uint32_t high_mem_chunks = 0; + + if (bytes >= (1024LL * 1024LL * 1024LL * 4LL)) { + high_mem_chunks = (bytes - (1024LL * 1024LL * 1024LL * 4LL)) / (1024 * 64); + } + + set_memory(nvram, NVRAM_REG_HIGHMEM_LOW, high_mem_chunks & 0xff); + set_memory(nvram, NVRAM_REG_HIGHMEM_MID, (high_mem_chunks >> 8) & 0xff); + set_memory(nvram, NVRAM_REG_HIGHMEM_HIGH, (high_mem_chunks >> 16) & 0xff); } return; } -static int init_nvram_state(struct vm_device * dev) { - struct guest_info * info = dev->vm; - struct nvram_internal * nvram_state = (struct nvram_internal *)dev->private_data; - - memset(nvram_state->mem_state, 0, NVRAM_REG_MAX); - // - // 2 1.44 MB floppy drives - // -#if 1 - nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x44; -#else - nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x00; + +static void init_harddrives(struct nvram_internal * nvram) { + uint8_t hd_data = 0; + uint32_t cyls; + uint32_t sects; + uint32_t heads; + int i = 0; + int info_base_reg = 0x1b; + int type_reg = 0x19; + + // 0x19 == first drive type + // 0x1a == second drive type + + // 0x1b == first drive geometry base + // 0x24 == second drive geometry base + + // It looks like the BIOS only tracks the disks on the first channel at 0x12? + for (i = 0; i < 2; i++) { + if (v3_ide_get_geometry(nvram->ide->private_data, 0, i, &cyls, &heads, §s) == 0) { + + int info_reg = info_base_reg + (i * 9); + + set_memory(nvram, type_reg + i, 0x2f); + + set_memory(nvram, info_reg, cyls & 0xff); + set_memory(nvram, info_reg + 1, (cyls >> 8) & 0xff); + set_memory(nvram, info_reg + 2, heads & 0xff); + + // Write precomp cylinder (1 and 2) + set_memory(nvram, info_reg + 3, 0xff); + set_memory(nvram, info_reg + 4, 0xff); + + // harddrive control byte + set_memory(nvram, info_reg + 5, 0xc0 | ((heads > 8) << 3)); + + set_memory(nvram, info_reg + 6, cyls & 0xff); + set_memory(nvram, info_reg + 7, (cyls >> 8) & 0xff); + + set_memory(nvram, info_reg + 8, sects & 0xff); + + hd_data |= (0xf0 >> (i * 4)); + } + } + + set_memory(nvram, NVRAM_IBM_HD_DATA, hd_data); + + { +#define TRANSLATE_NONE 0x0 +#define TRANSLATE_LBA 0x1 +#define TRANSLATE_LARGE 0x2 +#define TRANSLATE_RECHS 0x3 + // We're going to do LBA translation for everything... + uint8_t trans = 0; + + for (i = 0; i < 4; i++) { + int chan_num = i / 2; + int drive_num = i % 2; + uint32_t tmp[3]; + + if (v3_ide_get_geometry(nvram->ide->private_data, chan_num, drive_num, &tmp[0], &tmp[1], &tmp[2]) == 0) { + trans |= TRANSLATE_LBA << (i * 2); + } + } + + set_memory(nvram, NVRAM_IDE_TRANSLATION, trans); + } +} + +static uint16_t compute_checksum(struct nvram_internal * nvram) { + uint16_t checksum = 0; + uint8_t reg = 0; + uint8_t val = 0; + + /* add all fields between the RTC and the checksum fields */ + for (reg = CHECKSUM_REGION_FIRST_BYTE; reg < CHECKSUM_REGION_LAST_BYTE; reg++) { + /* unset fields are considered zero so get_memory can be ignored */ + get_memory(nvram, reg, &val); + checksum += val; + } + + return checksum; +} + +static int init_nvram_state(struct v3_vm_info * vm, struct nvram_internal * nvram, char *bootseq) { + uint16_t checksum = 0; + uint64_t mem_size=vm->mem_size; + uint32_t num_cores=vm->num_cores; + +#ifdef V3_CONFIG_HVM + mem_size = v3_get_hvm_ros_memsize(vm); + num_cores = v3_get_hvm_ros_cores(vm); #endif + memset(nvram->mem_state, 0, NVRAM_REG_MAX); + memset(nvram->reg_map, 0, NVRAM_REG_MAX / 8); + + v3_lock_init(&(nvram->nvram_lock)); + // - // For old boot sequence style, do floppy first + // There are no floppy drives // - nvram_state->mem_state[NVRAM_REG_BOOTSEQ_OLD] = 0x10; + set_memory(nvram, NVRAM_REG_FLOPPY_TYPE, 0x00); -#if 0 - // For new boot sequence style, do floppy, cd, then hd - nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x31; - nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x20; -#endif + // + // For old boot sequence style, do non-floppy devices first + // + set_memory(nvram, NVRAM_REG_BOOTSEQ_OLD, 0x00); + + if (!strcasecmp(bootseq,"cd")) { + // CD only + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x03); + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00); + } else if (!strcasecmp(bootseq,"cd,hd")) { + // CD, then HD + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x23); + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00); + } else if (!strcasecmp(bootseq,"hd")) { + // HD only + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x02); + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00); + } else if (!strcasecmp(bootseq,"hd,cd")) { + // HD, then CD + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x32); + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00); + } else { + PrintError(vm,VCORE_NONE,"nvram: unknown boot sequence '%s', setting 'cd,hd'\n",bootseq); + // CD, then HD + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x23); + set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00); + } - // For new boot sequence style, do cd, hd, floppy - nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x23; - nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x10; - + + // Set equipment byte to note no floppies, vga display, keyboard, math + set_memory(nvram, NVRAM_REG_EQUIPMENT_BYTE, 0x2e); - // Set equipment byte to note 2 floppies, vga display, keyboard,math,floppy - nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0x4f; - // nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0xf; - - - // This is the harddisk type.... Set accordingly... - nvram_state->mem_state[NVRAM_IBM_HD_DATA] = 0x20; // Set the shutdown status gently // soft reset - nvram_state->mem_state[NVRAM_REG_SHUTDOWN_STATUS] = 0x0; + set_memory(nvram, NVRAM_REG_SHUTDOWN_STATUS, 0x0); // RTC status A // 00100110 = no update in progress, base=32768 Hz, rate = 1024 Hz - nvram_state->mem_state[NVRAM_REG_STAT_A] = 0x26; + set_memory(nvram, NVRAM_REG_STAT_A, 0x26); // RTC status B - // 00000100 = not setting, no interrupts, blocked rect signal, bcd mode, 24 hour, normal time - nvram_state->mem_state[NVRAM_REG_STAT_B] = 0x06; + // 00000010 = not setting, no interrupts, blocked rect signal, bcd mode (bit 3 = 0), 24 hour, normal time + set_memory(nvram, NVRAM_REG_STAT_B, 0x02); // RTC status C // No IRQ requested, result not do to any source - nvram_state->mem_state[NVRAM_REG_STAT_C] = 0x00; + set_memory(nvram, NVRAM_REG_STAT_C, 0x00); // RTC status D // Battery is OK - nvram_state->mem_state[NVRAM_REG_STAT_D] = 0x80; + set_memory(nvram, NVRAM_REG_STAT_D, 0x80); // january 1, 2008, 00:00:00 - nvram_state->mem_state[NVRAM_REG_MONTH] = 0x1; - nvram_state->mem_state[NVRAM_REG_MONTH_DAY] = 0x1; - nvram_state->mem_state[NVRAM_REG_WEEK_DAY] = 0x1; - nvram_state->mem_state[NVRAM_REG_YEAR] = 0x08; - - nvram_state->us = 0; - nvram_state->pus = 0; - - set_memory_size(nvram_state, info->mem_size); - - nvram_state->dev_state = NVRAM_READY; - nvram_state->thereg = 0; - - return 0; -} + set_memory(nvram, NVRAM_REG_SEC, 0x00); + set_memory(nvram, NVRAM_REG_SEC_ALARM, 0x00); + set_memory(nvram, NVRAM_REG_MIN, 0x00); + set_memory(nvram, NVRAM_REG_MIN_ALARM, 0x00); + set_memory(nvram, NVRAM_REG_HOUR, 0x00); + set_memory(nvram, NVRAM_REG_HOUR_ALARM, 0x00); + + set_memory(nvram, NVRAM_REG_MONTH, 0x01); + set_memory(nvram, NVRAM_REG_MONTH_DAY, 0x1); + set_memory(nvram, NVRAM_REG_WEEK_DAY, 0x1); + set_memory(nvram, NVRAM_REG_YEAR, 0x08); + set_memory(nvram, NVRAM_REG_IBM_CENTURY_BYTE, 0x20); + set_memory(nvram, NVRAM_REG_IBM_PS2_CENTURY_BYTE, 0x20); + + set_memory(nvram, NVRAM_REG_DIAGNOSTIC_STATUS, 0x00); + + nvram->us = 0; + nvram->pus = 0; + set_memory_size(nvram, mem_size); + init_harddrives(nvram); + set_memory(nvram, NVRAM_REG_SMPCPUS, num_cores - 1); + + /* compute checksum (must follow all assignments here) */ + checksum = compute_checksum(nvram); + set_memory(nvram, NVRAM_REG_CSUM_HIGH, (checksum >> 8) & 0xff); + set_memory(nvram, NVRAM_REG_CSUM_LOW, checksum & 0xff); -static int nvram_reset_device(struct vm_device * dev) { + + + nvram->dev_state = NVRAM_READY; + nvram->thereg = 0; return 0; } @@ -561,112 +755,172 @@ static int nvram_reset_device(struct vm_device * dev) { -static int nvram_start_device(struct vm_device * dev) { - PrintDebug("nvram: start device\n"); - return 0; -} - -static int nvram_stop_device(struct vm_device * dev) { - PrintDebug("nvram: stop device\n"); - return 0; -} +static int nvram_write_reg_port(struct guest_info * core, uint16_t port, + void * src, uint_t length, void * priv_data) { + uint8_t reg; + struct nvram_internal * data = priv_data; + memcpy(®,src,1); + data->thereg = reg & 0x7f; //discard NMI bit if it's there + + PrintDebug(core->vm_info, core, "nvram: Writing To NVRAM reg: 0x%x (NMI_disable=%d)\n", data->thereg,reg>>7); + return 1; +} -static int nvram_write_reg_port(ushort_t port, - void * src, - uint_t length, - struct vm_device * dev) { - struct nvram_internal * data = (struct nvram_internal *)dev->private_data; +static int nvram_read_data_port(struct guest_info * core, uint16_t port, + void * dst, uint_t length, void * priv_data) { - memcpy(&(data->thereg), src, 1); - PrintDebug("Writing To NVRAM reg: 0x%x\n", data->thereg); + struct nvram_internal * data = priv_data; + addr_t irq_state = v3_lock_irqsave(data->nvram_lock); - return 1; -} + if (get_memory(data, data->thereg, (uint8_t *)dst) == -1) { + PrintError(core->vm_info, core, "nvram: Register %d (0x%x) Not set - POSSIBLE BUG IN MACHINE INIT - CONTINUING\n", data->thereg, data->thereg); -static int nvram_read_data_port(ushort_t port, - void * dst, - uint_t length, - struct vm_device * dev) { - struct nvram_internal * data = (struct nvram_internal *)dev->private_data; + } - memcpy(dst, &(data->mem_state[data->thereg]), 1); - - PrintDebug("nvram_read_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]); + PrintDebug(core->vm_info, core, "nvram: nvram_read_data_port(0x%x) = 0x%x\n", data->thereg, *(uint8_t *)dst); // hack if (data->thereg == NVRAM_REG_STAT_A) { data->mem_state[data->thereg] ^= 0x80; // toggle Update in progess } + v3_unlock_irqrestore(data->nvram_lock, irq_state); return 1; } -static int nvram_write_data_port(ushort_t port, - void * src, - uint_t length, - struct vm_device * dev) { - struct nvram_internal * data = (struct nvram_internal *)dev->private_data; - memcpy(&(data->mem_state[data->thereg]), src, 1); +static int nvram_write_data_port(struct guest_info * core, uint16_t port, + void * src, uint_t length, void * priv_data) { + + struct nvram_internal * data = priv_data; + + addr_t irq_state = v3_lock_irqsave(data->nvram_lock); + + set_memory(data, data->thereg, *(uint8_t *)src); + + v3_unlock_irqrestore(data->nvram_lock, irq_state); - PrintDebug("nvram_write_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]); + PrintDebug(core->vm_info, core, "nvram: nvram_write_data_port(0x%x) = 0x%x\n", + data->thereg, data->mem_state[data->thereg]); return 1; } -static int nvram_init_device(struct vm_device * dev) { - PrintDebug("nvram: init_device\n"); - init_nvram_state(dev); - - // hook ports - v3_dev_hook_io(dev, NVRAM_REG_PORT, NULL, &nvram_write_reg_port); - v3_dev_hook_io(dev, NVRAM_DATA_PORT, &nvram_read_data_port, &nvram_write_data_port); - - v3_hook_host_event(dev->vm, HOST_TIMER_EVT, V3_HOST_EVENT_HANDLER(handle_timer_event), dev); +static int nvram_free(struct nvram_internal * nvram_state) { + + // unregister host events + struct guest_info *info = &(nvram_state->vm->cores[0]); - return 0; -} + if (nvram_state->timer) { + v3_remove_timer(info,nvram_state->timer); + } -static int nvram_deinit_device(struct vm_device * dev) { - v3_dev_unhook_io(dev, NVRAM_REG_PORT); - v3_dev_unhook_io(dev, NVRAM_DATA_PORT); + v3_lock_deinit(&(nvram_state->nvram_lock)); - nvram_reset_device(dev); + V3_Free(nvram_state); return 0; } +static struct v3_timer_ops timer_ops = { + .update_timer = nvram_update_timer, +}; -static struct vm_device_ops dev_ops = { - .init = nvram_init_device, - .deinit = nvram_deinit_device, - .reset = nvram_reset_device, - .start = nvram_start_device, - .stop = nvram_stop_device, +static struct v3_device_ops dev_ops = { + .free = (int (*)(void *))nvram_free, }; +/* + + + STORAGE + BOOTSEQ + + STORAGE = the id of the storage controller that will be used to populate + the legacy storage device info (e.g., cd, hd the bios knows about) -struct vm_device * v3_create_nvram() { + BOOTSEQ = the boot sequence desired - note lack of spaces: + + cd - first cd only + hd - first hd only + cd,hd - first cd, then first hd + hd,cd - first hd, then first cd + + The default is cd,hd +*/ + +static int nvram_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) { struct nvram_internal * nvram_state = NULL; + struct vm_device * ide = v3_find_dev(vm, v3_cfg_val(cfg, "storage")); + char * dev_id = v3_cfg_val(cfg, "ID"); + char * bootseq = v3_cfg_val(cfg,"bootseq"); + + int ret = 0; + + if (!ide) { + PrintError(vm, VCORE_NONE, "nvram: Could not find IDE device\n"); + return -1; + } + if (!bootseq) { + bootseq=DEFAULT_BOOTSEQ; + PrintDebug(vm, VCORE_NONE, "nvram: using default boot sequence %s\n",bootseq); + } + + PrintDebug(vm, VCORE_NONE, "nvram: init_device\n"); nvram_state = (struct nvram_internal *)V3_Malloc(sizeof(struct nvram_internal) + 1000); - PrintDebug("nvram: internal at %p\n", (void *)nvram_state); + if (!nvram_state) { + PrintError(vm, VCORE_NONE, "Cannot allocate in init\n"); + return -1; + } + + PrintDebug(vm, VCORE_NONE, "nvram: internal at %p\n", (void *)nvram_state); + + nvram_state->ide = ide; + nvram_state->vm = vm; - struct vm_device * device = v3_create_device("NVRAM", &dev_ops, nvram_state); + struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, nvram_state); - return device; + if (dev == NULL) { + PrintError(vm, VCORE_NONE, "nvram: Could not attach device %s\n", dev_id); + V3_Free(nvram_state); + return -1; + } + + init_nvram_state(vm, nvram_state, bootseq); + + // hook ports + ret |= v3_dev_hook_io(dev, NVRAM_REG_PORT, NULL, &nvram_write_reg_port); + ret |= v3_dev_hook_io(dev, NVRAM_DATA_PORT, &nvram_read_data_port, &nvram_write_data_port); + + if (ret != 0) { + PrintError(vm, VCORE_NONE, "nvram: Error hooking NVRAM IO ports\n"); + v3_remove_device(dev); + return -1; + } + + nvram_state->timer = v3_add_timer(&(vm->cores[0]),&timer_ops,nvram_state); + + if (nvram_state->timer == NULL ) { + v3_remove_device(dev); + return -1; + } + + return 0; } + +device_register("NVRAM", nvram_init)