X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fnvram.c;h=624179f6e3a0e90b1f902179317b10de8f174605;hb=cbf35ad72de3a7a1f6eee3e8b2b35d7f31df22a5;hp=bf450aee744f45901daf97b0f475894708fcc725;hpb=2b1f4ef19d766727f873476861c64339c8836a40;p=palacios.git diff --git a/palacios/src/devices/nvram.c b/palacios/src/devices/nvram.c index bf450ae..624179f 100644 --- a/palacios/src/devices/nvram.c +++ b/palacios/src/devices/nvram.c @@ -80,7 +80,11 @@ static int set_nvram_defaults(struct vm_device *dev) // // 2 1.44 MB floppy drives // +#if 1 nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE]= 0x44; +#else + nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x00; +#endif // // For old boot sequence style, do floppy first @@ -100,6 +104,7 @@ static int set_nvram_defaults(struct vm_device *dev) // Set equipment byte to note 2 floppies, vga display, keyboard,math,floppy nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE]= 0x4f; + //nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0xf; // Set conventional memory to 640K nvram_state->mem_state[NVRAM_REG_BASE_MEMORY_HIGH]= 0x02; @@ -112,16 +117,33 @@ static int set_nvram_defaults(struct vm_device *dev) nvram_state->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= 0x00; // Set the extended memory beyond 16 MB to 128-16 MB - // nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH]= 0x7; - //nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW]= 0x00; + nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH] = 0x7; + nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW] = 0x00; - nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH]= 0x00; - nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW]= 0x00; + //nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH]= 0x00; + //nvram_state->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW]= 0x00; // This is the harddisk type.... Set accordingly... nvram_state->mem_state[NVRAM_IBM_HD_DATA] = 0x20; + // Set the shutdown status gently + // soft reset + nvram_state->mem_state[NVRAM_REG_SHUTDOWN_STATUS] = 0x0; + + + // RTC status A + // time update in progress, default timebase (32KHz, default interrupt rate 1KHz) + // 10100110 + nvram_state->mem_state[NVRAM_REG_STAT_A] = 0xa6; + + // RTC status B + // time updates, default timebase (32KHz, default interrupt rate 1KHz) + // 10100110 + //nvram_state->mem_state[NVRAM_REG_STAT_B] = 0xa6; + + + return 0; } @@ -190,6 +212,12 @@ int nvram_read_data_port(ushort_t port, PrintDebug("nvram_read_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]); + // hack + if (data->thereg==NVRAM_REG_STAT_A) { + data->mem_state[data->thereg] ^= 0x80; // toggle Update in progess + } + + return 1; }