X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fne2k.c;h=939bd28c6d58d15d71b4070b98b724228fddcc9d;hb=9381e554546d0f27197bf20f53bd05e95169b21a;hp=f17f31d3abd63e25683f3bfbe5ea88a32fa23cd2;hpb=06332b6b7f1c53db7afb674f0ad056d40b1f88cb;p=palacios-OLD.git diff --git a/palacios/src/devices/ne2k.c b/palacios/src/devices/ne2k.c index f17f31d..939bd28 100644 --- a/palacios/src/devices/ne2k.c +++ b/palacios/src/devices/ne2k.c @@ -43,8 +43,10 @@ #define NE2K_MEM_SIZE NE2K_PMEM_END #define NIC_REG_BASE_PORT 0xc100 /* Command register (for all pages) */ -#define NIC_DATA_PORT 0xc110 /* Data read/write port */ -#define NIC_RESET_PORT 0xc11f /* Reset port */ + +#define NE2K_CMD_OFFSET 0x00 +#define NE2K_DATA_OFFSET 0x10 +#define NE2K_RESET_OFFSET 0x1f /* Page 0 registers */ #define EN0_CLDALO 0x01 /* Low byte of current local dma addr RD */ @@ -1033,16 +1035,16 @@ static int ne2k_pci_write(struct guest_info * core, int ret; switch (idx) { - case NIC_REG_BASE_PORT: + case NE2K_CMD_OFFSET: ret = ne2k_cmd_write(core, port, src, length, private_data); break; - case NIC_REG_BASE_PORT+1 ... NIC_REG_BASE_PORT+15: + case NE2K_CMD_OFFSET+1 ... NE2K_CMD_OFFSET+15: ret = ne2k_std_write(core, port, src, length, private_data); break; - case NIC_DATA_PORT: + case NE2K_DATA_OFFSET: ret = ne2k_data_write(core, port, src, length, private_data); break; - case NIC_RESET_PORT: + case NE2K_RESET_OFFSET: ret = ne2k_reset_port_write(core, port, src, length, private_data); break; @@ -1063,16 +1065,16 @@ static int ne2k_pci_read(struct guest_info * core, int ret; switch (idx) { - case NIC_REG_BASE_PORT: + case NE2K_CMD_OFFSET: ret = ne2k_cmd_read(core, port, dst, length, private_data); break; - case NIC_REG_BASE_PORT+1 ... NIC_REG_BASE_PORT+15: + case NE2K_CMD_OFFSET+1 ... NE2K_CMD_OFFSET+15: ret = ne2k_std_read(core, port, dst, length, private_data); break; - case NIC_DATA_PORT: + case NE2K_DATA_OFFSET: ret = ne2k_data_read(core, port, dst, length, private_data); break; - case NIC_RESET_PORT: + case NE2K_RESET_OFFSET: ret = ne2k_reset_port_read(core, port, dst, length, private_data); break; @@ -1151,8 +1153,8 @@ static int register_dev(struct ne2k_state * nic_state) v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + i, &ne2k_std_read, &ne2k_std_write); } - v3_dev_hook_io(nic_state->dev, NIC_DATA_PORT, &ne2k_data_read, &ne2k_data_write); - v3_dev_hook_io(nic_state->dev, NIC_RESET_PORT, &ne2k_reset_port_read, &ne2k_reset_port_write); + v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_DATA_OFFSET, &ne2k_data_read, &ne2k_data_write); + v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_RESET_OFFSET, &ne2k_reset_port_read, &ne2k_reset_port_write); } @@ -1193,8 +1195,8 @@ static int ne2k_free(struct ne2k_state * nic_state) { v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + i); } - v3_dev_unhook_io(nic_state->dev, NIC_DATA_PORT); - v3_dev_unhook_io(nic_state->dev, NIC_RESET_PORT); + v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_DATA_OFFSET); + v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_RESET_OFFSET); }else { /* unregistered from PCI? */ }