X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fio_apic.c;h=e68c7411b132d12f2e037d39b99e25ff9ae673d5;hb=7ebb801201cc0c40f769db676e69b6e7394b08b5;hp=0817e9beaa811071fb7d1023f4672ecd04525fa9;hpb=5d1bbcc86de011e3f0d115b6f10fd8645cdf855e;p=palacios.releases.git

diff --git a/palacios/src/devices/io_apic.c b/palacios/src/devices/io_apic.c
index 0817e9b..e68c741 100644
--- a/palacios/src/devices/io_apic.c
+++ b/palacios/src/devices/io_apic.c
@@ -263,16 +263,28 @@ static int ioapic_write(struct guest_info * core, addr_t guest_addr, void * src,
 }
 
 
-static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq) {
+static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, struct v3_irq * irq) {
     struct io_apic_state * ioapic = (struct io_apic_state *)(private_data);  
     struct redir_tbl_entry * irq_entry = NULL;
+    uint8_t irq_num = irq->irq;
+
+    if (irq_num == 0) { 
+      // IRQ 0 being raised, in the Palacios context, means the PIT
+      // However, the convention is that it is the PIC that is connected
+      // to PIN 0 of the IOAPIC and the PIT is connected to pin 2
+      // Hence we convert this to the relvant pin.  In the future,
+      // the PIC may signal to the IOAPIC in a different path.
+      // Yes, this is kind of hideous, but it is needed to have the
+      // PIT correctly show up via the IOAPIC
+      irq_num = 2;
+    }
 
-    if (irq > 24) {
+    if (irq_num > 24) {
 	PrintDebug("ioapic %u: IRQ out of range of IO APIC\n", ioapic->ioapic_id.id);
 	return -1;
     }
 
-    irq_entry = &(ioapic->redir_tbl[irq]);
+    irq_entry = &(ioapic->redir_tbl[irq_num]);
 
     if (irq_entry->mask == 0) {
 	struct v3_gen_ipi ipi;
@@ -288,6 +300,8 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
 	ipi.dst = irq_entry->dst_field;
 	ipi.dst_shorthand = 0;
 
+	ipi.ack = irq->ack;
+	ipi.private_data = irq->private_data;
 
 	PrintDebug("ioapic %u: IPI: vector 0x%x, mode 0x%x, logical 0x%x, trigger 0x%x, dst 0x%x, shorthand 0x%x\n",
 		   ioapic->ioapic_id.id, ipi.vector, ipi.mode, ipi.logical, ipi.trigger_mode, ipi.dst, ipi.dst_shorthand);
@@ -302,7 +316,7 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
 }
 
 /* I don't know if we can do anything here.... */
-static int ioapic_lower_irq(struct v3_vm_info * vm, void * private_data, int irq) {
+static int ioapic_lower_irq(struct v3_vm_info * vm, void * private_data, struct v3_irq * irq) {
     return 0;
 }
 
@@ -329,27 +343,36 @@ static int io_apic_free(struct io_apic_state * ioapic) {
 static int io_apic_save(struct v3_chkpt_ctx * ctx, void * private_data) {
     struct io_apic_state * io_apic = (struct io_apic_state *)private_data;
 
-    V3_CHKPT_STD_SAVE(ctx, io_apic->base_addr);
-    V3_CHKPT_STD_SAVE(ctx, io_apic->index_reg);
-    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_id);
-    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_ver);
-    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_arb_id);
-    V3_CHKPT_STD_SAVE(ctx, io_apic->redir_tbl);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->base_addr,savefailout);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->index_reg,savefailout);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->ioapic_id,savefailout);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->ioapic_ver,savefailout);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->ioapic_arb_id,savefailout);
+    V3_CHKPT_SAVE_AUTOTAG(ctx, io_apic->redir_tbl,savefailout);
 
     return 0;
+
+ savefailout:
+    PrintError("ioapic save failed\n");
+    return -1;
 }
 
 static int io_apic_load(struct v3_chkpt_ctx * ctx, void * private_data) {
     struct io_apic_state * io_apic = (struct io_apic_state *)private_data;
 
-    V3_CHKPT_STD_LOAD(ctx, io_apic->base_addr);
-    V3_CHKPT_STD_LOAD(ctx, io_apic->index_reg);
-    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_id);
-    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_ver);
-    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_arb_id);
-    V3_CHKPT_STD_LOAD(ctx, io_apic->redir_tbl);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->base_addr,loadfailout);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->index_reg,loadfailout);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->ioapic_id,loadfailout);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->ioapic_ver,loadfailout);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->ioapic_arb_id,loadfailout);
+    V3_CHKPT_LOAD_AUTOTAG(ctx, io_apic->redir_tbl,loadfailout);
 
     return 0;
+
+ loadfailout:
+    PrintError("ioapic load failed\n");
+    return -1;
+    
 }
 #endif
 
@@ -374,6 +397,11 @@ static int ioapic_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
 
     struct io_apic_state * ioapic = (struct io_apic_state *)V3_Malloc(sizeof(struct io_apic_state));
 
+    if (!ioapic) {
+	PrintError("Cannot allocate in init\n");
+	return -1;
+    }
+
     ioapic->apic_dev_data = apic_dev;
 
     struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, ioapic);