X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fio_apic.c;h=dec1e12fdc4b8c1aed032859fb3563743e8f7e1c;hb=d775bbfa668ce9968bacc0e4257cf86e5ab88e90;hp=010f4ab5da75e51f9e19554f2c7e7e452bdf39b4;hpb=11799589ba31ee388d35ec764cd69e837880ba08;p=palacios.git diff --git a/palacios/src/devices/io_apic.c b/palacios/src/devices/io_apic.c index 010f4ab..dec1e12 100644 --- a/palacios/src/devices/io_apic.c +++ b/palacios/src/devices/io_apic.c @@ -23,7 +23,7 @@ #include #include -#ifndef CONFIG_DEBUG_IO_APIC +#ifndef V3_CONFIG_DEBUG_IO_APIC #undef PrintDebug #define PrintDebug(fmt, args...) #endif @@ -170,7 +170,7 @@ static int ioapic_read(struct guest_info * core, addr_t guest_addr, void * dst, uint32_t reg_tgt = guest_addr - ioapic->base_addr; uint32_t * op_val = (uint32_t *)dst; - PrintDebug("ioapic %u: IOAPIC Read at %p\n", ioapic->ioapic_id.id, (void *)guest_addr); + PrintDebug(core->vm_info, core, "ioapic %u: IOAPIC Read at %p\n", ioapic->ioapic_id.id, (void *)guest_addr); if (reg_tgt == 0x00) { *op_val = ioapic->index_reg; @@ -190,8 +190,8 @@ static int ioapic_read(struct guest_info * core, addr_t guest_addr, void * dst, uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) >> 1; uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 1; - if (redir_index > 0x3f) { - PrintError("ioapic %u: Invalid redirection table entry %x\n", ioapic->ioapic_id.id, (uint32_t)redir_index); + if (redir_index > 23) { + PrintError(core->vm_info, core, "ioapic %u: Invalid redirection table entry %x\n", ioapic->ioapic_id.id, (uint32_t)redir_index); return -1; } @@ -204,7 +204,7 @@ static int ioapic_read(struct guest_info * core, addr_t guest_addr, void * dst, } } - PrintDebug("ioapic %u: IOAPIC Read at %p gave value 0x%x\n", ioapic->ioapic_id.id, (void *)guest_addr, *op_val); + PrintDebug(core->vm_info, core, "ioapic %u: IOAPIC Read at %p gave value 0x%x\n", ioapic->ioapic_id.id, (void *)guest_addr, *op_val); return length; } @@ -215,10 +215,10 @@ static int ioapic_write(struct guest_info * core, addr_t guest_addr, void * src, uint32_t reg_tgt = guest_addr - ioapic->base_addr; uint32_t op_val = *(uint32_t *)src; - PrintDebug("ioapic %u: IOAPIC Write at %p (val = %d)\n", ioapic->ioapic_id.id, (void *)guest_addr, *(uint32_t *)src); + PrintDebug(core->vm_info, core, "ioapic %u: IOAPIC Write at %p (val = %d)\n", ioapic->ioapic_id.id, (void *)guest_addr, *(uint32_t *)src); if (reg_tgt == 0x00) { - PrintDebug("ioapic %u: Setting ioapic index register to 0x%x.\n", ioapic->ioapic_id.id, op_val); + PrintDebug(core->vm_info, core, "ioapic %u: Setting ioapic index register to 0x%x.\n", ioapic->ioapic_id.id, op_val); ioapic->index_reg = op_val; } else if (reg_tgt == 0x10) { // IOWIN register @@ -229,7 +229,7 @@ static int ioapic_write(struct guest_info * core, addr_t guest_addr, void * src, break; case IOAPIC_VER_REG: // GPF/PageFault/Ignore? - PrintError("ioapic %u: Writing to read only IOAPIC register\n", ioapic->ioapic_id.id); + PrintError(core->vm_info, core, "ioapic %u: Writing to read only IOAPIC register\n", ioapic->ioapic_id.id); return -1; case IOAPIC_ARB_REG: ioapic->ioapic_arb_id.val = op_val; @@ -239,18 +239,18 @@ static int ioapic_write(struct guest_info * core, addr_t guest_addr, void * src, uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) >> 1; uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 1; - PrintDebug("ioapic %u: Writing value 0x%x to redirection entry %u (%s)\n", + PrintDebug(core->vm_info, core, "ioapic %u: Writing value 0x%x to redirection entry %u (%s)\n", ioapic->ioapic_id.id, op_val, redir_index, hi_val ? "hi" : "low"); - if (redir_index > 0x3f) { - PrintError("ioapic %u: Invalid redirection table entry %x\n", ioapic->ioapic_id.id, (uint32_t)redir_index); + if (redir_index > 23) { + PrintError(core->vm_info, core, "ioapic %u: Invalid redirection table entry %x\n", ioapic->ioapic_id.id, (uint32_t)redir_index); return -1; } if (hi_val) { - PrintDebug("ioapic %u: Writing to hi of pin %d\n", ioapic->ioapic_id.id, redir_index); + PrintDebug(core->vm_info, core, "ioapic %u: Writing to hi of pin %d\n", ioapic->ioapic_id.id, redir_index); ioapic->redir_tbl[redir_index].hi = op_val; } else { - PrintDebug("ioapic %u: Writing to lo of pin %d\n", ioapic->ioapic_id.id, redir_index); + PrintDebug(core->vm_info, core, "ioapic %u: Writing to lo of pin %d\n", ioapic->ioapic_id.id, redir_index); op_val &= REDIR_LO_MASK; ioapic->redir_tbl[redir_index].lo &= ~REDIR_LO_MASK; ioapic->redir_tbl[redir_index].lo |= op_val; @@ -263,21 +263,33 @@ static int ioapic_write(struct guest_info * core, addr_t guest_addr, void * src, } -static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq) { +static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, struct v3_irq * irq) { struct io_apic_state * ioapic = (struct io_apic_state *)(private_data); struct redir_tbl_entry * irq_entry = NULL; + uint8_t irq_num = irq->irq; + + if (irq_num == 0) { + // IRQ 0 being raised, in the Palacios context, means the PIT + // However, the convention is that it is the PIC that is connected + // to PIN 0 of the IOAPIC and the PIT is connected to pin 2 + // Hence we convert this to the relvant pin. In the future, + // the PIC may signal to the IOAPIC in a different path. + // Yes, this is kind of hideous, but it is needed to have the + // PIT correctly show up via the IOAPIC + irq_num = 2; + } - if (irq > 24) { - PrintDebug("ioapic %u: IRQ out of range of IO APIC\n", ioapic->ioapic_id.id); + if (irq_num >= 24) { + PrintDebug(vm, VCORE_NONE, "ioapic %u: IRQ out of range of IO APIC\n", ioapic->ioapic_id.id); return -1; } - irq_entry = &(ioapic->redir_tbl[irq]); + irq_entry = &(ioapic->redir_tbl[irq_num]); if (irq_entry->mask == 0) { struct v3_gen_ipi ipi; - PrintDebug("ioapic %u: IOAPIC Signaling APIC to raise INTR %d\n", + PrintDebug(vm, VCORE_NONE, "ioapic %u: IOAPIC Signaling APIC to raise INTR %d\n", ioapic->ioapic_id.id, irq_entry->vec); @@ -288,9 +300,14 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq ipi.dst = irq_entry->dst_field; ipi.dst_shorthand = 0; + ipi.ack = irq->ack; + ipi.private_data = irq->private_data; + + PrintDebug(vm, VCORE_NONE, "ioapic %u: IPI: vector 0x%x, mode 0x%x, logical 0x%x, trigger 0x%x, dst 0x%x, shorthand 0x%x\n", + ioapic->ioapic_id.id, ipi.vector, ipi.mode, ipi.logical, ipi.trigger_mode, ipi.dst, ipi.dst_shorthand); // Need to add destination argument here... if (v3_apic_send_ipi(vm, &ipi, ioapic->apic_dev_data) == -1) { - PrintError("Error sending IPI to apic %d\n", ipi.dst); + PrintError(vm, VCORE_NONE, "Error sending IPI to apic %d\n", ipi.dst); return -1; } } @@ -299,7 +316,7 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq } /* I don't know if we can do anything here.... */ -static int ioapic_lower_irq(struct v3_vm_info * vm, void * private_data, int irq) { +static int ioapic_lower_irq(struct v3_vm_info * vm, void * private_data, struct v3_irq * irq) { return 0; } @@ -322,10 +339,52 @@ static int io_apic_free(struct io_apic_state * ioapic) { return 0; } +#ifdef V3_CONFIG_CHECKPOINT +static int io_apic_save(struct v3_chkpt_ctx * ctx, void * private_data) { + struct io_apic_state * io_apic = (struct io_apic_state *)private_data; + + + V3_CHKPT_SAVE(ctx, "BASE_ADDR" ,io_apic->base_addr,savefailout); + V3_CHKPT_SAVE(ctx, "INDEX_REG", io_apic->index_reg,savefailout); + V3_CHKPT_SAVE(ctx, "IOAPIC_ID", io_apic->ioapic_id,savefailout); + V3_CHKPT_SAVE(ctx, "IOAPIC_VER", io_apic->ioapic_ver,savefailout); + V3_CHKPT_SAVE(ctx, "IOAPIC_ARB_ID", io_apic->ioapic_arb_id,savefailout); + V3_CHKPT_SAVE(ctx, "REDIR_TABLE", io_apic->redir_tbl,savefailout); + + return 0; + + savefailout: + PrintError(VM_NONE, VCORE_NONE, "ioapic save failed\n"); + return -1; +} + +static int io_apic_load(struct v3_chkpt_ctx * ctx, void * private_data) { + struct io_apic_state * io_apic = (struct io_apic_state *)private_data; + + V3_CHKPT_LOAD(ctx, "BASE_ADDR", io_apic->base_addr,loadfailout); + V3_CHKPT_LOAD(ctx, "INDEX_REG", io_apic->index_reg,loadfailout); + V3_CHKPT_LOAD(ctx, "IOAPIC_ID", io_apic->ioapic_id,loadfailout); + V3_CHKPT_LOAD(ctx, "IOAPIC_VER", io_apic->ioapic_ver,loadfailout); + V3_CHKPT_LOAD(ctx, "IOAPIC_ARB_ID", io_apic->ioapic_arb_id,loadfailout); + V3_CHKPT_LOAD(ctx, "REDIR_TABLE", io_apic->redir_tbl,loadfailout); + + return 0; + + loadfailout: + PrintError(VM_NONE, VCORE_NONE, "ioapic load failed\n"); + return -1; + +} +#endif + + static struct v3_device_ops dev_ops = { .free = (int (*)(void *))io_apic_free, - +#ifdef V3_CONFIG_CHECKPOINT + .save = io_apic_save, + .load = io_apic_load +#endif }; @@ -335,16 +394,23 @@ static int ioapic_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) { char * dev_id = v3_cfg_val(cfg, "ID"); - PrintDebug("ioapic: Creating IO APIC\n"); + PrintDebug(vm, VCORE_NONE, "ioapic: Creating IO APIC\n"); struct io_apic_state * ioapic = (struct io_apic_state *)V3_Malloc(sizeof(struct io_apic_state)); + if (!ioapic) { + PrintError(vm, VCORE_NONE, "Cannot allocate in init\n"); + return -1; + } + + memset(ioapic,0,sizeof(struct io_apic_state)); + ioapic->apic_dev_data = apic_dev; struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, ioapic); if (dev == NULL) { - PrintError("ioapic: Could not attach device %s\n", dev_id); + PrintError(vm, VCORE_NONE, "ioapic: Could not attach device %s\n", dev_id); V3_Free(ioapic); return -1; }