X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fio_apic.c;h=0a6c04a633db1021b4bebb20b6a42cb0c8b14a1f;hb=68a5f03fab0737ce304261028a4517c49ea954c6;hp=a1d3d9f29f9c6b255829628c4dd7cdae330fdeed;hpb=96a71766125d211be08d7670c93938cf0ea09c04;p=palacios.git

diff --git a/palacios/src/devices/io_apic.c b/palacios/src/devices/io_apic.c
index a1d3d9f..0a6c04a 100644
--- a/palacios/src/devices/io_apic.c
+++ b/palacios/src/devices/io_apic.c
@@ -23,7 +23,7 @@
 #include <devices/apic.h>
 #include <palacios/vm_guest.h>
 
-#ifndef CONFIG_DEBUG_IO_APIC
+#ifndef V3_CONFIG_DEBUG_IO_APIC
 #undef PrintDebug
 #define PrintDebug(fmt, args...)
 #endif
@@ -267,6 +267,17 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
     struct io_apic_state * ioapic = (struct io_apic_state *)(private_data);  
     struct redir_tbl_entry * irq_entry = NULL;
 
+    if (irq == 0) { 
+      // IRQ 0 being raised, in the Palacios context, means the PIT
+      // However, the convention is that it is the PIC that is connected
+      // to PIN 0 of the IOAPIC and the PIT is connected to pin 2
+      // Hence we convert this to the relvant pin.  In the future,
+      // the PIC may signal to the IOAPIC in a different path.
+      // Yes, this is kind of hideous, but it is needed to have the
+      // PIT correctly show up via the IOAPIC
+      irq = 2;
+    }
+
     if (irq > 24) {
 	PrintDebug("ioapic %u: IRQ out of range of IO APIC\n", ioapic->ioapic_id.id);
 	return -1;
@@ -277,7 +288,7 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
     if (irq_entry->mask == 0) {
 	struct v3_gen_ipi ipi;
 
-	PrintDebug("ioapic %u: IOAPIC Signalling APIC to raise INTR %d\n", 
+	PrintDebug("ioapic %u: IOAPIC Signaling APIC to raise INTR %d\n", 
 		   ioapic->ioapic_id.id, irq_entry->vec);
 
 
@@ -288,6 +299,11 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
 	ipi.dst = irq_entry->dst_field;
 	ipi.dst_shorthand = 0;
 
+	ipi.ack = NULL;
+	ipi.private_data = NULL;
+
+	PrintDebug("ioapic %u: IPI: vector 0x%x, mode 0x%x, logical 0x%x, trigger 0x%x, dst 0x%x, shorthand 0x%x\n",
+		   ioapic->ioapic_id.id, ipi.vector, ipi.mode, ipi.logical, ipi.trigger_mode, ipi.dst, ipi.dst_shorthand);
 	// Need to add destination argument here...
 	if (v3_apic_send_ipi(vm, &ipi, ioapic->apic_dev_data) == -1) {
 	    PrintError("Error sending IPI to apic %d\n", ipi.dst);
@@ -322,10 +338,42 @@ static int io_apic_free(struct io_apic_state * ioapic) {
     return 0;
 }
 
+#ifdef V3_CONFIG_CHECKPOINT
+static int io_apic_save(struct v3_chkpt_ctx * ctx, void * private_data) {
+    struct io_apic_state * io_apic = (struct io_apic_state *)private_data;
+
+    V3_CHKPT_STD_SAVE(ctx, io_apic->base_addr);
+    V3_CHKPT_STD_SAVE(ctx, io_apic->index_reg);
+    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_id);
+    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_ver);
+    V3_CHKPT_STD_SAVE(ctx, io_apic->ioapic_arb_id);
+    V3_CHKPT_STD_SAVE(ctx, io_apic->redir_tbl);
+
+    return 0;
+}
+
+static int io_apic_load(struct v3_chkpt_ctx * ctx, void * private_data) {
+    struct io_apic_state * io_apic = (struct io_apic_state *)private_data;
+
+    V3_CHKPT_STD_LOAD(ctx, io_apic->base_addr);
+    V3_CHKPT_STD_LOAD(ctx, io_apic->index_reg);
+    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_id);
+    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_ver);
+    V3_CHKPT_STD_LOAD(ctx, io_apic->ioapic_arb_id);
+    V3_CHKPT_STD_LOAD(ctx, io_apic->redir_tbl);
+
+    return 0;
+}
+#endif
+
+
 
 static struct v3_device_ops dev_ops = {
     .free = (int (*)(void *))io_apic_free,
-
+#ifdef V3_CONFIG_CHECKPOINT
+    .save = io_apic_save, 
+    .load = io_apic_load
+#endif
 };