X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Fsrc%2Fdevices%2Fapic.c;h=d27cd128e84c2673be8b1891ccf6a10516ec7b52;hb=7d04da01ea9d82e0bd1f38cd5eb07367f033a087;hp=a26f2314b2e7798186baf74eb74222e6cf1d2f80;hpb=cfdfdd688c579b9a521f00cafb5cf5e0f859e2ad;p=palacios.git

diff --git a/palacios/src/devices/apic.c b/palacios/src/devices/apic.c
index a26f231..d27cd12 100644
--- a/palacios/src/devices/apic.c
+++ b/palacios/src/devices/apic.c
@@ -168,6 +168,7 @@ struct apic_state {
     uint32_t tmr_init_cnt;
 
 
+    struct local_vec_tbl_reg ext_intr_vec_tbl[4];
 
     uint32_t rem_rd_data;
 
@@ -223,6 +224,7 @@ static void init_apic_state(struct apic_state * apic) {
     apic->lint1_vec_tbl.val = 0x00010000;
     apic->err_vec_tbl.val = 0x00010000;
     apic->tmr_div_cfg.val = 0x00000000;
+    //apic->ext_apic_feature.val = 0x00000007;
     apic->ext_apic_feature.val = 0x00040007;
     apic->ext_apic_ctrl.val = 0x00000000;
     apic->spec_eoi.val = 0x00000000;
@@ -288,8 +290,6 @@ static int get_highest_isr(struct apic_state * apic) {
 	    for (j = 7; j >= 0; j--) {
 		uchar_t flag = 0x1 << j;
 		if ((*svc_major) & flag) {
-
-
 		    return ((i * 8) + j);
 		}
 	    }
@@ -312,8 +312,6 @@ static int get_highest_irr(struct apic_state * apic) {
 	    for (j = 7; j >= 0; j--) {
 		uchar_t flag = 0x1 << j;
 		if ((*req_major) & flag) {
-
-
 		    return ((i * 8) + j);
 		}
 	    }
@@ -341,12 +339,12 @@ static int apic_do_eoi(struct apic_state * apic) {
 
 #ifdef CRAY_XT
 	
-	if ((((i * 8) + j) == 238) || 
-	    (((i * 8) + j) == 239)) {
-	    PrintError("Acking IRQ %d\n", ((i * 8) + j));
+	if ((isr_irq == 238) || 
+	    (isr_irq == 239)) {
+	    PrintError("Acking IRQ %d\n", isr_irq);
 	}
 	
-	if (((i * 8) + j) == 238) {
+	if (isr_irq == 238) {
 	    V3_ACK_IRQ(238);
 	}
 #endif
@@ -433,7 +431,6 @@ static int apic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_d
     }
 
 
-    /* Because "May not be supported" doesn't matter to Linux developers... */
     /*   if (length != 4) { */
     /*     PrintError("Invalid apic read length (%d)\n", length); */
     /*     return -1; */
@@ -441,8 +438,6 @@ static int apic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_d
 
     switch (reg_addr & ~0x3) {
 	case EOI_OFFSET:
-	    // Well, only an idiot would read from a architectural write only register
-	    // Oh, Hello Linux.
 	    //    PrintError("Attempting to read from write only register\n");
 	    //    return -1;
 	    break;
@@ -622,9 +617,19 @@ static int apic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_d
 
 	    // Unhandled Registers
 	case EXT_INT_LOC_VEC_TBL_OFFSET0:
+	    val = apic->ext_intr_vec_tbl[0].val;
+	    break;
 	case EXT_INT_LOC_VEC_TBL_OFFSET1:
+	    val = apic->ext_intr_vec_tbl[1].val;
+	    break;
 	case EXT_INT_LOC_VEC_TBL_OFFSET2:
+	    val = apic->ext_intr_vec_tbl[2].val;
+	    break;
 	case EXT_INT_LOC_VEC_TBL_OFFSET3:
+	    val = apic->ext_intr_vec_tbl[3].val;
+	    break;
+    
+
 	case EXT_APIC_FEATURE_OFFSET:
 	case EXT_APIC_CMD_OFFSET:
 	case SEOI_OFFSET:
@@ -795,7 +800,20 @@ static int apic_write(addr_t guest_addr, void * src, uint_t length, void * priv_
 	case IER_OFFSET7:
 	    *(uint32_t *)(apic->int_en_reg + 28) = op_val;
 	    break;
-   
+
+	case EXT_INT_LOC_VEC_TBL_OFFSET0:
+	    apic->ext_intr_vec_tbl[0].val = op_val;
+	    break;
+	case EXT_INT_LOC_VEC_TBL_OFFSET1:
+	    apic->ext_intr_vec_tbl[1].val = op_val;
+	    break;
+	case EXT_INT_LOC_VEC_TBL_OFFSET2:
+	    apic->ext_intr_vec_tbl[2].val = op_val;
+	    break;
+	case EXT_INT_LOC_VEC_TBL_OFFSET3:
+	    apic->ext_intr_vec_tbl[3].val = op_val;
+	    break;
+
 
 	    // Action Registers
 	case EOI_OFFSET:
@@ -806,10 +824,7 @@ static int apic_write(addr_t guest_addr, void * src, uint_t length, void * priv_
 	case INT_CMD_LO_OFFSET:
 	case INT_CMD_HI_OFFSET:
 	    // Unhandled Registers
-	case EXT_INT_LOC_VEC_TBL_OFFSET0:
-	case EXT_INT_LOC_VEC_TBL_OFFSET1:
-	case EXT_INT_LOC_VEC_TBL_OFFSET2:
-	case EXT_INT_LOC_VEC_TBL_OFFSET3:
+
 	case EXT_APIC_CMD_OFFSET:
 	case SEOI_OFFSET:
 	default: