X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fpalacios%2Fvmm_paging.h;h=313afc7601a4ac97b6c2385721b2c1e3327de0ec;hb=7ee817d2495b48dc882df66ded9e8ebf2c4803d9;hp=edc1d6f5945620df34290e83c69827000ce988c1;hpb=2b1f4ef19d766727f873476861c64339c8836a40;p=palacios.git diff --git a/palacios/include/palacios/vmm_paging.h b/palacios/include/palacios/vmm_paging.h index edc1d6f..313afc7 100644 --- a/palacios/include/palacios/vmm_paging.h +++ b/palacios/include/palacios/vmm_paging.h @@ -1,12 +1,30 @@ -#ifndef __VMM_PAGING_H -#define __VMM_PAGING_H - - -#include +/* + * This file is part of the Palacios Virtual Machine Monitor developed + * by the V3VEE Project with funding from the United States National + * Science Foundation and the Department of Energy. + * + * The V3VEE Project is a joint project between Northwestern University + * and the University of New Mexico. You can find out more at + * http://www.v3vee.org + * + * Copyright (c) 2008, Jack Lange + * Copyright (c) 2008, The V3VEE Project + * All rights reserved. + * + * Author: Jack Lange + * + * This is free software. You are permitted to use, + * redistribute, and modify it as specified in the file "V3VEE_LICENSE". + */ + + +#ifndef __VMM_PAGING_H__ +#define __VMM_PAGING_H__ +#ifdef __V3VEE__ -#include +#include #include /* @@ -72,7 +90,7 @@ the host state in the vmcs before entering the guest. */ -#ifdef __V3VEE__ + #define MAX_PTE32_ENTRIES 1024 #define MAX_PDE32_ENTRIES 1024 @@ -90,11 +108,21 @@ the host state in the vmcs before entering the guest. /* Gets the base address needed for a Page Table entry */ #define PD32_BASE_ADDR(x) (((uint_t)x) >> 12) #define PT32_BASE_ADDR(x) (((uint_t)x) >> 12) +#define PD32_4MB_BASE_ADDR(x) (((uint_t)x) >> 22) + + +#define PML4E64_BASE_ADDR(x) (((ullong_t)x) >> 12) +#define PDPE64_BASE_ADDR(x) (((ullong_t)x) >> 12) +#define PDE64_BASE_ADDR(x) (((ullong_t)x) >> 12) +#define PTE64_BASE_ADDR(x) (((ullong_t)x) >> 12) #define PT32_PAGE_ADDR(x) (((uint_t)x) & 0xfffff000) #define PT32_PAGE_OFFSET(x) (((uint_t)x) & 0xfff) #define PT32_PAGE_POWER 12 +#define PD32_4MB_PAGE_ADDR(x) (((uint_t)x) & 0xffc00000) +#define PD32_4MB_PAGE_OFFSET(x) (((uint_t)x) & 0x003fffff) +#define PAGE_SIZE_4MB (4096 * 1024) /* The following should be phased out */ #define PAGE_OFFSET(x) ((((uint_t)x) & 0xfff)) @@ -106,41 +134,67 @@ the host state in the vmcs before entering the guest. -#define CR3_TO_PDE32(cr3) (((ulong_t)cr3) & 0xfffff000) -#define CR3_TO_PDPTRE(cr3) (((ulong_t)cr3) & 0xffffffe0) -#define CR3_TO_PML4E64(cr3) (((ullong_t)cr3) & 0x000ffffffffff000LL) + +#define CR3_TO_PDE32(cr3) (V3_VAddr((void *)(((ulong_t)cr3) & 0xfffff000))) +#define CR3_TO_PDPTRE(cr3) (V3_VAddr((void *)(((ulong_t)cr3) & 0xffffffe0))) +#define CR3_TO_PML4E64(cr3) (V3_VAddr((void *)(((ullong_t)cr3) & 0x000ffffffffff000LL))) + + /* Accessor functions for the page table structures */ -#define PDE32_T_ADDR(x) ((x.pt_base_addr) << 12) -#define PTE32_T_ADDR(x) ((x.page_base_addr) << 12) +#define PDE32_T_ADDR(x) (((x).pt_base_addr) << 12) +#define PTE32_T_ADDR(x) (((x).page_base_addr) << 12) +#define PDE32_4MB_T_ADDR(x) (((x).page_base_addr) << 22) + +/* Page Table Flag Values */ +#define PT32_HOOK 0x1 +#define PT32_GUEST_PT 0x2 -#define VM_WRITE 1 -#define VM_USER 2 -#define VM_NOCACHE 8 -#define VM_READ 0 -#define VM_EXEC 0 -#endif /* PDE 32 bit PAGE STRUCTURES */ -typedef enum {NOT_PRESENT, PTE32, LARGE_PAGE} pde32_entry_type_t; +typedef enum {PDE32_ENTRY_NOT_PRESENT, PDE32_ENTRY_PTE32, PDE32_ENTRY_LARGE_PAGE} pde32_entry_type_t; +typedef enum {PT_ACCESS_OK, PT_ENTRY_NOT_PRESENT, PT_WRITE_ERROR, PT_USER_ERROR} pt_access_status_t; typedef struct pde32 { uint_t present : 1; - uint_t flags : 4; + uint_t writable : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t reserved : 1; - uint_t large_pages : 1; + uint_t large_page : 1; uint_t global_page : 1; uint_t vmm_info : 3; uint_t pt_base_addr : 20; } pde32_t; +typedef struct pde32_4MB { + uint_t present : 1; + uint_t writable : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; + uint_t accessed : 1; + uint_t dirty : 1; + uint_t one : 1; + uint_t global_page : 1; + uint_t vmm_info : 3; + uint_t pat : 1; + uint_t rsvd : 9; + uint_t page_base_addr : 10; + +} pde32_4MB_t; + typedef struct pte32 { uint_t present : 1; - uint_t flags : 4; + uint_t writable : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t dirty : 1; uint_t pte_attr : 1; @@ -163,15 +217,14 @@ typedef struct pte32 { typedef struct pml4e64 { uint_t present : 1; uint_t writable : 1; - uint_t user : 1; - uint_t pwt : 1; - uint_t pcd : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t reserved : 1; uint_t zero : 2; uint_t vmm_info : 3; - uint_t pdp_base_addr_lo : 20; - uint_t pdp_base_addr_hi : 20; + ullong_t pdp_base_addr : 40; uint_t available : 11; uint_t no_execute : 1; } pml4e64_t; @@ -180,16 +233,15 @@ typedef struct pml4e64 { typedef struct pdpe64 { uint_t present : 1; uint_t writable : 1; - uint_t user : 1; - uint_t pwt : 1; - uint_t pcd : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t reserved : 1; - uint_t large_pages : 1; + uint_t large_page : 1; uint_t zero : 1; uint_t vmm_info : 3; - uint_t pd_base_addr_lo : 20; - uint_t pd_base_addr_hi : 20; + ullong_t pd_base_addr : 40; uint_t available : 11; uint_t no_execute : 1; } pdpe64_t; @@ -199,28 +251,32 @@ typedef struct pdpe64 { typedef struct pde64 { uint_t present : 1; - uint_t flags : 4; + uint_t writable : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t reserved : 1; - uint_t large_pages : 1; + uint_t large_page : 1; uint_t reserved2 : 1; uint_t vmm_info : 3; - uint_t pt_base_addr_lo : 20; - uint_t pt_base_addr_hi : 20; + ullong_t pt_base_addr : 40; uint_t available : 11; uint_t no_execute : 1; } pde64_t; typedef struct pte64 { uint_t present : 1; - uint_t flags : 4; + uint_t writable : 1; + uint_t user_page : 1; + uint_t write_through : 1; + uint_t cache_disable : 1; uint_t accessed : 1; uint_t dirty : 1; uint_t pte_attr : 1; uint_t global_page : 1; uint_t vmm_info : 3; - uint_t page_base_addr_lo : 20; - uint_t page_base_addr_hi : 20; + ullong_t page_base_addr : 40; uint_t available : 11; uint_t no_execute : 1; } pte64_t; @@ -236,38 +292,47 @@ typedef struct pf_error_code { uint_t rsvd : 27; } pf_error_t; -typedef enum { PDE32 } paging_mode_t; - void delete_page_tables_pde32(pde32_t * pde); -pde32_entry_type_t pde32_lookup(pde32_t * pde, addr_t addr, addr_t * entry); +pde32_entry_type_t pde32_lookup(pde32_t * pd, addr_t addr, addr_t * entry); int pte32_lookup(pte32_t * pte, addr_t addr, addr_t * entry); +// This assumes that the page table resides in the host address space +// IE. IT DOES NO VM ADDR TRANSLATION +int pt32_lookup(pde32_t * pd, addr_t vaddr, addr_t * paddr); -struct guest_info; -pde32_t * create_passthrough_pde32_pts(struct guest_info * guest_info); +pt_access_status_t can_access_pde32(pde32_t * pde, addr_t addr, pf_error_t access_type); +pt_access_status_t can_access_pte32(pte32_t * pte, addr_t addr, pf_error_t access_type); +struct guest_info; + +pde32_t * create_passthrough_pts_32(struct guest_info * guest_info); +pml4e64_t * create_passthrough_pts_64(struct guest_info * info); + + + + void PrintDebugPageTables(pde32_t * pde); -#ifdef __V3VEE__ void PrintPT32(addr_t starting_address, pte32_t * pte); void PrintPD32(pde32_t * pde); void PrintPTE32(addr_t virtual_address, pte32_t * pte); void PrintPDE32(addr_t virtual_address, pde32_t * pde); +void PrintPTE64(addr_t virtual_address, pte64_t * pte); #endif // !__V3VEE__