X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fpalacios%2Fvmm_instr_emulator.h;h=3e9e613992729752ccbe903d796b8ff135219d0f;hb=0e1c2f1eb7e964848d43824328205d5557bc7639;hp=190dcee93d2911b567ca08fc1f19d9674314a61f;hpb=da0f0deecf22754656bad2a95640461ec3ac4f1d;p=palacios.releases.git

diff --git a/palacios/include/palacios/vmm_instr_emulator.h b/palacios/include/palacios/vmm_instr_emulator.h
index 190dcee..3e9e613 100644
--- a/palacios/include/palacios/vmm_instr_emulator.h
+++ b/palacios/include/palacios/vmm_instr_emulator.h
@@ -1,3 +1,22 @@
+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National 
+ * Science Foundation and the Department of Energy.  
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico.  You can find out more at 
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software.  You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
 #include <palacios/vmm_types.h>
 
 
@@ -235,6 +254,31 @@
 
 
 
+
+#define MAKE_2OP_64STR_INST(iname) static inline void iname##64(addr_t * dst, \
+								 addr_t * src, \
+								 addr_t * ecx, addr_t * flags) { \
+    /* Some of the flags values are not copied out in a pushf, we save them here */ \
+    addr_t flags_rsvd = *flags & ~0xfffe7fff;				\
+									\
+    asm volatile (							\
+	 "pushfq; "							\
+	 "pushq %4; "							\
+	 "popfq; "							\
+	 "rep; "							\
+	 #iname"q; "							\
+	 "pushfq; "							\
+	 "popq %0; "							\
+	 "popfq; "							\
+	 : "=q"(*flags)							\
+	 : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags)			\
+	 );								\
+									\
+    /*	 : "=D"(*dst),"=S"(*src),"=c"(*ecx),"=q"(*flags)*/		\
+    *flags |= flags_rsvd;						\
+  }
+
+
 #define MAKE_2OP_32STR_INST(iname) static inline void iname##32(addr_t * dst, \
 								addr_t * src, \
 								addr_t * ecx, addr_t * flags) { \
@@ -250,8 +294,8 @@
 	 "pushf; "							\
 	 "pop %0; "							\
 	 "popf; "							\
-	 : "=b"(*flags)							\
-	 : "D"(*dst),"S"(*src),"c"(*ecx),"b"(*flags)			\
+	 : "=q"(*flags)							\
+	 : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags)			\
 	 );								\
 									\
     /*	 : "=D"(*dst),"=S"(*src),"=c"(*ecx),"=q"(*flags)*/		\
@@ -273,8 +317,8 @@
 	 "pushf; "							\
 	 "pop %0; "							\
 	 "popf; "							\
-	 : "=b"(*flags)							\
-	 : "D"(*dst),"S"(*src),"c"(*ecx),"b"(*flags)			\
+	 : "=q"(*flags)							\
+	 : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags)			\
 	 );								\
     *flags |= flags_rsvd;						\
   }
@@ -296,8 +340,8 @@
 	 "pushf; "							\
 	 "pop %0; "							\
 	 "popf; "							\
-	 : "=b"(*flags)							\
-	 : "D"(*dst),"S"(*src),"c"(*ecx),"b"(*flags)			\
+	 : "=q"(*flags)							\
+	 : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags)			\
 	 );								\
     *flags |= flags_rsvd;						\
   }
@@ -305,6 +349,17 @@
 
 
 
+#define MAKE_2OP_64_INST(iname) static inline void iname##64(addr_t * dst, addr_t * src) { \
+    uint64_t tmp_dst = *dst, tmp_src = *src;				\
+									\
+    asm volatile (							\
+	 #iname"q %1, %0; "						\
+	 : "=q"(tmp_dst)						\
+	 : "q"(tmp_src), "0"(tmp_dst)					\
+	 );								\
+    *dst = tmp_dst;							\
+  }
+
 #define MAKE_2OP_32_INST(iname) static inline void iname##32(addr_t * dst, addr_t * src) { \
     uint32_t tmp_dst = *dst, tmp_src = *src;				\
 									\
@@ -342,7 +397,9 @@
 
 
 
-
+/****************************/
+/* 8 Bit instruction forms  */
+/****************************/
 
 MAKE_2OP_8FLAGS_INST(adc);
 MAKE_2OP_8FLAGS_INST(add);
@@ -378,8 +435,12 @@ MAKE_1OP_8_INST(not);
 MAKE_2OP_8_INST(mov);
 MAKE_2OP_8_INST(xchg);
 
+MAKE_2OP_8STR_INST(movs);
 
 
+/****************************/
+/* 16 Bit instruction forms */
+/****************************/
 MAKE_2OP_16FLAGS_INST(adc);
 MAKE_2OP_16FLAGS_INST(add);
 MAKE_2OP_16FLAGS_INST(and);
@@ -397,10 +458,11 @@ MAKE_1OP_16_INST(not);
 MAKE_2OP_16_INST(mov);
 MAKE_2OP_16_INST(xchg);
 
+MAKE_2OP_16STR_INST(movs);
 
-
-
-
+/****************************/
+/* 32 Bit instruction forms */
+/****************************/
 MAKE_2OP_32FLAGS_INST(adc);
 MAKE_2OP_32FLAGS_INST(add);
 MAKE_2OP_32FLAGS_INST(and);
@@ -418,6 +480,32 @@ MAKE_1OP_32_INST(not);
 MAKE_2OP_32_INST(mov);
 MAKE_2OP_32_INST(xchg);
 
-MAKE_2OP_8STR_INST(movs);
-MAKE_2OP_16STR_INST(movs);
+
+
 MAKE_2OP_32STR_INST(movs);
+
+#ifdef __V3_64BIT__
+
+/****************************/
+/* 64 Bit instruction forms */
+/****************************/
+MAKE_2OP_64FLAGS_INST(adc);
+MAKE_2OP_64FLAGS_INST(add);
+MAKE_2OP_64FLAGS_INST(and);
+MAKE_2OP_64FLAGS_INST(or);
+MAKE_2OP_64FLAGS_INST(xor);
+MAKE_2OP_64FLAGS_INST(sub);
+
+MAKE_1OP_64FLAGS_INST(inc);
+MAKE_1OP_64FLAGS_INST(dec);
+MAKE_1OP_64FLAGS_INST(neg);
+
+MAKE_1OP_64_INST(not);
+
+
+MAKE_2OP_64_INST(mov);
+
+MAKE_2OP_64_INST(xchg);
+
+
+#endif