X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fgeekos%2Fsvm.h;h=ddd34144fa815a83f52f7bd106dc6e4a742d9ab1;hb=89d5928385ff776aaaf9c0957734a611c9f9880c;hp=b0b6dccb8b719702cf8b568f9bc5fd280990abf7;hpb=01e2bfdc462dbbe8d62b71c7e99e198c27844f0f;p=palacios.git diff --git a/palacios/include/geekos/svm.h b/palacios/include/geekos/svm.h index b0b6dcc..ddd3414 100644 --- a/palacios/include/geekos/svm.h +++ b/palacios/include/geekos/svm.h @@ -1,13 +1,16 @@ #ifndef __SVM_H #define __SVM_H +#include #include +#include #define CPUID_FEATURE_IDS 0x80000001 #define CPUID_FEATURE_IDS_ecx_svm_avail 0x00000004 #define CPUID_SVM_REV_AND_FEATURE_IDS 0x8000000a #define CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml 0x00000004 +#define CPUID_SVM_REV_AND_FEATURE_IDS_edx_np 0x00000001 #define EFER_MSR 0xc0000080 @@ -19,7 +22,7 @@ /* AMD Arch Vol 3, sec. 15.28, pg 420 */ /************/ -/* SVM VM_CR MSR */ +// SVM VM_CR MSR #define SVM_VM_CR_MSR 0xc0010114 #define SVM_VM_CR_MSR_dpd 0x00000001 #define SVM_VM_CR_MSR_r_init 0x00000002 @@ -29,7 +32,7 @@ #define SVM_IGNNE_MSR 0xc0010115 -/* SMM Signal Control Register */ +// SMM Signal Control Register #define SVM_SMM_CTL_MSR 0xc0010116 #define SVM_SMM_CTL_MSR_dismiss 0x00000001 #define SVM_SMM_CTL_MSR_enter 0x00000002 @@ -38,15 +41,33 @@ #define SVM_SMM_CTL_MSR_rsm_cycle 0x00000010 #define SVM_VM_HSAVE_PA_MSR 0xc0010117 + #define SVM_KEY_MSR 0xc0010118 -/* ** */ +/******/ + + + + +#define SVM_HANDLER_SUCCESS 0x0 +#define SVM_HANDLER_ERROR 0x1 +#define SVM_HANDLER_HALT 0x2 -void Init_SVM(); + + +void Init_SVM(struct vmm_ctrl_ops * vmm_ops); int is_svm_capable(); +vmcb_t * Allocate_VMCB(); +void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info); +void Init_VMCB_pe(vmcb_t * vmcb, struct guest_info vm_info); + +int init_svm_guest(struct guest_info *info); +int start_svm_guest(struct guest_info * info); + + #endif