X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fdevices%2Fpci_types.h;h=c3cd4cb451b92ad2e916f3a37c9d54e24d1134c9;hb=fae3d4b2dab80486bc3e3617f65e603d26b45954;hp=34de6361d024ea770ae8d81b01dc00b70c5e2df5;hpb=11bbd0b954aa7ee9fe8007e6207e876074c79f44;p=palacios.git

diff --git a/palacios/include/devices/pci_types.h b/palacios/include/devices/pci_types.h
index 34de636..c3cd4cb 100644
--- a/palacios/include/devices/pci_types.h
+++ b/palacios/include/devices/pci_types.h
@@ -32,7 +32,8 @@ struct pci_config_header {
     uint16_t   status;
     
     
-    uint16_t    revision;
+    uint8_t    revision;
+    uint8_t    prog_if;
     uint8_t     subclass;
     uint8_t     class;
 
@@ -62,6 +63,62 @@ struct pci_config_header {
 } __attribute__((packed));
 
 
+typedef enum { PCI_CLASS_PRE2 = 0x00, 
+	       PCI_CLASS_STORAGE = 0x01, 
+	       PCI_CLASS_NETWORK = 0x02,
+	       PCI_CLASS_DISPLAY = 0x03,
+	       PCI_CLASS_MMEDIA = 0x04,
+	       PCI_CLASS_MEMORY = 0x05,
+	       PCI_CLASS_BRIDGE = 0x06,
+	       PCI_CLASS_COMM_CTRL = 0x07,
+	       PCI_CLASS_BASE_PERIPH = 0x08,
+	       PCI_CLASS_INPUT = 0x09, 
+	       PCI_CLASS_DOCK = 0x0a,
+	       PCI_CLASS_PROC = 0x0b, 
+	       PCI_CLASS_SERIAL = 0x0c,
+	       PCI_CLASS_MISC = 0xff } pci_class_t;
+
+typedef enum { PCI_STORAGE_SUBCLASS_SCSI = 0x00,
+	       PCI_STORAGE_SUBCLASS_IDE = 0x01,
+	       PCI_STORAGE_SUBCLASS_FLOPPY = 0x02,
+	       PCI_STORAGE_SUBCLASS_IPI = 0x03,
+	       PCI_STORAGE_SUBCLASS_RAID = 0x04,
+	       PCI_STORAGE_SUBCLASS_SATA = 0x06,
+	       PCI_STORAGE_SUBCLASS_SAS = 0x07,
+	       PCI_STORAGE_SUBCLASS_OTHER = 0x80 } pci_storage_subclass_t;
+
+
+
+typedef enum { PCI_NET_SUBCLASS_ETHER = 0x00,
+	       PCI_NET_SUBCLASS_TOKRING = 0x01,
+	       PCI_NET_SUBCLASS_FDDI = 0x02,
+	       PCI_NET_SUBCLASS_ATM = 0x03,
+	       PCI_NET_SUBCLASS_OTHER = 0x80 } pci_network_subclass_t;
+
+typedef enum { PCI_DISPLAY_SUBCLASS_VGA = 0x00,
+	       PCI_DISPLAY_SUBCLASS_XGA = 0x01,
+	       PCI_DISPLAY_SUBCLASS_OTHER = 0x80 } pci_display_subclass_t;
+
+typedef enum { PCI_MMEDIA_SUBCLASS_VIDEO = 0x00,
+	       PCI_MMEDIA_SUBCLASS_AUDIO = 0x01,
+	       PCI_MMEDIA_SUBCLASS_OTHER = 0x80 } pci_multimedia_subclass_t;
+	       
+typedef enum { PCI_MEM_SUBCLASS_RAM = 0x00, 
+	       PCI_MEM_SUBCLASS_FLASH = 0x01,
+	       PCI_MEM_SUBCLASS_OTHER = 0x80 } pci_memory_subclass_t;
+
+typedef enum { PCI_BRIDGE_SUBCLASS_HOST_PCI = 0x00,
+	       PCI_BRIDGE_SUBCLASS_PCI_ISA = 0x01,
+	       PCI_BRIDGE_SUBCLASS_PCI_EISA = 0x02,
+	       PCI_BRIDGE_SUBCLASS_PCI_MICRO = 0x03,
+	       PCI_BRIDGE_SUBCLASS_PCI_PCI = 0x04,
+	       PCI_BRIDGE_SUBCLASS_PCI_PCMCIA = 0x05,
+	       PCI_BRIDGE_SUBCLASS_PCI_NUBUS = 0x06,
+	       PCI_BRIDGE_SUBCLASS_PCI_CARDBUS = 0x07,
+	       PCI_BRIDGE_SUBCLASS_PCI_OTHER = 0x80 } pci_bridge_subclass_t;
+
+
+
 /*
   struct pci_class_desc {
   uint16_t class;